1249997Swkoszek/*- 2250015Swkoszek * Copyright (c) 2013 Thomas Skibo 3249997Swkoszek * All rights reserved. 4250015Swkoszek * 5249997Swkoszek * Redistribution and use in source and binary forms, with or without 6250015Swkoszek * modification, are permitted provided that the following conditions 7250015Swkoszek * are met: 8250015Swkoszek * 1. Redistributions of source code must retain the above copyright 9250015Swkoszek * notice, this list of conditions and the following disclaimer. 10250015Swkoszek * 2. Redistributions in binary form must reproduce the above copyright 11250015Swkoszek * notice, this list of conditions and the following disclaimer in the 12250015Swkoszek * documentation and/or other materials provided with the distribution. 13250015Swkoszek * 14250015Swkoszek * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15250015Swkoszek * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16249997Swkoszek * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17250015Swkoszek * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18250015Swkoszek * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19250015Swkoszek * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20250015Swkoszek * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21250015Swkoszek * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22249997Swkoszek * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23250015Swkoszek * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24250015Swkoszek * SUCH DAMAGE. 25249997Swkoszek * 26250015Swkoszek * $FreeBSD: releng/10.3/sys/arm/xilinx/zy7_gpio.c 278782 2015-02-14 20:37:33Z loos $ 27249997Swkoszek */ 28249997Swkoszek 29250015Swkoszek/* 30250015Swkoszek * A GPIO driver for Xilinx Zynq-7000. 31249997Swkoszek * 32249997Swkoszek * The GPIO peripheral on Zynq allows controlling 114 general purpose I/Os. 33249997Swkoszek * 34249997Swkoszek * Pins 53-0 are sent to the MIO. Any MIO pins not used by a PS peripheral are 35249997Swkoszek * available as a GPIO pin. Pins 64-127 are sent to the PL (FPGA) section of 36249997Swkoszek * Zynq as EMIO signals. 37249997Swkoszek * 38249997Swkoszek * The hardware provides a way to use IOs as interrupt sources but the 39249997Swkoszek * gpio framework doesn't seem to have hooks for this. 40249997Swkoszek * 41249997Swkoszek * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 42249997Swkoszek * (v1.4) November 16, 2012. Xilinx doc UG585. GPIO is covered in 43249997Swkoszek * chater 14. Register definitions are in appendix B.19. 44249997Swkoszek */ 45249997Swkoszek 46249997Swkoszek#include <sys/cdefs.h> 47249997Swkoszek__FBSDID("$FreeBSD: releng/10.3/sys/arm/xilinx/zy7_gpio.c 278782 2015-02-14 20:37:33Z loos $"); 48249997Swkoszek 49249997Swkoszek#include <sys/param.h> 50249997Swkoszek#include <sys/systm.h> 51249997Swkoszek#include <sys/conf.h> 52249997Swkoszek#include <sys/bus.h> 53249997Swkoszek#include <sys/kernel.h> 54249997Swkoszek#include <sys/module.h> 55249997Swkoszek#include <sys/lock.h> 56249997Swkoszek#include <sys/mutex.h> 57249997Swkoszek#include <sys/resource.h> 58249997Swkoszek#include <sys/rman.h> 59249997Swkoszek#include <sys/gpio.h> 60249997Swkoszek 61249997Swkoszek#include <machine/bus.h> 62249997Swkoszek#include <machine/resource.h> 63249997Swkoszek#include <machine/stdarg.h> 64249997Swkoszek 65249997Swkoszek#include <dev/fdt/fdt_common.h> 66249997Swkoszek#include <dev/ofw/ofw_bus.h> 67249997Swkoszek#include <dev/ofw/ofw_bus_subr.h> 68249997Swkoszek 69249997Swkoszek#include "gpio_if.h" 70249997Swkoszek 71249997Swkoszek#define NUMBANKS 4 72249997Swkoszek#define MAXPIN (32*NUMBANKS) 73249997Swkoszek 74249997Swkoszek#define MIO_PIN 0 /* pins 0-53 go to MIO */ 75249997Swkoszek#define NUM_MIO_PINS 54 76249997Swkoszek#define EMIO_PIN 64 /* pins 64-127 go to PL */ 77249997Swkoszek#define NUM_EMIO_PINS 64 78249997Swkoszek 79249997Swkoszek#define VALID_PIN(u) (((u) >= MIO_PIN && (u) < MIO_PIN + NUM_MIO_PINS) || \ 80249997Swkoszek ((u) >= EMIO_PIN && (u) < EMIO_PIN + NUM_EMIO_PINS)) 81249997Swkoszek 82249997Swkoszek#define ZGPIO_LOCK(sc) mtx_lock(&(sc)->sc_mtx) 83249997Swkoszek#define ZGPIO_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) 84249997Swkoszek#define ZGPIO_LOCK_INIT(sc) \ 85249997Swkoszek mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev), \ 86249997Swkoszek "gpio", MTX_DEF) 87249997Swkoszek#define ZGPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 88249997Swkoszek 89249997Swkoszekstruct zy7_gpio_softc { 90249997Swkoszek device_t dev; 91249997Swkoszek struct mtx sc_mtx; 92249997Swkoszek struct resource *mem_res; /* Memory resource */ 93249997Swkoszek}; 94249997Swkoszek 95249997Swkoszek#define WR4(sc, off, val) bus_write_4((sc)->mem_res, (off), (val)) 96249997Swkoszek#define RD4(sc, off) bus_read_4((sc)->mem_res, (off)) 97249997Swkoszek 98249997Swkoszek 99249997Swkoszek/* Xilinx Zynq-7000 GPIO register definitions: 100249997Swkoszek */ 101249997Swkoszek#define ZY7_GPIO_MASK_DATA_LSW(b) (0x0000+8*(b)) /* maskable wr lo */ 102249997Swkoszek#define ZY7_GPIO_MASK_DATA_MSW(b) (0x0004+8*(b)) /* maskable wr hi */ 103249997Swkoszek#define ZY7_GPIO_DATA(b) (0x0040+4*(b)) /* in/out data */ 104249997Swkoszek#define ZY7_GPIO_DATA_RO(b) (0x0060+4*(b)) /* input data */ 105249997Swkoszek 106249997Swkoszek#define ZY7_GPIO_DIRM(b) (0x0204+0x40*(b)) /* direction mode */ 107249997Swkoszek#define ZY7_GPIO_OEN(b) (0x0208+0x40*(b)) /* output enable */ 108249997Swkoszek#define ZY7_GPIO_INT_MASK(b) (0x020c+0x40*(b)) /* int mask */ 109249997Swkoszek#define ZY7_GPIO_INT_EN(b) (0x0210+0x40*(b)) /* int enable */ 110249997Swkoszek#define ZY7_GPIO_INT_DIS(b) (0x0214+0x40*(b)) /* int disable */ 111249997Swkoszek#define ZY7_GPIO_INT_STAT(b) (0x0218+0x40*(b)) /* int status */ 112249997Swkoszek#define ZY7_GPIO_INT_TYPE(b) (0x021c+0x40*(b)) /* int type */ 113249997Swkoszek#define ZY7_GPIO_INT_POLARITY(b) (0x0220+0x40*(b)) /* int polarity */ 114249997Swkoszek#define ZY7_GPIO_INT_ANY(b) (0x0224+0x40*(b)) /* any edge */ 115249997Swkoszek 116249997Swkoszek 117249997Swkoszekstatic int 118249997Swkoszekzy7_gpio_pin_max(device_t dev, int *maxpin) 119249997Swkoszek{ 120249997Swkoszek 121249997Swkoszek *maxpin = MAXPIN; 122249997Swkoszek return (0); 123249997Swkoszek} 124249997Swkoszek 125249997Swkoszek/* Get a specific pin's capabilities. */ 126249997Swkoszekstatic int 127249997Swkoszekzy7_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 128249997Swkoszek{ 129249997Swkoszek 130249997Swkoszek if (!VALID_PIN(pin)) 131249997Swkoszek return (EINVAL); 132249997Swkoszek 133249997Swkoszek *caps = (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE); 134249997Swkoszek 135249997Swkoszek return (0); 136249997Swkoszek} 137249997Swkoszek 138249997Swkoszek/* Get a specific pin's name. */ 139249997Swkoszekstatic int 140249997Swkoszekzy7_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 141249997Swkoszek{ 142249997Swkoszek 143249997Swkoszek if (!VALID_PIN(pin)) 144249997Swkoszek return (EINVAL); 145249997Swkoszek 146249997Swkoszek if (pin < NUM_MIO_PINS) { 147249997Swkoszek snprintf(name, GPIOMAXNAME, "MIO_%d", pin); 148249997Swkoszek name[GPIOMAXNAME - 1] = '\0'; 149249997Swkoszek } else { 150249997Swkoszek snprintf(name, GPIOMAXNAME, "EMIO_%d", pin - EMIO_PIN); 151249997Swkoszek name[GPIOMAXNAME - 1] = '\0'; 152249997Swkoszek } 153249997Swkoszek 154249997Swkoszek return (0); 155249997Swkoszek} 156249997Swkoszek 157249997Swkoszek/* Get a specific pin's current in/out/tri state. */ 158249997Swkoszekstatic int 159249997Swkoszekzy7_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 160249997Swkoszek{ 161249997Swkoszek struct zy7_gpio_softc *sc = device_get_softc(dev); 162249997Swkoszek 163249997Swkoszek if (!VALID_PIN(pin)) 164249997Swkoszek return (EINVAL); 165249997Swkoszek 166249997Swkoszek ZGPIO_LOCK(sc); 167249997Swkoszek 168249997Swkoszek if ((RD4(sc, ZY7_GPIO_DIRM(pin >> 5)) & (1 << (pin & 31))) != 0) { 169249997Swkoszek /* output */ 170249997Swkoszek if ((RD4(sc, ZY7_GPIO_OEN(pin >> 5)) & (1 << (pin & 31))) == 0) 171249997Swkoszek *flags = (GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE); 172249997Swkoszek else 173249997Swkoszek *flags = GPIO_PIN_OUTPUT; 174249997Swkoszek } else 175249997Swkoszek /* input */ 176249997Swkoszek *flags = GPIO_PIN_INPUT; 177249997Swkoszek 178249997Swkoszek ZGPIO_UNLOCK(sc); 179249997Swkoszek 180249997Swkoszek return (0); 181249997Swkoszek} 182249997Swkoszek 183249997Swkoszek/* Set a specific pin's in/out/tri state. */ 184249997Swkoszekstatic int 185249997Swkoszekzy7_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 186249997Swkoszek{ 187249997Swkoszek struct zy7_gpio_softc *sc = device_get_softc(dev); 188249997Swkoszek 189249997Swkoszek if (!VALID_PIN(pin)) 190249997Swkoszek return (EINVAL); 191249997Swkoszek 192249997Swkoszek ZGPIO_LOCK(sc); 193249997Swkoszek 194249997Swkoszek if ((flags & GPIO_PIN_OUTPUT) != 0) { 195249997Swkoszek /* Output. Set or reset OEN too. */ 196249997Swkoszek WR4(sc, ZY7_GPIO_DIRM(pin >> 5), 197249997Swkoszek RD4(sc, ZY7_GPIO_DIRM(pin >> 5)) | (1 << (pin & 31))); 198249997Swkoszek 199249997Swkoszek if ((flags & GPIO_PIN_TRISTATE) != 0) 200249997Swkoszek WR4(sc, ZY7_GPIO_OEN(pin >> 5), 201249997Swkoszek RD4(sc, ZY7_GPIO_OEN(pin >> 5)) & 202249997Swkoszek ~(1 << (pin & 31))); 203249997Swkoszek else 204249997Swkoszek WR4(sc, ZY7_GPIO_OEN(pin >> 5), 205249997Swkoszek RD4(sc, ZY7_GPIO_OEN(pin >> 5)) | 206249997Swkoszek (1 << (pin & 31))); 207249997Swkoszek } else { 208249997Swkoszek /* Input. Turn off OEN. */ 209249997Swkoszek WR4(sc, ZY7_GPIO_DIRM(pin >> 5), 210249997Swkoszek RD4(sc, ZY7_GPIO_DIRM(pin >> 5)) & ~(1 << (pin & 31))); 211249997Swkoszek WR4(sc, ZY7_GPIO_OEN(pin >> 5), 212249997Swkoszek RD4(sc, ZY7_GPIO_OEN(pin >> 5)) & ~(1 << (pin & 31))); 213249997Swkoszek } 214249997Swkoszek 215249997Swkoszek ZGPIO_UNLOCK(sc); 216249997Swkoszek 217249997Swkoszek return (0); 218249997Swkoszek} 219249997Swkoszek 220249997Swkoszek/* Set a specific output pin's value. */ 221249997Swkoszekstatic int 222249997Swkoszekzy7_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) 223249997Swkoszek{ 224249997Swkoszek struct zy7_gpio_softc *sc = device_get_softc(dev); 225249997Swkoszek 226249997Swkoszek if (!VALID_PIN(pin) || value > 1) 227249997Swkoszek return (EINVAL); 228249997Swkoszek 229249997Swkoszek /* Fancy register tricks allow atomic set or reset. */ 230249997Swkoszek if ((pin & 16) != 0) 231249997Swkoszek WR4(sc, ZY7_GPIO_MASK_DATA_MSW(pin >> 5), 232249997Swkoszek (0xffff0000 ^ (0x10000 << (pin & 15))) | 233249997Swkoszek (value << (pin & 15))); 234249997Swkoszek else 235249997Swkoszek WR4(sc, ZY7_GPIO_MASK_DATA_LSW(pin >> 5), 236249997Swkoszek (0xffff0000 ^ (0x10000 << (pin & 15))) | 237249997Swkoszek (value << (pin & 15))); 238249997Swkoszek 239249997Swkoszek return (0); 240249997Swkoszek} 241249997Swkoszek 242249997Swkoszek/* Get a specific pin's input value. */ 243249997Swkoszekstatic int 244249997Swkoszekzy7_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value) 245249997Swkoszek{ 246249997Swkoszek struct zy7_gpio_softc *sc = device_get_softc(dev); 247249997Swkoszek 248249997Swkoszek if (!VALID_PIN(pin)) 249249997Swkoszek return (EINVAL); 250249997Swkoszek 251249997Swkoszek *value = (RD4(sc, ZY7_GPIO_DATA_RO(pin >> 5)) >> (pin & 31)) & 1; 252249997Swkoszek 253249997Swkoszek return (0); 254249997Swkoszek} 255249997Swkoszek 256249997Swkoszek/* Toggle a pin's output value. */ 257249997Swkoszekstatic int 258249997Swkoszekzy7_gpio_pin_toggle(device_t dev, uint32_t pin) 259249997Swkoszek{ 260249997Swkoszek struct zy7_gpio_softc *sc = device_get_softc(dev); 261249997Swkoszek 262249997Swkoszek if (!VALID_PIN(pin)) 263249997Swkoszek return (EINVAL); 264249997Swkoszek 265249997Swkoszek ZGPIO_LOCK(sc); 266249997Swkoszek 267249997Swkoszek WR4(sc, ZY7_GPIO_DATA(pin >> 5), 268249997Swkoszek RD4(sc, ZY7_GPIO_DATA(pin >> 5)) ^ (1 << (pin & 31))); 269249997Swkoszek 270249997Swkoszek ZGPIO_UNLOCK(sc); 271249997Swkoszek 272249997Swkoszek return (0); 273249997Swkoszek} 274249997Swkoszek 275249997Swkoszekstatic int 276249997Swkoszekzy7_gpio_probe(device_t dev) 277249997Swkoszek{ 278249997Swkoszek 279266152Sian if (!ofw_bus_status_okay(dev)) 280266152Sian return (ENXIO); 281266152Sian 282249997Swkoszek if (!ofw_bus_is_compatible(dev, "xlnx,zy7_gpio")) 283249997Swkoszek return (ENXIO); 284249997Swkoszek 285249997Swkoszek device_set_desc(dev, "Zynq-7000 GPIO driver"); 286249997Swkoszek return (0); 287249997Swkoszek} 288249997Swkoszek 289249997Swkoszekstatic void 290249997Swkoszekzy7_gpio_hw_reset(struct zy7_gpio_softc *sc) 291249997Swkoszek{ 292249997Swkoszek int i; 293249997Swkoszek 294249997Swkoszek for (i = 0; i < NUMBANKS; i++) { 295249997Swkoszek WR4(sc, ZY7_GPIO_DATA(i), 0); 296249997Swkoszek WR4(sc, ZY7_GPIO_DIRM(i), 0); 297249997Swkoszek WR4(sc, ZY7_GPIO_OEN(i), 0); 298249997Swkoszek WR4(sc, ZY7_GPIO_INT_DIS(i), 0xffffffff); 299249997Swkoszek WR4(sc, ZY7_GPIO_INT_POLARITY(i), 0); 300249997Swkoszek WR4(sc, ZY7_GPIO_INT_TYPE(i), 301249997Swkoszek i == 1 ? 0x003fffff : 0xffffffff); 302249997Swkoszek WR4(sc, ZY7_GPIO_INT_ANY(i), 0); 303249997Swkoszek WR4(sc, ZY7_GPIO_INT_STAT(i), 0xffffffff); 304249997Swkoszek } 305249997Swkoszek} 306249997Swkoszek 307249997Swkoszekstatic int zy7_gpio_detach(device_t dev); 308249997Swkoszek 309249997Swkoszekstatic int 310249997Swkoszekzy7_gpio_attach(device_t dev) 311249997Swkoszek{ 312249997Swkoszek struct zy7_gpio_softc *sc = device_get_softc(dev); 313249997Swkoszek int rid; 314249997Swkoszek 315249997Swkoszek sc->dev = dev; 316249997Swkoszek 317249997Swkoszek ZGPIO_LOCK_INIT(sc); 318249997Swkoszek 319249997Swkoszek /* Allocate memory. */ 320249997Swkoszek rid = 0; 321249997Swkoszek sc->mem_res = bus_alloc_resource_any(dev, 322249997Swkoszek SYS_RES_MEMORY, &rid, RF_ACTIVE); 323249997Swkoszek if (sc->mem_res == NULL) { 324249997Swkoszek device_printf(dev, "Can't allocate memory for device"); 325249997Swkoszek zy7_gpio_detach(dev); 326249997Swkoszek return (ENOMEM); 327249997Swkoszek } 328249997Swkoszek 329249997Swkoszek /* Completely reset. */ 330249997Swkoszek zy7_gpio_hw_reset(sc); 331249997Swkoszek 332278782Sloos device_add_child(dev, "gpioc", -1); 333278782Sloos device_add_child(dev, "gpiobus", -1); 334249997Swkoszek 335249997Swkoszek return (bus_generic_attach(dev)); 336249997Swkoszek} 337249997Swkoszek 338249997Swkoszekstatic int 339249997Swkoszekzy7_gpio_detach(device_t dev) 340249997Swkoszek{ 341249997Swkoszek struct zy7_gpio_softc *sc = device_get_softc(dev); 342249997Swkoszek 343249997Swkoszek bus_generic_detach(dev); 344249997Swkoszek 345249997Swkoszek if (sc->mem_res != NULL) { 346249997Swkoszek /* Release memory resource. */ 347249997Swkoszek bus_release_resource(dev, SYS_RES_MEMORY, 348249997Swkoszek rman_get_rid(sc->mem_res), sc->mem_res); 349249997Swkoszek } 350249997Swkoszek 351249997Swkoszek ZGPIO_LOCK_DESTROY(sc); 352249997Swkoszek 353249997Swkoszek return (0); 354249997Swkoszek} 355249997Swkoszek 356249997Swkoszekstatic device_method_t zy7_gpio_methods[] = { 357249997Swkoszek /* device_if */ 358249997Swkoszek DEVMETHOD(device_probe, zy7_gpio_probe), 359249997Swkoszek DEVMETHOD(device_attach, zy7_gpio_attach), 360249997Swkoszek DEVMETHOD(device_detach, zy7_gpio_detach), 361249997Swkoszek 362249997Swkoszek /* GPIO protocol */ 363249997Swkoszek DEVMETHOD(gpio_pin_max, zy7_gpio_pin_max), 364249997Swkoszek DEVMETHOD(gpio_pin_getname, zy7_gpio_pin_getname), 365249997Swkoszek DEVMETHOD(gpio_pin_getflags, zy7_gpio_pin_getflags), 366249997Swkoszek DEVMETHOD(gpio_pin_getcaps, zy7_gpio_pin_getcaps), 367249997Swkoszek DEVMETHOD(gpio_pin_setflags, zy7_gpio_pin_setflags), 368249997Swkoszek DEVMETHOD(gpio_pin_get, zy7_gpio_pin_get), 369249997Swkoszek DEVMETHOD(gpio_pin_set, zy7_gpio_pin_set), 370249997Swkoszek DEVMETHOD(gpio_pin_toggle, zy7_gpio_pin_toggle), 371249997Swkoszek 372249997Swkoszek DEVMETHOD_END 373249997Swkoszek}; 374249997Swkoszek 375249997Swkoszekstatic driver_t zy7_gpio_driver = { 376249997Swkoszek "zy7_gpio", 377249997Swkoszek zy7_gpio_methods, 378249997Swkoszek sizeof(struct zy7_gpio_softc), 379249997Swkoszek}; 380249997Swkoszekstatic devclass_t zy7_gpio_devclass; 381249997Swkoszek 382249997Swkoszekextern devclass_t gpiobus_devclass, gpioc_devclass; 383249997Swkoszekextern driver_t gpiobus_driver, gpioc_driver; 384249997Swkoszek 385249997SwkoszekDRIVER_MODULE(zy7_gpio, simplebus, zy7_gpio_driver, zy7_gpio_devclass, \ 386249997Swkoszek NULL, NULL); 387249997SwkoszekDRIVER_MODULE(gpiobus, zy7_gpio, gpiobus_driver, gpiobus_devclass, 0, 0); 388249997SwkoszekDRIVER_MODULE(gpioc, zy7_gpio, gpioc_driver, gpioc_devclass, 0, 0); 389