1239281Sgonzo/*- 2239281Sgonzo * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3239281Sgonzo * All rights reserved. 4239281Sgonzo * 5239281Sgonzo * Redistribution and use in source and binary forms, with or without 6239281Sgonzo * modification, are permitted provided that the following conditions 7239281Sgonzo * are met: 8239281Sgonzo * 1. Redistributions of source code must retain the above copyright 9239281Sgonzo * notice, this list of conditions and the following disclaimer. 10239281Sgonzo * 2. Redistributions in binary form must reproduce the above copyright 11239281Sgonzo * notice, this list of conditions and the following disclaimer in the 12239281Sgonzo * documentation and/or other materials provided with the distribution. 13239281Sgonzo * 14239281Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15239281Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16239281Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17239281Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18239281Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19239281Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20239281Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21239281Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22239281Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23239281Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24239281Sgonzo * SUCH DAMAGE. 25239281Sgonzo * 26239281Sgonzo * $FreeBSD: releng/10.3/sys/arm/ti/ti_edma3.h 239281 2012-08-15 06:31:32Z gonzo $ 27239281Sgonzo */ 28239281Sgonzo 29239281Sgonzo#ifndef _TI_EDMA3_H_ 30239281Sgonzo#define _TI_EDMA3_H_ 31239281Sgonzo 32239281Sgonzo/* Direct Mapped EDMA3 Events */ 33239281Sgonzo#define TI_EDMA3_EVENT_SDTXEVT1 2 34239281Sgonzo#define TI_EDMA3_EVENT_SDRXEVT1 3 35239281Sgonzo#define TI_EDMA3_EVENT_SDTXEVT0 24 36239281Sgonzo#define TI_EDMA3_EVENT_SDRXEVT0 25 37239281Sgonzo 38239281Sgonzostruct ti_edma3cc_param_set { 39239281Sgonzo struct { 40239281Sgonzo uint32_t sam:1; /* Source address mode */ 41239281Sgonzo uint32_t dam:1; /* Destination address mode */ 42239281Sgonzo uint32_t syncdim:1; /* Transfer synchronization dimension */ 43239281Sgonzo uint32_t static_set:1; /* Static Set */ 44239281Sgonzo uint32_t :4; 45239281Sgonzo uint32_t fwid:3; /* FIFO Width */ 46239281Sgonzo uint32_t tccmode:1; /* Transfer complete code mode */ 47239281Sgonzo uint32_t tcc:6; /* Transfer complete code */ 48239281Sgonzo uint32_t :2; 49239281Sgonzo uint32_t tcinten:1; /* Transfer complete interrupt enable */ 50239281Sgonzo uint32_t itcinten:1; /* Intermediate xfer completion intr. ena */ 51239281Sgonzo uint32_t tcchen:1; /* Transfer complete chaining enable */ 52239281Sgonzo uint32_t itcchen:1; /* Intermediate xfer completion chaining ena */ 53239281Sgonzo uint32_t privid:4; /* Privilege identification */ 54239281Sgonzo uint32_t :3; 55239281Sgonzo uint32_t priv:1; /* Privilege level */ 56239281Sgonzo } opt; 57239281Sgonzo uint32_t src; /* Channel Source Address */ 58239281Sgonzo uint16_t acnt; /* Count for 1st Dimension */ 59239281Sgonzo uint16_t bcnt; /* Count for 2nd Dimension */ 60239281Sgonzo uint32_t dst; /* Channel Destination Address */ 61239281Sgonzo int16_t srcbidx; /* Source B Index */ 62239281Sgonzo int16_t dstbidx; /* Destination B Index */ 63239281Sgonzo uint16_t link; /* Link Address */ 64239281Sgonzo uint16_t bcntrld; /* BCNT Reload */ 65239281Sgonzo int16_t srccidx; /* Source C Index */ 66239281Sgonzo int16_t dstcidx; /* Destination C Index */ 67239281Sgonzo uint16_t ccnt; /* Count for 3rd Dimension */ 68239281Sgonzo uint16_t reserved; /* Reserved */ 69239281Sgonzo}; 70239281Sgonzo 71239281Sgonzovoid ti_edma3_init(unsigned int eqn); 72239281Sgonzoint ti_edma3_request_dma_ch(unsigned int ch, unsigned int tccn, unsigned int eqn); 73239281Sgonzoint ti_edma3_request_qdma_ch(unsigned int ch, unsigned int tccn, unsigned int eqn); 74239281Sgonzoint ti_edma3_enable_transfer_manual(unsigned int ch); 75239281Sgonzoint ti_edma3_enable_transfer_qdma(unsigned int ch); 76239281Sgonzoint ti_edma3_enable_transfer_event(unsigned int ch); 77239281Sgonzo 78239281Sgonzovoid ti_edma3_param_write(unsigned int ch, struct ti_edma3cc_param_set *prs); 79239281Sgonzovoid ti_edma3_param_read(unsigned int ch, struct ti_edma3cc_param_set *prs); 80239281Sgonzo 81239281Sgonzo#endif /* _TI_EDMA3_H_ */ 82