cpufunc.h revision 25164
1/*- 2 * Copyright (c) 1993 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $Id: cpufunc.h,v 1.62 1997/03/22 18:52:57 kato Exp $ 34 */ 35 36/* 37 * Functions to provide access to special i386 instructions. 38 */ 39 40#ifndef _MACHINE_CPUFUNC_H_ 41#define _MACHINE_CPUFUNC_H_ 42 43#include <sys/cdefs.h> 44#include <sys/types.h> 45#include <machine/smp.h> 46 47#include "opt_smp.h" 48#include "opt_smp_invltlb.h" 49 50#ifdef __GNUC__ 51 52static __inline void 53breakpoint(void) 54{ 55 __asm __volatile("int $3"); 56} 57 58static __inline void 59disable_intr(void) 60{ 61 __asm __volatile("cli" : : : "memory"); 62} 63 64static __inline void 65enable_intr(void) 66{ 67 __asm __volatile("sti"); 68} 69 70#define HAVE_INLINE_FFS 71 72static __inline int 73ffs(int mask) 74{ 75 int result; 76 /* 77 * bsfl turns out to be not all that slow on 486's. It can beaten 78 * using a binary search to reduce to 4 bits and then a table lookup, 79 * but only if the code is inlined and in the cache, and the code 80 * is quite large so inlining it probably busts the cache. 81 * 82 * Note that gcc-2's builtin ffs would be used if we didn't declare 83 * this inline or turn off the builtin. The builtin is faster but 84 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and 2.6. 85 */ 86 __asm __volatile("testl %0,%0; je 1f; bsfl %0,%0; incl %0; 1:" 87 : "=r" (result) : "0" (mask)); 88 return (result); 89} 90 91#define HAVE_INLINE_FLS 92 93static __inline int 94fls(int mask) 95{ 96 int result; 97 __asm __volatile("testl %0,%0; je 1f; bsrl %0,%0; incl %0; 1:" 98 : "=r" (result) : "0" (mask)); 99 return (result); 100} 101 102#if __GNUC__ < 2 103 104#define inb(port) inbv(port) 105#define outb(port, data) outbv(port, data) 106 107#else /* __GNUC >= 2 */ 108 109/* 110 * The following complications are to get around gcc not having a 111 * constraint letter for the range 0..255. We still put "d" in the 112 * constraint because "i" isn't a valid constraint when the port 113 * isn't constant. This only matters for -O0 because otherwise 114 * the non-working version gets optimized away. 115 * 116 * Use an expression-statement instead of a conditional expression 117 * because gcc-2.6.0 would promote the operands of the conditional 118 * and produce poor code for "if ((inb(var) & const1) == const2)". 119 * 120 * The unnecessary test `(port) < 0x10000' is to generate a warning if 121 * the `port' has type u_short or smaller. Such types are pessimal. 122 * This actually only works for signed types. The range check is 123 * careful to avoid generating warnings. 124 */ 125#define inb(port) __extension__ ({ \ 126 u_char _data; \ 127 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 128 && (port) < 0x10000) \ 129 _data = inbc(port); \ 130 else \ 131 _data = inbv(port); \ 132 _data; }) 133 134#define outb(port, data) ( \ 135 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 136 && (port) < 0x10000 \ 137 ? outbc(port, data) : outbv(port, data)) 138 139static __inline u_char 140inbc(u_int port) 141{ 142 u_char data; 143 144 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port))); 145 return (data); 146} 147 148static __inline void 149outbc(u_int port, u_char data) 150{ 151 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port))); 152} 153 154#endif /* __GNUC <= 2 */ 155 156static __inline u_char 157inbv(u_int port) 158{ 159 u_char data; 160 /* 161 * We use %%dx and not %1 here because i/o is done at %dx and not at 162 * %edx, while gcc generates inferior code (movw instead of movl) 163 * if we tell it to load (u_short) port. 164 */ 165 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 166 return (data); 167} 168 169static __inline u_long 170inl(u_int port) 171{ 172 u_long data; 173 174 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port)); 175 return (data); 176} 177 178static __inline void 179insb(u_int port, void *addr, size_t cnt) 180{ 181 __asm __volatile("cld; rep; insb" 182 : : "d" (port), "D" (addr), "c" (cnt) 183 : "di", "cx", "memory"); 184} 185 186static __inline void 187insw(u_int port, void *addr, size_t cnt) 188{ 189 __asm __volatile("cld; rep; insw" 190 : : "d" (port), "D" (addr), "c" (cnt) 191 : "di", "cx", "memory"); 192} 193 194static __inline void 195insl(u_int port, void *addr, size_t cnt) 196{ 197 __asm __volatile("cld; rep; insl" 198 : : "d" (port), "D" (addr), "c" (cnt) 199 : "di", "cx", "memory"); 200} 201 202static __inline void 203invd(void) 204{ 205 __asm __volatile("invd"); 206} 207 208#if defined(SMP) && defined(SMP_INVLTLB) 209 210/* 211 * When using APIC IPI's, the inlining cost is prohibitive.. 212 */ 213void invlpg __P((u_int addr)); 214void invltlb __P((void)); 215 216#else 217 218static __inline void 219invlpg(u_int addr) 220{ 221 __asm __volatile("invlpg (%0)" : : "r" (addr) : "memory"); 222} 223 224static __inline void 225invltlb(void) 226{ 227 u_long temp; 228 /* 229 * This should be implemented as load_cr3(rcr3()) when load_cr3() 230 * is inlined. 231 */ 232 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp) 233 : : "memory"); 234} 235#endif /* SMP && SMP_INVLTLB */ 236 237static __inline u_short 238inw(u_int port) 239{ 240 u_short data; 241 242 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port)); 243 return (data); 244} 245 246static __inline u_int 247loadandclear(u_int *addr) 248{ 249 u_int result; 250 251 __asm __volatile("xorl %0,%0; xchgl %1,%0" 252 : "=&r" (result) : "m" (*addr)); 253 return (result); 254} 255 256static __inline void 257outbv(u_int port, u_char data) 258{ 259 u_char al; 260 /* 261 * Use an unnecessary assignment to help gcc's register allocator. 262 * This make a large difference for gcc-1.40 and a tiny difference 263 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 264 * best results. gcc-2.6.0 can't handle this. 265 */ 266 al = data; 267 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 268} 269 270static __inline void 271outl(u_int port, u_long data) 272{ 273 /* 274 * outl() and outw() aren't used much so we haven't looked at 275 * possible micro-optimizations such as the unnecessary 276 * assignment for them. 277 */ 278 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port)); 279} 280 281static __inline void 282outsb(u_int port, void *addr, size_t cnt) 283{ 284 __asm __volatile("cld; rep; outsb" 285 : : "d" (port), "S" (addr), "c" (cnt) 286 : "si", "cx"); 287} 288 289static __inline void 290outsw(u_int port, void *addr, size_t cnt) 291{ 292 __asm __volatile("cld; rep; outsw" 293 : : "d" (port), "S" (addr), "c" (cnt) 294 : "si", "cx"); 295} 296 297static __inline void 298outsl(u_int port, void *addr, size_t cnt) 299{ 300 __asm __volatile("cld; rep; outsl" 301 : : "d" (port), "S" (addr), "c" (cnt) 302 : "si", "cx"); 303} 304 305static __inline void 306outw(u_int port, u_short data) 307{ 308 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port)); 309} 310 311static __inline u_long 312rcr2(void) 313{ 314 u_long data; 315 316 __asm __volatile("movl %%cr2,%0" : "=r" (data)); 317 return (data); 318} 319 320static __inline u_long 321read_eflags(void) 322{ 323 u_long ef; 324 325 __asm __volatile("pushfl; popl %0" : "=r" (ef)); 326 return (ef); 327} 328 329static __inline quad_t 330rdmsr(u_int msr) 331{ 332 quad_t rv; 333 334 __asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr)); 335 return (rv); 336} 337 338static __inline quad_t 339rdpmc(u_int pmc) 340{ 341 quad_t rv; 342 343 __asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc)); 344 return (rv); 345} 346 347static __inline quad_t 348rdtsc(void) 349{ 350 quad_t rv; 351 352 __asm __volatile(".byte 0x0f, 0x31" : "=A" (rv)); 353 return (rv); 354} 355 356static __inline void 357setbits(volatile unsigned *addr, u_int bits) 358{ 359 __asm __volatile("orl %1,%0" : "=m" (*addr) : "ir" (bits)); 360} 361 362static __inline void 363wbinvd(void) 364{ 365 __asm __volatile("wbinvd"); 366} 367 368static __inline void 369write_eflags(u_long ef) 370{ 371 __asm __volatile("pushl %0; popfl" : : "r" (ef)); 372} 373 374static __inline void 375wrmsr(u_int msr, quad_t newval) 376{ 377 __asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr)); 378} 379 380#else /* !__GNUC__ */ 381 382int breakpoint __P((void)); 383void disable_intr __P((void)); 384void enable_intr __P((void)); 385u_char inb __P((u_int port)); 386u_long inl __P((u_int port)); 387void insb __P((u_int port, void *addr, size_t cnt)); 388void insl __P((u_int port, void *addr, size_t cnt)); 389void insw __P((u_int port, void *addr, size_t cnt)); 390void invd __P((void)); 391void invlpg __P((u_int addr)); 392void invltlb __P((void)); 393u_short inw __P((u_int port)); 394u_int loadandclear __P((u_int *addr)); 395void outb __P((u_int port, u_char data)); 396void outl __P((u_int port, u_long data)); 397void outsb __P((u_int port, void *addr, size_t cnt)); 398void outsl __P((u_int port, void *addr, size_t cnt)); 399void outsw __P((u_int port, void *addr, size_t cnt)); 400void outw __P((u_int port, u_short data)); 401u_long rcr2 __P((void)); 402quad_t rdmsr __P((u_int msr)); 403quad_t rdpmc __P((u_int pmc)); 404quad_t rdtsc __P((void)); 405u_long read_eflags __P((void)); 406void setbits __P((volatile unsigned *addr, u_int bits)); 407void wbinvd __P((void)); 408void write_eflags __P((u_long ef)); 409void wrmsr __P((u_int msr, quad_t newval)); 410 411#endif /* __GNUC__ */ 412 413void load_cr0 __P((u_long cr0)); 414void load_cr3 __P((u_long cr3)); 415void ltr __P((u_short sel)); 416u_int rcr0 __P((void)); 417u_long rcr3 __P((void)); 418 419#include <machine/spl.h> /* XXX belongs elsewhere */ 420 421#endif /* !_MACHINE_CPUFUNC_H_ */ 422