191174Stmm/* 291174Stmm * Copyright (c) 1992, 1993 391174Stmm * The Regents of the University of California. All rights reserved. 491174Stmm * 591174Stmm * This software was developed by the Computer Systems Engineering group 691174Stmm * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 791174Stmm * contributed to Berkeley. 891174Stmm * 991174Stmm * All advertising materials mentioning features or use of this software 1091174Stmm * must display the following acknowledgement: 1191174Stmm * This product includes software developed by the University of 1291174Stmm * California, Lawrence Berkeley Laboratory. 1391174Stmm * 1491174Stmm * Redistribution and use in source and binary forms, with or without 1591174Stmm * modification, are permitted provided that the following conditions 1691174Stmm * are met: 1791174Stmm * 1. Redistributions of source code must retain the above copyright 1891174Stmm * notice, this list of conditions and the following disclaimer. 1991174Stmm * 2. Redistributions in binary form must reproduce the above copyright 2091174Stmm * notice, this list of conditions and the following disclaimer in the 2191174Stmm * documentation and/or other materials provided with the distribution. 2291174Stmm * 4. Neither the name of the University nor the names of its contributors 2391174Stmm * may be used to endorse or promote products derived from this software 2491174Stmm * without specific prior written permission. 2591174Stmm * 2691174Stmm * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2791174Stmm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2891174Stmm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2991174Stmm * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 3091174Stmm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 3191174Stmm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3291174Stmm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3391174Stmm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3491174Stmm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3591174Stmm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3691174Stmm * SUCH DAMAGE. 3791174Stmm * 3891174Stmm * @(#)fpu_explode.c 8.1 (Berkeley) 6/11/93 3992986Sobrien * $NetBSD: fpu_explode.c,v 1.5 2000/08/03 18:32:08 eeh Exp $ 4091174Stmm */ 4191174Stmm 4292986Sobrien#include <sys/cdefs.h> 4392986Sobrien__FBSDID("$FreeBSD: releng/10.3/lib/libc/sparc64/fpu/fpu_explode.c 205410 2010-03-21 13:18:08Z marius $"); 4492986Sobrien 4591174Stmm/* 4691174Stmm * FPU subroutines: `explode' the machine's `packed binary' format numbers 4791174Stmm * into our internal format. 4891174Stmm */ 4991174Stmm 5091174Stmm#include <sys/param.h> 5191174Stmm 52205395Smarius#ifdef FPU_DEBUG 53205395Smarius#include <stdio.h> 54205395Smarius#endif 55205395Smarius 5691174Stmm#include <machine/frame.h> 5791174Stmm#include <machine/fp.h> 5891174Stmm#include <machine/fsr.h> 5991174Stmm#include <machine/ieee.h> 6091174Stmm#include <machine/instr.h> 6191174Stmm 6291174Stmm#include "fpu_arith.h" 6391174Stmm#include "fpu_emu.h" 6491174Stmm#include "fpu_extern.h" 6595587Sjake#include "__sparc_utrap_private.h" 6691174Stmm 6791174Stmm/* 6891174Stmm * N.B.: in all of the following, we assume the FP format is 6991174Stmm * 7091174Stmm * --------------------------- 7191174Stmm * | s | exponent | fraction | 7291174Stmm * --------------------------- 7391174Stmm * 7491174Stmm * (which represents -1**s * 1.fraction * 2**exponent), so that the 7591174Stmm * sign bit is way at the top (bit 31), the exponent is next, and 7691174Stmm * then the remaining bits mark the fraction. A zero exponent means 7791174Stmm * zero or denormalized (0.fraction rather than 1.fraction), and the 7891174Stmm * maximum possible exponent, 2bias+1, signals inf (fraction==0) or NaN. 7991174Stmm * 8091174Stmm * Since the sign bit is always the topmost bit---this holds even for 8191174Stmm * integers---we set that outside all the *tof functions. Each function 8291174Stmm * returns the class code for the new number (but note that we use 8391174Stmm * FPC_QNAN for all NaNs; fpu_explode will fix this if appropriate). 8491174Stmm */ 8591174Stmm 8691174Stmm/* 8791174Stmm * int -> fpn. 8891174Stmm */ 8991174Stmmint 9091174Stmm__fpu_itof(fp, i) 9192889Sobrien struct fpn *fp; 9292889Sobrien u_int i; 9391174Stmm{ 9491174Stmm 9591174Stmm if (i == 0) 9691174Stmm return (FPC_ZERO); 9791174Stmm /* 9891174Stmm * The value FP_1 represents 2^FP_LG, so set the exponent 9991174Stmm * there and let normalization fix it up. Convert negative 10091174Stmm * numbers to sign-and-magnitude. Note that this relies on 10191174Stmm * fpu_norm()'s handling of `supernormals'; see fpu_subr.c. 10291174Stmm */ 10391174Stmm fp->fp_exp = FP_LG; 104146673Sstefanf /* 105146673Sstefanf * The sign bit decides whether i should be interpreted as 106146673Sstefanf * a signed or unsigned entity. 107146673Sstefanf */ 108146673Sstefanf if (fp->fp_sign && (int)i < 0) 109146673Sstefanf fp->fp_mant[0] = -i; 110146673Sstefanf else 111146673Sstefanf fp->fp_mant[0] = i; 11291174Stmm fp->fp_mant[1] = 0; 11391174Stmm fp->fp_mant[2] = 0; 11491174Stmm fp->fp_mant[3] = 0; 11591174Stmm __fpu_norm(fp); 11691174Stmm return (FPC_NUM); 11791174Stmm} 11891174Stmm 11991174Stmm/* 12091174Stmm * 64-bit int -> fpn. 12191174Stmm */ 12291174Stmmint 12391174Stmm__fpu_xtof(fp, i) 12492889Sobrien struct fpn *fp; 12592889Sobrien u_int64_t i; 12691174Stmm{ 12791174Stmm 12891174Stmm if (i == 0) 12991174Stmm return (FPC_ZERO); 13091174Stmm /* 13191174Stmm * The value FP_1 represents 2^FP_LG, so set the exponent 13291174Stmm * there and let normalization fix it up. Convert negative 13391174Stmm * numbers to sign-and-magnitude. Note that this relies on 13491174Stmm * fpu_norm()'s handling of `supernormals'; see fpu_subr.c. 13591174Stmm */ 13691174Stmm fp->fp_exp = FP_LG2; 137146673Sstefanf /* 138146673Sstefanf * The sign bit decides whether i should be interpreted as 139146673Sstefanf * a signed or unsigned entity. 140146673Sstefanf */ 141146673Sstefanf if (fp->fp_sign && (int64_t)i < 0) 142205410Smarius *((int64_t *)fp->fp_mant) = -i; 143146673Sstefanf else 144205410Smarius *((int64_t *)fp->fp_mant) = i; 14591174Stmm fp->fp_mant[2] = 0; 14691174Stmm fp->fp_mant[3] = 0; 14791174Stmm __fpu_norm(fp); 14891174Stmm return (FPC_NUM); 14991174Stmm} 15091174Stmm 15191174Stmm#define mask(nbits) ((1L << (nbits)) - 1) 15291174Stmm 15391174Stmm/* 15491174Stmm * All external floating formats convert to internal in the same manner, 15591174Stmm * as defined here. Note that only normals get an implied 1.0 inserted. 15691174Stmm */ 15791174Stmm#define FP_TOF(exp, expbias, allfrac, f0, f1, f2, f3) \ 15891174Stmm if (exp == 0) { \ 15991174Stmm if (allfrac == 0) \ 16091174Stmm return (FPC_ZERO); \ 16191174Stmm fp->fp_exp = 1 - expbias; \ 16291174Stmm fp->fp_mant[0] = f0; \ 16391174Stmm fp->fp_mant[1] = f1; \ 16491174Stmm fp->fp_mant[2] = f2; \ 16591174Stmm fp->fp_mant[3] = f3; \ 16691174Stmm __fpu_norm(fp); \ 16791174Stmm return (FPC_NUM); \ 16891174Stmm } \ 16991174Stmm if (exp == (2 * expbias + 1)) { \ 17091174Stmm if (allfrac == 0) \ 17191174Stmm return (FPC_INF); \ 17291174Stmm fp->fp_mant[0] = f0; \ 17391174Stmm fp->fp_mant[1] = f1; \ 17491174Stmm fp->fp_mant[2] = f2; \ 17591174Stmm fp->fp_mant[3] = f3; \ 17691174Stmm return (FPC_QNAN); \ 17791174Stmm } \ 17891174Stmm fp->fp_exp = exp - expbias; \ 17991174Stmm fp->fp_mant[0] = FP_1 | f0; \ 18091174Stmm fp->fp_mant[1] = f1; \ 18191174Stmm fp->fp_mant[2] = f2; \ 18291174Stmm fp->fp_mant[3] = f3; \ 18391174Stmm return (FPC_NUM) 18491174Stmm 18591174Stmm/* 18691174Stmm * 32-bit single precision -> fpn. 18791174Stmm * We assume a single occupies at most (64-FP_LG) bits in the internal 18891174Stmm * format: i.e., needs at most fp_mant[0] and fp_mant[1]. 18991174Stmm */ 19091174Stmmint 19191174Stmm__fpu_stof(fp, i) 19292889Sobrien struct fpn *fp; 19392889Sobrien u_int i; 19491174Stmm{ 19592889Sobrien int exp; 19692889Sobrien u_int frac, f0, f1; 19791174Stmm#define SNG_SHIFT (SNG_FRACBITS - FP_LG) 19891174Stmm 19991174Stmm exp = (i >> (32 - 1 - SNG_EXPBITS)) & mask(SNG_EXPBITS); 20091174Stmm frac = i & mask(SNG_FRACBITS); 20191174Stmm f0 = frac >> SNG_SHIFT; 20291174Stmm f1 = frac << (32 - SNG_SHIFT); 20391174Stmm FP_TOF(exp, SNG_EXP_BIAS, frac, f0, f1, 0, 0); 20491174Stmm} 20591174Stmm 20691174Stmm/* 20791174Stmm * 64-bit double -> fpn. 20891174Stmm * We assume this uses at most (96-FP_LG) bits. 20991174Stmm */ 21091174Stmmint 21191174Stmm__fpu_dtof(fp, i, j) 21292889Sobrien struct fpn *fp; 21392889Sobrien u_int i, j; 21491174Stmm{ 21592889Sobrien int exp; 21692889Sobrien u_int frac, f0, f1, f2; 21791174Stmm#define DBL_SHIFT (DBL_FRACBITS - 32 - FP_LG) 21891174Stmm 21991174Stmm exp = (i >> (32 - 1 - DBL_EXPBITS)) & mask(DBL_EXPBITS); 22091174Stmm frac = i & mask(DBL_FRACBITS - 32); 22191174Stmm f0 = frac >> DBL_SHIFT; 22291174Stmm f1 = (frac << (32 - DBL_SHIFT)) | (j >> DBL_SHIFT); 22391174Stmm f2 = j << (32 - DBL_SHIFT); 22491174Stmm frac |= j; 22591174Stmm FP_TOF(exp, DBL_EXP_BIAS, frac, f0, f1, f2, 0); 22691174Stmm} 22791174Stmm 22891174Stmm/* 22991174Stmm * 128-bit extended -> fpn. 23091174Stmm */ 23191174Stmmint 23291174Stmm__fpu_qtof(fp, i, j, k, l) 23392889Sobrien struct fpn *fp; 23492889Sobrien u_int i, j, k, l; 23591174Stmm{ 23692889Sobrien int exp; 23792889Sobrien u_int frac, f0, f1, f2, f3; 23891174Stmm#define EXT_SHIFT (-(EXT_FRACBITS - 3 * 32 - FP_LG)) /* left shift! */ 23991174Stmm 24091174Stmm /* 24191174Stmm * Note that ext and fpn `line up', hence no shifting needed. 24291174Stmm */ 24391174Stmm exp = (i >> (32 - 1 - EXT_EXPBITS)) & mask(EXT_EXPBITS); 24491174Stmm frac = i & mask(EXT_FRACBITS - 3 * 32); 24591174Stmm f0 = (frac << EXT_SHIFT) | (j >> (32 - EXT_SHIFT)); 24691174Stmm f1 = (j << EXT_SHIFT) | (k >> (32 - EXT_SHIFT)); 24791174Stmm f2 = (k << EXT_SHIFT) | (l >> (32 - EXT_SHIFT)); 24891174Stmm f3 = l << EXT_SHIFT; 24991174Stmm frac |= j | k | l; 25091174Stmm FP_TOF(exp, EXT_EXP_BIAS, frac, f0, f1, f2, f3); 25191174Stmm} 25291174Stmm 25391174Stmm/* 25492889Sobrien * Explode the contents of a / regpair / regquad. 25591174Stmm * If the input is a signalling NaN, an NV (invalid) exception 25691174Stmm * will be set. (Note that nothing but NV can occur until ALU 25791174Stmm * operations are performed.) 25891174Stmm */ 25991174Stmmvoid 26091174Stmm__fpu_explode(fe, fp, type, reg) 26191174Stmm struct fpemu *fe; 26291174Stmm struct fpn *fp; 26391174Stmm int type, reg; 26491174Stmm{ 265205410Smarius u_int64_t l0, l1; 266205410Smarius u_int32_t s; 26791174Stmm 26896422Sjake if (type == FTYPE_LNG || type == FTYPE_DBL || type == FTYPE_EXT) { 269205410Smarius l0 = __fpu_getreg64(reg & ~1); 270205410Smarius fp->fp_sign = l0 >> 63; 27196422Sjake } else { 27296422Sjake s = __fpu_getreg(reg); 27396422Sjake fp->fp_sign = s >> 31; 27496422Sjake } 27591174Stmm fp->fp_sticky = 0; 27691174Stmm switch (type) { 27791174Stmm case FTYPE_LNG: 278205410Smarius s = __fpu_xtof(fp, l0); 27991174Stmm break; 28091174Stmm 28191174Stmm case FTYPE_INT: 28291174Stmm s = __fpu_itof(fp, s); 28391174Stmm break; 28491174Stmm 28591174Stmm case FTYPE_SNG: 28691174Stmm s = __fpu_stof(fp, s); 28791174Stmm break; 28891174Stmm 28991174Stmm case FTYPE_DBL: 290205410Smarius s = __fpu_dtof(fp, l0 >> 32, l0 & 0xffffffff); 29191174Stmm break; 29291174Stmm 29391174Stmm case FTYPE_EXT: 294205410Smarius l1 = __fpu_getreg64((reg & ~1) + 2); 295205410Smarius s = __fpu_qtof(fp, l0 >> 32, l0 & 0xffffffff, l1 >> 32, 296205410Smarius l1 & 0xffffffff); 29791174Stmm break; 29891174Stmm 29991174Stmm default: 30095587Sjake __utrap_panic("fpu_explode"); 30191174Stmm } 30291174Stmm 30391174Stmm if (s == FPC_QNAN && (fp->fp_mant[0] & FP_QUIETBIT) == 0) { 30491174Stmm /* 30591174Stmm * Input is a signalling NaN. All operations that return 30691174Stmm * an input NaN operand put it through a ``NaN conversion'', 30791174Stmm * which basically just means ``turn on the quiet bit''. 30891174Stmm * We do this here so that all NaNs internally look quiet 30991174Stmm * (we can tell signalling ones by their class). 31091174Stmm */ 31191174Stmm fp->fp_mant[0] |= FP_QUIETBIT; 31291174Stmm fe->fe_cx = FSR_NV; /* assert invalid operand */ 31391174Stmm s = FPC_SNAN; 31491174Stmm } 31591174Stmm fp->fp_class = s; 31691174Stmm DPRINTF(FPE_REG, ("fpu_explode: %%%c%d => ", (type == FTYPE_LNG) ? 'x' : 31791174Stmm ((type == FTYPE_INT) ? 'i' : 31891174Stmm ((type == FTYPE_SNG) ? 's' : 31991174Stmm ((type == FTYPE_DBL) ? 'd' : 32091174Stmm ((type == FTYPE_EXT) ? 'q' : '?')))), 32191174Stmm reg)); 32291174Stmm DUMPFPN(FPE_REG, fp); 32391174Stmm DPRINTF(FPE_REG, ("\n")); 32491174Stmm} 325