__umoddi3.S revision 296373 
1.file "__umoddi3.s"
2
3//
4// Copyright (c) 2000, Intel Corporation
5// All rights reserved.
6//
7// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache,
8// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab,
9// Intel Corporation.
10//
11// WARRANTY DISCLAIMER
12//
13// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
14// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
15// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
16// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
17// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
18// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
20// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
21// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
22// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
23// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24//
25// Intel Corporation is the author of this code, and requests that all
26// problem reports or change requests be submitted to it directly at
27// http://developer.intel.com/opensource.
28//
29
30#include <machine/asm.h>
31__FBSDID("$FreeBSD: releng/10.3/lib/libc/ia64/gen/__umoddi3.S 111777 2003-03-03 01:09:46Z obrien $");
32
33.section .text
34
35  // 64-bit unsigned integer remainder
36
37.proc __umoddi3#
38.align 32
39.global __umoddi3#
40.align 32
41
42__umoddi3:
43
44{ .mii
45  alloc r31=ar.pfs,3,0,0,0
46  nop.i 0
47  nop.i 0
48} { .mmb
49
50  // 64-BIT UNSIGNED INTEGER REMAINDER BEGINS HERE
51
52  // general register used:
53  //    r32 - 64-bit unsigned integer dividend
54  //    r33 - 64-bit unsigned integer divisor
55  //    r8 - 64-bit unsigned integer result
56  // floating-point registers used: f6, f7, f8, f9, f10, f11, f12
57  // predicate registers used: p6
58
59  setf.sig f12=r32  // holds an in integer form
60  setf.sig f7=r33
61  nop.b 0;;
62} { .mfi
63  // get 2's complement of b
64  sub r33=r0,r33
65  fcvt.xuf.s1 f6=f12
66  nop.i 0
67} { .mfi
68  nop.m 0
69  fcvt.xuf.s1 f7=f7
70  nop.i 0;;
71} { .mfi
72  nop.m 0
73  // Step (1)
74  // y0 = 1 / b in f8
75  frcpa.s1 f8,p6=f6,f7
76  nop.i 0;;
77} { .mfi
78  nop.m 0
79  // Step (2)
80  // q0 = a * y0 in f10
81  (p6) fma.s1 f10=f6,f8,f0
82  nop.i 0
83} { .mfi
84  nop.m 0
85  // Step (3)
86  // e0 = 1 - b * y0 in f9
87  (p6) fnma.s1 f9=f7,f8,f1
88  nop.i 0;;
89} { .mfi
90  nop.m 0
91  // Step (4)
92  // q1 = q0 + e0 * q0 in f10
93  (p6) fma.s1 f10=f9,f10,f10
94  nop.i 0
95} { .mfi
96  nop.m 0
97  // Step (5)
98  // e1 = e0 * e0 in f11
99  (p6) fma.s1 f11=f9,f9,f0
100  nop.i 0;;
101} { .mfi
102  nop.m 0
103  // Step (6)
104  // y1 = y0 + e0 * y0 in f8
105  (p6) fma.s1 f8=f9,f8,f8
106  nop.i 0;;
107} { .mfi
108  nop.m 0
109  // Step (7)
110  // q2 = q1 + e1 * q1 in f9
111  (p6) fma.s1 f9=f11,f10,f10
112  nop.i 0;;
113} { .mfi
114  nop.m 0
115  // Step (8)
116  // y2 = y1 + e1 * y1 in f8
117  (p6) fma.s1 f8=f11,f8,f8
118  nop.i 0;;
119} { .mfi
120  nop.m 0
121  // Step (9)
122  // r2 = a - b * q2 in f10
123  (p6) fnma.s1 f10=f7,f9,f6
124  nop.i 0;;
125} { .mfi
126  // f7=-b
127  setf.sig f7=r33
128  // Step (10)
129  // q3 = q2 + r2 * y2 in f8
130  (p6) fma.s1 f8=f10,f8,f9
131  nop.i 0;;
132} { .mfi
133  nop.m 0
134  // (11) q = trunc(q3)
135  fcvt.fxu.trunc.s1 f8=f8
136  nop.i 0;;
137}  { .mfi
138  nop.m 0
139  // (12) r = a + (-b) * q
140  xma.l f8=f8,f7,f12
141  nop.i 0;;
142}  { .mib
143  getf.sig r8=f8
144  nop.i 0
145  nop.b 0
146}
147
148  // 64-BIT UNSIGNED INTEGER REMAINDER ENDS HERE
149
150{ .mib
151  nop.m 0
152  nop.i 0
153  br.ret.sptk b0;;
154}
155
156.endp __umoddi3
157