CodeGenTarget.h revision 223017
1//===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines wrappers for the Target class and related global
11// functionality.  This makes it easier to access the data and provides a single
12// place that needs to check it for validity.  All of these classes throw
13// exceptions on error conditions.
14//
15//===----------------------------------------------------------------------===//
16
17#ifndef CODEGEN_TARGET_H
18#define CODEGEN_TARGET_H
19
20#include "CodeGenRegisters.h"
21#include "CodeGenInstruction.h"
22#include "Record.h"
23#include "llvm/Support/raw_ostream.h"
24#include <algorithm>
25
26namespace llvm {
27
28struct CodeGenRegister;
29class CodeGenTarget;
30
31// SelectionDAG node properties.
32//  SDNPMemOperand: indicates that a node touches memory and therefore must
33//                  have an associated memory operand that describes the access.
34enum SDNP {
35  SDNPCommutative,
36  SDNPAssociative,
37  SDNPHasChain,
38  SDNPOutGlue,
39  SDNPInGlue,
40  SDNPOptInGlue,
41  SDNPMayLoad,
42  SDNPMayStore,
43  SDNPSideEffect,
44  SDNPMemOperand,
45  SDNPVariadic,
46  SDNPWantRoot,
47  SDNPWantParent
48};
49
50/// getValueType - Return the MVT::SimpleValueType that the specified TableGen
51/// record corresponds to.
52MVT::SimpleValueType getValueType(Record *Rec);
53
54std::string getName(MVT::SimpleValueType T);
55std::string getEnumName(MVT::SimpleValueType T);
56
57/// getQualifiedName - Return the name of the specified record, with a
58/// namespace qualifier if the record contains one.
59std::string getQualifiedName(const Record *R);
60
61/// CodeGenTarget - This class corresponds to the Target class in the .td files.
62///
63class CodeGenTarget {
64  RecordKeeper &Records;
65  Record *TargetRec;
66
67  mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
68  mutable CodeGenRegBank *RegBank;
69  mutable std::vector<CodeGenRegisterClass> RegisterClasses;
70  mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
71  void ReadRegisterClasses() const;
72  void ReadInstructions() const;
73  void ReadLegalValueTypes() const;
74
75  mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
76public:
77  CodeGenTarget(RecordKeeper &Records);
78
79  Record *getTargetRecord() const { return TargetRec; }
80  const std::string &getName() const;
81
82  /// getInstNamespace - Return the target-specific instruction namespace.
83  ///
84  std::string getInstNamespace() const;
85
86  /// getInstructionSet - Return the InstructionSet object.
87  ///
88  Record *getInstructionSet() const;
89
90  /// getAsmParser - Return the AssemblyParser definition for this target.
91  ///
92  Record *getAsmParser() const;
93
94  /// getAsmWriter - Return the AssemblyWriter definition for this target.
95  ///
96  Record *getAsmWriter() const;
97
98  /// getRegBank - Return the register bank description.
99  CodeGenRegBank &getRegBank() const;
100
101  const std::vector<CodeGenRegister> &getRegisters() const {
102    return getRegBank().getRegisters();
103  }
104
105  /// getRegisterByName - If there is a register with the specific AsmName,
106  /// return it.
107  const CodeGenRegister *getRegisterByName(StringRef Name) const;
108
109  const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
110    if (RegisterClasses.empty()) ReadRegisterClasses();
111    return RegisterClasses;
112  }
113
114  const CodeGenRegisterClass &getRegisterClass(Record *R) const {
115    const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
116    for (unsigned i = 0, e = RC.size(); i != e; ++i)
117      if (RC[i].TheDef == R)
118        return RC[i];
119    assert(0 && "Didn't find the register class");
120    abort();
121  }
122
123  /// getRegisterClassForRegister - Find the register class that contains the
124  /// specified physical register.  If the register is not in a register
125  /// class, return null. If the register is in multiple classes, and the
126  /// classes have a superset-subset relationship and the same set of
127  /// types, return the superclass.  Otherwise return null.
128  const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
129    const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
130    const CodeGenRegisterClass *FoundRC = 0;
131    for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
132      const CodeGenRegisterClass &RC = RegisterClasses[i];
133      for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
134        if (R != RC.Elements[ei])
135          continue;
136
137        // If a register's classes have different types, return null.
138        if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
139          return 0;
140
141        // If this is the first class that contains the register,
142        // make a note of it and go on to the next class.
143        if (!FoundRC) {
144          FoundRC = &RC;
145          break;
146        }
147
148        std::vector<Record *> Elements(RC.Elements);
149        std::vector<Record *> FoundElements(FoundRC->Elements);
150        std::sort(Elements.begin(), Elements.end());
151        std::sort(FoundElements.begin(), FoundElements.end());
152
153        // Check to see if the previously found class that contains
154        // the register is a subclass of the current class. If so,
155        // prefer the superclass.
156        if (std::includes(Elements.begin(), Elements.end(),
157                          FoundElements.begin(), FoundElements.end())) {
158          FoundRC = &RC;
159          break;
160        }
161
162        // Check to see if the previously found class that contains
163        // the register is a superclass of the current class. If so,
164        // prefer the superclass.
165        if (std::includes(FoundElements.begin(), FoundElements.end(),
166                          Elements.begin(), Elements.end()))
167          break;
168
169        // Multiple classes, and neither is a superclass of the other.
170        // Return null.
171        return 0;
172      }
173    }
174    return FoundRC;
175  }
176
177  /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
178  /// specified physical register.
179  std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
180
181  const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
182    if (LegalValueTypes.empty()) ReadLegalValueTypes();
183    return LegalValueTypes;
184  }
185
186  /// isLegalValueType - Return true if the specified value type is natively
187  /// supported by the target (i.e. there are registers that directly hold it).
188  bool isLegalValueType(MVT::SimpleValueType VT) const {
189    const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
190    for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
191      if (LegalVTs[i] == VT) return true;
192    return false;
193  }
194
195private:
196  DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const {
197    if (Instructions.empty()) ReadInstructions();
198    return Instructions;
199  }
200public:
201
202  CodeGenInstruction &getInstruction(const Record *InstRec) const {
203    if (Instructions.empty()) ReadInstructions();
204    DenseMap<const Record*, CodeGenInstruction*>::iterator I =
205      Instructions.find(InstRec);
206    assert(I != Instructions.end() && "Not an instruction");
207    return *I->second;
208  }
209
210  /// getInstructionsByEnumValue - Return all of the instructions defined by the
211  /// target, ordered by their enum value.
212  const std::vector<const CodeGenInstruction*> &
213  getInstructionsByEnumValue() const {
214    if (InstrsByEnum.empty()) ComputeInstrsByEnum();
215    return InstrsByEnum;
216  }
217
218  typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
219  inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
220  inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
221
222
223  /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
224  ///
225  bool isLittleEndianEncoding() const;
226
227private:
228  void ComputeInstrsByEnum() const;
229};
230
231/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
232/// tablegen class in TargetSelectionDAG.td
233class ComplexPattern {
234  MVT::SimpleValueType Ty;
235  unsigned NumOperands;
236  std::string SelectFunc;
237  std::vector<Record*> RootNodes;
238  unsigned Properties; // Node properties
239public:
240  ComplexPattern() : NumOperands(0) {}
241  ComplexPattern(Record *R);
242
243  MVT::SimpleValueType getValueType() const { return Ty; }
244  unsigned getNumOperands() const { return NumOperands; }
245  const std::string &getSelectFunc() const { return SelectFunc; }
246  const std::vector<Record*> &getRootNodes() const {
247    return RootNodes;
248  }
249  bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
250};
251
252} // End llvm namespace
253
254#endif
255