1249259Sdim//===-- SIIntrinsics.td - SI Intrinsic defs ----------------*- tablegen -*-===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//===----------------------------------------------------------------------===// 9249259Sdim// 10249259Sdim// SI Intrinsic Definitions 11249259Sdim// 12249259Sdim//===----------------------------------------------------------------------===// 13249259Sdim 14249259Sdim 15249259Sdimlet TargetPrefix = "SI", isTarget = 1 in { 16249259Sdim 17263508Sdim def int_SI_tid : Intrinsic <[llvm_i32_ty], [], [IntrNoMem]>; 18249259Sdim def int_SI_packf16 : Intrinsic <[llvm_i32_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>; 19249259Sdim def int_SI_export : Intrinsic <[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], []>; 20263508Sdim def int_SI_load_const : Intrinsic <[llvm_float_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>; 21263508Sdim def int_SI_vs_load_input : Intrinsic <[llvm_v4f32_ty], [llvm_anyint_ty, llvm_i16_ty, llvm_i32_ty], [IntrNoMem]> ; 22249259Sdim 23263508Sdim // Fully-flexible TBUFFER_STORE_FORMAT_* except for the ADDR64 bit, which is not exposed 24263508Sdim def int_SI_tbuffer_store : Intrinsic < 25263508Sdim [], 26263508Sdim [llvm_anyint_ty, // rsrc(SGPR) 27263508Sdim llvm_anyint_ty, // vdata(VGPR), overloaded for types i32, v2i32, v4i32 28263508Sdim llvm_i32_ty, // num_channels(imm), selects opcode suffix: 1=X, 2=XY, 3=XYZ, 4=XYZW 29263508Sdim llvm_i32_ty, // vaddr(VGPR) 30263508Sdim llvm_i32_ty, // soffset(SGPR) 31263508Sdim llvm_i32_ty, // inst_offset(imm) 32263508Sdim llvm_i32_ty, // dfmt(imm) 33263508Sdim llvm_i32_ty, // nfmt(imm) 34263508Sdim llvm_i32_ty, // offen(imm) 35263508Sdim llvm_i32_ty, // idxen(imm) 36263508Sdim llvm_i32_ty, // glc(imm) 37263508Sdim llvm_i32_ty, // slc(imm) 38263508Sdim llvm_i32_ty], // tfe(imm) 39263508Sdim []>; 40249259Sdim 41266715Sdim // Fully-flexible BUFFER_LOAD_DWORD_* except for the ADDR64 bit, which is not exposed 42266715Sdim def int_SI_buffer_load_dword : Intrinsic < 43266715Sdim [llvm_anyint_ty], // vdata(VGPR), overloaded for types i32, v2i32, v4i32 44266715Sdim [llvm_anyint_ty, // rsrc(SGPR) 45266715Sdim llvm_anyint_ty, // vaddr(VGPR) 46266715Sdim llvm_i32_ty, // soffset(SGPR) 47266715Sdim llvm_i32_ty, // inst_offset(imm) 48266715Sdim llvm_i32_ty, // offen(imm) 49266715Sdim llvm_i32_ty, // idxen(imm) 50266715Sdim llvm_i32_ty, // glc(imm) 51266715Sdim llvm_i32_ty, // slc(imm) 52266715Sdim llvm_i32_ty], // tfe(imm) 53266715Sdim [IntrReadArgMem]>; 54266715Sdim 55266715Sdim def int_SI_sendmsg : Intrinsic <[], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 56266715Sdim 57263508Sdim class Sample : Intrinsic <[llvm_v4f32_ty], [llvm_anyvector_ty, llvm_v32i8_ty, llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>; 58263508Sdim 59249259Sdim def int_SI_sample : Sample; 60249259Sdim def int_SI_sampleb : Sample; 61263508Sdim def int_SI_sampled : Sample; 62249259Sdim def int_SI_samplel : Sample; 63249259Sdim 64251662Sdim def int_SI_imageload : Intrinsic <[llvm_v4i32_ty], [llvm_anyvector_ty, llvm_v32i8_ty, llvm_i32_ty], [IntrNoMem]>; 65251662Sdim 66251662Sdim def int_SI_resinfo : Intrinsic <[llvm_v4i32_ty], [llvm_i32_ty, llvm_v32i8_ty, llvm_i32_ty], [IntrNoMem]>; 67251662Sdim 68249259Sdim /* Interpolation Intrinsics */ 69249259Sdim 70249259Sdim def int_SI_fs_constant : Intrinsic <[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; 71249259Sdim def int_SI_fs_interp : Intrinsic <[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_v2i32_ty], [IntrNoMem]>; 72249259Sdim 73249259Sdim /* Control flow Intrinsics */ 74249259Sdim 75249259Sdim def int_SI_if : Intrinsic<[llvm_i64_ty], [llvm_i1_ty, llvm_empty_ty], []>; 76249259Sdim def int_SI_else : Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_empty_ty], []>; 77249259Sdim def int_SI_break : Intrinsic<[llvm_i64_ty], [llvm_i64_ty], []>; 78249259Sdim def int_SI_if_break : Intrinsic<[llvm_i64_ty], [llvm_i1_ty, llvm_i64_ty], []>; 79249259Sdim def int_SI_else_break : Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], []>; 80249259Sdim def int_SI_loop : Intrinsic<[], [llvm_i64_ty, llvm_empty_ty], []>; 81249259Sdim def int_SI_end_cf : Intrinsic<[], [llvm_i64_ty], []>; 82249259Sdim} 83