1249259Sdim//===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//===----------------------------------------------------------------------===// 9249259Sdim// 10249259Sdim/// \file 11249259Sdim/// \brief R600 DAG Lowering interface definition 12249259Sdim// 13249259Sdim//===----------------------------------------------------------------------===// 14249259Sdim 15249259Sdim#ifndef R600ISELLOWERING_H 16249259Sdim#define R600ISELLOWERING_H 17249259Sdim 18249259Sdim#include "AMDGPUISelLowering.h" 19249259Sdim 20249259Sdimnamespace llvm { 21249259Sdim 22249259Sdimclass R600InstrInfo; 23249259Sdim 24249259Sdimclass R600TargetLowering : public AMDGPUTargetLowering { 25249259Sdimpublic: 26249259Sdim R600TargetLowering(TargetMachine &TM); 27249259Sdim virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, 28249259Sdim MachineBasicBlock * BB) const; 29249259Sdim virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 30249259Sdim virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 31249259Sdim void ReplaceNodeResults(SDNode * N, 32249259Sdim SmallVectorImpl<SDValue> &Results, 33249259Sdim SelectionDAG &DAG) const; 34249259Sdim virtual SDValue LowerFormalArguments( 35249259Sdim SDValue Chain, 36249259Sdim CallingConv::ID CallConv, 37249259Sdim bool isVarArg, 38249259Sdim const SmallVectorImpl<ISD::InputArg> &Ins, 39263508Sdim SDLoc DL, SelectionDAG &DAG, 40249259Sdim SmallVectorImpl<SDValue> &InVals) const; 41263508Sdim virtual EVT getSetCCResultType(LLVMContext &, EVT VT) const; 42249259Sdimprivate: 43263508Sdim unsigned Gen; 44249259Sdim /// Each OpenCL kernel has nine implicit parameters that are stored in the 45249259Sdim /// first nine dwords of a Vertex Buffer. These implicit parameters are 46249259Sdim /// lowered to load instructions which retreive the values from the Vertex 47249259Sdim /// Buffer. 48249259Sdim SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, 49263508Sdim SDLoc DL, unsigned DwordOffset) const; 50249259Sdim 51249259Sdim void lowerImplicitParameter(MachineInstr *MI, MachineBasicBlock &BB, 52249259Sdim MachineRegisterInfo & MRI, unsigned dword_offset) const; 53263508Sdim SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG) const; 54249259Sdim 55249259Sdim /// \brief Lower ROTL opcode to BITALIGN 56249259Sdim SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const; 57249259Sdim 58249259Sdim SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 59249259Sdim SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const; 60249259Sdim SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const; 61249259Sdim SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const; 62263508Sdim SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const; 63249259Sdim 64249259Sdim SDValue stackPtrToRegIndex(SDValue Ptr, unsigned StackWidth, 65249259Sdim SelectionDAG &DAG) const; 66249259Sdim void getStackAddress(unsigned StackWidth, unsigned ElemIdx, 67249259Sdim unsigned &Channel, unsigned &PtrIncr) const; 68249259Sdim bool isZero(SDValue Op) const; 69263508Sdim virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const; 70249259Sdim}; 71249259Sdim 72249259Sdim} // End namespace llvm; 73249259Sdim 74249259Sdim#endif // R600ISELLOWERING_H 75