1249259Sdim//===----------------------- AMDGPUFrameLowering.cpp ----------------------===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//==-----------------------------------------------------------------------===// 9249259Sdim// 10249259Sdim// Interface to describe a layout of a stack frame on a AMDIL target machine 11249259Sdim// 12249259Sdim//===----------------------------------------------------------------------===// 13249259Sdim#include "AMDGPUFrameLowering.h" 14249259Sdim#include "AMDGPURegisterInfo.h" 15249259Sdim#include "R600MachineFunctionInfo.h" 16249259Sdim#include "llvm/CodeGen/MachineFrameInfo.h" 17249259Sdim#include "llvm/CodeGen/MachineRegisterInfo.h" 18249259Sdim#include "llvm/IR/Instructions.h" 19249259Sdim 20249259Sdimusing namespace llvm; 21249259SdimAMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, unsigned StackAl, 22249259Sdim int LAO, unsigned TransAl) 23249259Sdim : TargetFrameLowering(D, StackAl, LAO, TransAl) { } 24249259Sdim 25249259SdimAMDGPUFrameLowering::~AMDGPUFrameLowering() { } 26249259Sdim 27249259Sdimunsigned AMDGPUFrameLowering::getStackWidth(const MachineFunction &MF) const { 28249259Sdim 29249259Sdim // XXX: Hardcoding to 1 for now. 30249259Sdim // 31249259Sdim // I think the StackWidth should stored as metadata associated with the 32249259Sdim // MachineFunction. This metadata can either be added by a frontend, or 33249259Sdim // calculated by a R600 specific LLVM IR pass. 34249259Sdim // 35249259Sdim // The StackWidth determines how stack objects are laid out in memory. 36249259Sdim // For a vector stack variable, like: int4 stack[2], the data will be stored 37249259Sdim // in the following ways depending on the StackWidth. 38249259Sdim // 39249259Sdim // StackWidth = 1: 40249259Sdim // 41249259Sdim // T0.X = stack[0].x 42249259Sdim // T1.X = stack[0].y 43249259Sdim // T2.X = stack[0].z 44249259Sdim // T3.X = stack[0].w 45249259Sdim // T4.X = stack[1].x 46249259Sdim // T5.X = stack[1].y 47249259Sdim // T6.X = stack[1].z 48249259Sdim // T7.X = stack[1].w 49249259Sdim // 50249259Sdim // StackWidth = 2: 51249259Sdim // 52249259Sdim // T0.X = stack[0].x 53249259Sdim // T0.Y = stack[0].y 54249259Sdim // T1.X = stack[0].z 55249259Sdim // T1.Y = stack[0].w 56249259Sdim // T2.X = stack[1].x 57249259Sdim // T2.Y = stack[1].y 58249259Sdim // T3.X = stack[1].z 59249259Sdim // T3.Y = stack[1].w 60249259Sdim // 61249259Sdim // StackWidth = 4: 62249259Sdim // T0.X = stack[0].x 63249259Sdim // T0.Y = stack[0].y 64249259Sdim // T0.Z = stack[0].z 65249259Sdim // T0.W = stack[0].w 66249259Sdim // T1.X = stack[1].x 67249259Sdim // T1.Y = stack[1].y 68249259Sdim // T1.Z = stack[1].z 69249259Sdim // T1.W = stack[1].w 70249259Sdim return 1; 71249259Sdim} 72249259Sdim 73249259Sdim/// \returns The number of registers allocated for \p FI. 74249259Sdimint AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF, 75249259Sdim int FI) const { 76249259Sdim const MachineFrameInfo *MFI = MF.getFrameInfo(); 77249259Sdim unsigned Offset = 0; 78249259Sdim int UpperBound = FI == -1 ? MFI->getNumObjects() : FI; 79249259Sdim 80249259Sdim for (int i = MFI->getObjectIndexBegin(); i < UpperBound; ++i) { 81263508Sdim unsigned Size = MFI->getObjectSize(i); 82263508Sdim Offset += (Size / (getStackWidth(MF) * 4)); 83249259Sdim } 84249259Sdim return Offset; 85249259Sdim} 86249259Sdim 87249259Sdimconst TargetFrameLowering::SpillSlot * 88249259SdimAMDGPUFrameLowering::getCalleeSavedSpillSlots(unsigned &NumEntries) const { 89249259Sdim NumEntries = 0; 90249259Sdim return 0; 91249259Sdim} 92249259Sdimvoid 93249259SdimAMDGPUFrameLowering::emitPrologue(MachineFunction &MF) const { 94249259Sdim} 95249259Sdimvoid 96249259SdimAMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, 97249259Sdim MachineBasicBlock &MBB) const { 98249259Sdim} 99249259Sdim 100249259Sdimbool 101249259SdimAMDGPUFrameLowering::hasFP(const MachineFunction &MF) const { 102249259Sdim return false; 103249259Sdim} 104