PPCSubtarget.cpp revision 224145
1193323Sed//===- PowerPCSubtarget.cpp - PPC Subtarget Information -------------------===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10224145Sdim// This file implements the PPC specific subclass of TargetSubtargetInfo. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14193323Sed#include "PPCSubtarget.h" 15193323Sed#include "PPC.h" 16198090Srdivacky#include "llvm/GlobalValue.h" 17193323Sed#include "llvm/Target/TargetMachine.h" 18224145Sdim#include "llvm/Target/TargetRegistry.h" 19193323Sed#include <cstdlib> 20224145Sdim 21224145Sdim#define GET_SUBTARGETINFO_TARGET_DESC 22224145Sdim#define GET_SUBTARGETINFO_CTOR 23224145Sdim#include "PPCGenSubtargetInfo.inc" 24224145Sdim 25193323Sedusing namespace llvm; 26193323Sed 27193323Sed#if defined(__APPLE__) 28193323Sed#include <mach/mach.h> 29193323Sed#include <mach/mach_host.h> 30193323Sed#include <mach/host_info.h> 31193323Sed#include <mach/machine.h> 32193323Sed 33193323Sed/// GetCurrentPowerPCFeatures - Returns the current CPUs features. 34193323Sedstatic const char *GetCurrentPowerPCCPU() { 35193323Sed host_basic_info_data_t hostInfo; 36193323Sed mach_msg_type_number_t infoCount; 37193323Sed 38193323Sed infoCount = HOST_BASIC_INFO_COUNT; 39193323Sed host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t)&hostInfo, 40193323Sed &infoCount); 41193323Sed 42193323Sed if (hostInfo.cpu_type != CPU_TYPE_POWERPC) return "generic"; 43193323Sed 44193323Sed switch(hostInfo.cpu_subtype) { 45193323Sed case CPU_SUBTYPE_POWERPC_601: return "601"; 46193323Sed case CPU_SUBTYPE_POWERPC_602: return "602"; 47193323Sed case CPU_SUBTYPE_POWERPC_603: return "603"; 48193323Sed case CPU_SUBTYPE_POWERPC_603e: return "603e"; 49193323Sed case CPU_SUBTYPE_POWERPC_603ev: return "603ev"; 50193323Sed case CPU_SUBTYPE_POWERPC_604: return "604"; 51193323Sed case CPU_SUBTYPE_POWERPC_604e: return "604e"; 52193323Sed case CPU_SUBTYPE_POWERPC_620: return "620"; 53193323Sed case CPU_SUBTYPE_POWERPC_750: return "750"; 54193323Sed case CPU_SUBTYPE_POWERPC_7400: return "7400"; 55193323Sed case CPU_SUBTYPE_POWERPC_7450: return "7450"; 56193323Sed case CPU_SUBTYPE_POWERPC_970: return "970"; 57193323Sed default: ; 58193323Sed } 59193323Sed 60193323Sed return "generic"; 61193323Sed} 62193323Sed#endif 63193323Sed 64193323Sed 65224145SdimPPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU, 66224145Sdim const std::string &FS, bool is64Bit) 67224145Sdim : PPCGenSubtargetInfo(TT, CPU, FS) 68224145Sdim , StackAlignment(16) 69193323Sed , DarwinDirective(PPC::DIR_NONE) 70193323Sed , IsGigaProcessor(false) 71193323Sed , Has64BitSupport(false) 72193323Sed , Use64BitRegs(false) 73193323Sed , IsPPC64(is64Bit) 74193323Sed , HasAltivec(false) 75193323Sed , HasFSQRT(false) 76193323Sed , HasSTFIWX(false) 77193323Sed , HasLazyResolverStubs(false) 78212904Sdim , IsJITCodeModel(false) 79221345Sdim , TargetTriple(TT) { 80193323Sed 81193323Sed // Determine default and user specified characteristics 82224145Sdim std::string CPUName = CPU; 83224145Sdim if (CPUName.empty()) 84224145Sdim CPUName = "generic"; 85193323Sed#if defined(__APPLE__) 86224145Sdim if (CPUName == "generic") 87224145Sdim CPUName = GetCurrentPowerPCCPU(); 88193323Sed#endif 89193323Sed 90193323Sed // Parse features string. 91224145Sdim ParseSubtargetFeatures(CPUName, FS); 92193323Sed 93224145Sdim // Initialize scheduling itinerary for the specified CPU. 94224145Sdim InstrItins = getInstrItineraryForCPU(CPUName); 95224145Sdim 96193323Sed // If we are generating code for ppc64, verify that options make sense. 97193323Sed if (is64Bit) { 98193323Sed Has64BitSupport = true; 99193323Sed // Silently force 64-bit register use on ppc64. 100193323Sed Use64BitRegs = true; 101193323Sed } 102193323Sed 103193323Sed // If the user requested use of 64-bit regs, but the cpu selected doesn't 104193323Sed // support it, ignore. 105193323Sed if (use64BitRegs() && !has64BitSupport()) 106193323Sed Use64BitRegs = false; 107193323Sed 108193323Sed // Set up darwin-specific properties. 109198090Srdivacky if (isDarwin()) 110193323Sed HasLazyResolverStubs = true; 111193323Sed} 112193323Sed 113193323Sed/// SetJITMode - This is called to inform the subtarget info that we are 114193323Sed/// producing code for the JIT. 115193323Sedvoid PPCSubtarget::SetJITMode() { 116193323Sed // JIT mode doesn't want lazy resolver stubs, it knows exactly where 117193323Sed // everything is. This matters for PPC64, which codegens in PIC mode without 118193323Sed // stubs. 119193323Sed HasLazyResolverStubs = false; 120212904Sdim 121212904Sdim // Calls to external functions need to use indirect calls 122212904Sdim IsJITCodeModel = true; 123193323Sed} 124193323Sed 125193323Sed 126193323Sed/// hasLazyResolverStub - Return true if accesses to the specified global have 127193323Sed/// to go through a dyld lazy resolution stub. This means that an extra load 128193323Sed/// is required to get the address of the global. 129198090Srdivackybool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV, 130198090Srdivacky const TargetMachine &TM) const { 131218893Sdim // We never have stubs if HasLazyResolverStubs=false or if in static mode. 132193323Sed if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static) 133193323Sed return false; 134193323Sed // If symbol visibility is hidden, the extra load is not needed if 135193323Sed // the symbol is definitely defined in the current translation unit. 136203954Srdivacky bool isDecl = GV->isDeclaration() && !GV->isMaterializable(); 137193323Sed if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage()) 138193323Sed return false; 139193323Sed return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() || 140193323Sed GV->hasCommonLinkage() || isDecl; 141193323Sed} 142