146283Sdfr/* Definitions for the Macraigor Systems BDM Wiggler 298944Sobrien Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc. 346283Sdfr 498944Sobrien This file is part of GDB. 546283Sdfr 698944Sobrien This program is free software; you can redistribute it and/or modify 798944Sobrien it under the terms of the GNU General Public License as published by 898944Sobrien the Free Software Foundation; either version 2 of the License, or 998944Sobrien (at your option) any later version. 1046283Sdfr 1198944Sobrien This program is distributed in the hope that it will be useful, 1298944Sobrien but WITHOUT ANY WARRANTY; without even the implied warranty of 1398944Sobrien MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1498944Sobrien GNU General Public License for more details. 1546283Sdfr 1698944Sobrien You should have received a copy of the GNU General Public License 1798944Sobrien along with this program; if not, write to the Free Software 1898944Sobrien Foundation, Inc., 59 Temple Place - Suite 330, 1998944Sobrien Boston, MA 02111-1307, USA. */ 2046283Sdfr 2146283Sdfr#ifndef OCD_H 2246283Sdfr#define OCD_H 2346283Sdfr 24130803Smarcelstruct mem_attrib; 25130803Smarcelstruct target_ops; 26130803Smarcel 2746283Sdfr/* Wiggler serial protocol definitions */ 2846283Sdfr 2946283Sdfr#define DLE 020 /* Quote char */ 3046283Sdfr#define SYN 026 /* Start of packet */ 3198944Sobrien#define RAW_SYN ((026 << 8) | 026) /* get_quoted_char found a naked SYN */ 3246283Sdfr 3346283Sdfr/* Status flags */ 3446283Sdfr 3546283Sdfr#define OCD_FLAG_RESET 0x01 /* Target is being reset */ 3646283Sdfr#define OCD_FLAG_STOPPED 0x02 /* Target is halted */ 3746283Sdfr#define OCD_FLAG_BDM 0x04 /* Target is in BDM */ 3846283Sdfr#define OCD_FLAG_PWF 0x08 /* Power failed */ 3998944Sobrien#define OCD_FLAG_CABLE_DISC 0x10 /* BDM cable disconnected */ 4046283Sdfr 4146283Sdfr/* Commands */ 4246283Sdfr 4346283Sdfr#define OCD_AYT 0x0 /* Are you there? */ 4446283Sdfr#define OCD_GET_VERSION 0x1 /* Get Version */ 4546283Sdfr#define OCD_SET_BAUD_RATE 0x2 /* Set Baud Rate */ 4646283Sdfr#define OCD_INIT 0x10 /* Initialize Wiggler */ 4746283Sdfr#define OCD_SET_SPEED 0x11 /* Set Speed */ 4898944Sobrien#define OCD_GET_STATUS_MASK 0x12 /* Get Status Mask */ 4946283Sdfr#define OCD_GET_CTRS 0x13 /* Get Error Counters */ 5046283Sdfr#define OCD_SET_FUNC_CODE 0x14 /* Set Function Code */ 5146283Sdfr#define OCD_SET_CTL_FLAGS 0x15 /* Set Control Flags */ 5246283Sdfr#define OCD_SET_BUF_ADDR 0x16 /* Set Register Buffer Address */ 5346283Sdfr#define OCD_RUN 0x20 /* Run Target from PC */ 5446283Sdfr#define OCD_RUN_ADDR 0x21 /* Run Target from Specified Address */ 5546283Sdfr#define OCD_STOP 0x22 /* Stop Target */ 5646283Sdfr#define OCD_RESET_RUN 0x23 /* Reset Target and Run */ 5746283Sdfr#define OCD_RESET 0x24 /* Reset Target and Halt */ 5846283Sdfr#define OCD_STEP 0x25 /* Single step */ 5946283Sdfr#define OCD_READ_REGS 0x30 /* Read Registers */ 6046283Sdfr#define OCD_WRITE_REGS 0x31 /* Write Registers */ 6146283Sdfr#define OCD_READ_MEM 0x32 /* Read Memory */ 6246283Sdfr#define OCD_WRITE_MEM 0x33 /* Write Memory */ 6346283Sdfr#define OCD_FILL_MEM 0x34 /* Fill Memory */ 6446283Sdfr#define OCD_MOVE_MEM 0x35 /* Move Memory */ 6546283Sdfr 6646283Sdfr#define OCD_READ_INT_MEM 0x80 /* Read Internal Memory */ 6746283Sdfr#define OCD_WRITE_INT_MEM 0x81 /* Write Internal Memory */ 6846283Sdfr#define OCD_JUMP 0x82 /* Jump to Subroutine */ 6946283Sdfr 7046283Sdfr#define OCD_ERASE_FLASH 0x90 /* Erase flash memory */ 7146283Sdfr#define OCD_PROGRAM_FLASH 0x91 /* Write flash memory */ 7246283Sdfr#define OCD_EXIT_MON 0x93 /* Exit the flash programming monitor */ 7346283Sdfr#define OCD_ENTER_MON 0x94 /* Enter the flash programming monitor */ 7446283Sdfr 7546283Sdfr#define OCD_SET_STATUS 0x0a /* Set status */ 7646283Sdfr#define OCD_SET_CONNECTION 0xf0 /* Set connection (init Wigglers.dll) */ 7746283Sdfr#define OCD_LOG_FILE 0xf1 /* Cmd to get Wigglers.dll to log cmds */ 7846283Sdfr#define OCD_FLAG_STOP 0x0 /* Stop the target, enter BDM */ 7946283Sdfr#define OCD_FLAG_START 0x01 /* Start the target at PC */ 8098944Sobrien#define OCD_FLAG_RETURN_STATUS 0x04 /* Return async status */ 8146283Sdfr 8246283Sdfr/* Target type (for OCD_INIT command) */ 8346283Sdfr 8498944Sobrienenum ocd_target_type 8598944Sobrien { 8698944Sobrien OCD_TARGET_CPU32 = 0x0, /* Moto cpu32 family */ 8798944Sobrien OCD_TARGET_CPU16 = 0x1, 8898944Sobrien OCD_TARGET_MOTO_PPC = 0x2, /* Motorola PPC 5xx/8xx */ 8998944Sobrien OCD_TARGET_IBM_PPC = 0x3 9098944Sobrien }; /* IBM PPC 4xx */ 9146283Sdfr 9298944Sobrienvoid ocd_open (char *name, int from_tty, enum ocd_target_type, 9398944Sobrien struct target_ops *ops); 9446283Sdfr 9598944Sobrienvoid ocd_close (int quitting); 9646283Sdfr 9798944Sobrienvoid ocd_detach (char *args, int from_tty); 9846283Sdfr 9998944Sobrienvoid ocd_resume (ptid_t ptid, int step, enum target_signal siggnal); 10046283Sdfr 10198944Sobrienvoid ocd_prepare_to_store (void); 10246283Sdfr 10398944Sobrienvoid ocd_stop (void); 10446283Sdfr 10598944Sobrienvoid ocd_files_info (struct target_ops *ignore); 10646283Sdfr 10746283Sdfr 10898944Sobrienint ocd_xfer_memory (CORE_ADDR memaddr, char *myaddr, 10998944Sobrien int len, int should_write, 11098944Sobrien struct mem_attrib *attrib, 11198944Sobrien struct target_ops *target); 11246283Sdfr 11398944Sobrienvoid ocd_mourn (void); 11446283Sdfr 11598944Sobrienvoid ocd_create_inferior (char *exec_file, char *args, char **env); 11646283Sdfr 11798944Sobrienint ocd_thread_alive (ptid_t th); 11846283Sdfr 11998944Sobrienvoid ocd_error (char *s, int error_code); 12046283Sdfr 12198944Sobrienvoid ocd_kill (void); 12246283Sdfr 12398944Sobrienvoid ocd_load (char *args, int from_tty); 12446283Sdfr 12598944Sobrienunsigned char *ocd_read_bdm_registers (int first_bdm_regno, 12698944Sobrien int last_bdm_regno, int *reglen); 12746283Sdfr 12898944SobrienCORE_ADDR ocd_read_bdm_register (int bdm_regno); 12946283Sdfr 13098944Sobrienvoid ocd_write_bdm_registers (int first_bdm_regno, 13198944Sobrien unsigned char *regptr, int reglen); 13246283Sdfr 13398944Sobrienvoid ocd_write_bdm_register (int bdm_regno, CORE_ADDR reg); 13446283Sdfr 13598944Sobrienint ocd_wait (void); 13646283Sdfr 13798944Sobrienint ocd_insert_breakpoint (CORE_ADDR addr, char *contents_cache); 13898944Sobrienint ocd_remove_breakpoint (CORE_ADDR addr, char *contents_cache); 13946283Sdfr 14098944Sobrienint ocd_write_bytes (CORE_ADDR memaddr, char *myaddr, int len); 14146283Sdfr 14246283Sdfr#endif /* OCD_H */ 143