9000.md revision 169689
1;; DFA-based pipeline description for the RM9000. 2;; Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5 6;; GCC is free software; you can redistribute it and/or modify it 7;; under the terms of the GNU General Public License as published 8;; by the Free Software Foundation; either version 2, or (at your 9;; option) any later version. 10 11;; GCC is distributed in the hope that it will be useful, but WITHOUT 12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14;; License for more details. 15 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING. If not, write to the 18;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 19;; MA 02110-1301, USA. 20 21(define_automaton "rm9k_main, rm9k_imul, rm9k_fdiv") 22 23;; These units are for insns that can issue in either pipe. We don't 24;; want to use constructs like "rm9k_m | rm9k_f_int" since that would 25;; needlessly make an insn prefer the M pipe. 26(define_cpu_unit "rm9k_any1" "rm9k_main") 27(define_cpu_unit "rm9k_any2" "rm9k_main") 28 29;; F and M pipe units, for instructions that must be issued by a 30;; particular pipe. Split the F pipe into two units so that integer 31;; instructions can issue while the FPU is busy. We don't need to 32;; split M because it is only ever reserved for a single cycle. 33(define_cpu_unit "rm9k_m" "rm9k_main") 34(define_cpu_unit "rm9k_f_int" "rm9k_main") 35(define_cpu_unit "rm9k_f_float" "rm9k_main") 36 37(exclusion_set "rm9k_f_int" "rm9k_f_float") 38 39;; Multiply/divide units. 40(define_cpu_unit "rm9k_imul" "rm9k_imul") 41(define_cpu_unit "rm9k_fdiv" "rm9k_fdiv") 42 43(define_insn_reservation "rm9k_load" 3 44 (and (eq_attr "cpu" "r9000") 45 (eq_attr "type" "load,fpload,fpidxload")) 46 "rm9k_m") 47 48(define_insn_reservation "rm9k_store" 1 49 (and (eq_attr "cpu" "r9000") 50 (eq_attr "type" "store,fpstore,fpidxstore")) 51 "rm9k_m") 52 53(define_insn_reservation "rm9k_int" 1 54 (and (eq_attr "cpu" "r9000") 55 (eq_attr "type" "arith,shift,slt,clz,const,nop,trap")) 56 "rm9k_any1 | rm9k_any2") 57 58(define_insn_reservation "rm9k_int_cmove" 2 59 (and (eq_attr "cpu" "r9000") 60 (and (eq_attr "type" "condmove") 61 (eq_attr "mode" "SI,DI"))) 62 "rm9k_any1 | rm9k_any2") 63 64;; This applies to both 'mul' and 'mult'. 65(define_insn_reservation "rm9k_mulsi" 3 66 (and (eq_attr "cpu" "r9000") 67 (and (eq_attr "type" "imul,imul3,imadd") 68 (eq_attr "mode" "!DI"))) 69 "rm9k_f_int") 70 71(define_insn_reservation "rm9k_muldi" 7 72 (and (eq_attr "cpu" "r9000") 73 (and (eq_attr "type" "imul,imul3,imadd") 74 (eq_attr "mode" "DI"))) 75 "rm9k_f_int + rm9k_imul * 7") 76 77(define_insn_reservation "rm9k_divsi" 38 78 (and (eq_attr "cpu" "r9000") 79 (and (eq_attr "type" "idiv") 80 (eq_attr "mode" "!DI"))) 81 "rm9k_f_int + rm9k_imul * 38") 82 83(define_insn_reservation "rm9k_divdi" 70 84 (and (eq_attr "cpu" "r9000") 85 (and (eq_attr "type" "idiv") 86 (eq_attr "mode" "DI"))) 87 "rm9k_f_int + rm9k_imul * 70") 88 89(define_insn_reservation "rm9k_mfhilo" 1 90 (and (eq_attr "cpu" "r9000") 91 (eq_attr "type" "mfhilo")) 92 "rm9k_f_int") 93 94(define_insn_reservation "rm9k_mthilo" 5 95 (and (eq_attr "cpu" "r9000") 96 (eq_attr "type" "mthilo")) 97 "rm9k_f_int") 98 99(define_insn_reservation "rm9k_xfer" 2 100 (and (eq_attr "cpu" "r9000") 101 (eq_attr "type" "xfer")) 102 "rm9k_m") 103 104(define_insn_reservation "rm9k_fquick" 2 105 (and (eq_attr "cpu" "r9000") 106 (eq_attr "type" "fabs,fneg,fcmp,fmove")) 107 "rm9k_f_float") 108 109(define_insn_reservation "rm9k_fcmove" 2 110 (and (eq_attr "cpu" "r9000") 111 (and (eq_attr "type" "condmove") 112 (eq_attr "mode" "SF,DF"))) 113 "rm9k_m") 114 115(define_insn_reservation "rm9k_fadd" 6 116 (and (eq_attr "cpu" "r9000") 117 (eq_attr "type" "fadd,fcvt")) 118 "rm9k_f_float") 119 120(define_insn_reservation "rm9k_fmuls" 6 121 (and (eq_attr "cpu" "r9000") 122 (and (eq_attr "type" "fmul,fmadd") 123 (eq_attr "mode" "SF"))) 124 "rm9k_f_float") 125 126(define_insn_reservation "rm9k_fmuld" 9 127 (and (eq_attr "cpu" "r9000") 128 (and (eq_attr "type" "fmul,fmadd") 129 (eq_attr "mode" "DF"))) 130 "rm9k_f_float * 3") 131 132(define_insn_reservation "rm9k_fdivs" 22 133 (and (eq_attr "cpu" "r9000") 134 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") 135 (eq_attr "mode" "SF"))) 136 "rm9k_f_float + rm9k_fdiv * 22") 137 138(define_insn_reservation "rm9k_fdivd" 37 139 (and (eq_attr "cpu" "r9000") 140 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") 141 (eq_attr "mode" "DF"))) 142 "rm9k_f_float + rm9k_fdiv * 37") 143 144(define_insn_reservation "rm9k_branch" 2 145 (and (eq_attr "cpu" "r9000") 146 (eq_attr "type" "branch,jump,call")) 147 "rm9k_any1 | rm9k_any2") 148 149(define_insn_reservation "rm9k_unknown" 1 150 (and (eq_attr "cpu" "r9000") 151 (eq_attr "type" "unknown,multi")) 152 "rm9k_m + rm9k_f_int + rm9k_any1 + rm9k_any2") 153