4600.md revision 169690
1;; R4600 and R4650 pipeline description. 2;; Copyright (C) 2004, 2005 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5 6;; GCC is free software; you can redistribute it and/or modify it 7;; under the terms of the GNU General Public License as published 8;; by the Free Software Foundation; either version 2, or (at your 9;; option) any later version. 10 11;; GCC is distributed in the hope that it will be useful, but WITHOUT 12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14;; License for more details. 15 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING. If not, write to the 18;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 19;; MA 02110-1301, USA. 20 21 22;; This file overrides parts of generic.md. It is derived from the 23;; old define_function_unit description. 24;; 25;; We handle the R4600 and R4650 in much the same way. The only difference 26;; is in the integer multiplication and division costs. 27 28(define_insn_reservation "r4600_imul" 10 29 (and (eq_attr "cpu" "r4600") 30 (eq_attr "type" "imul,imul3,imadd")) 31 "imuldiv*10") 32 33(define_insn_reservation "r4600_idiv" 42 34 (and (eq_attr "cpu" "r4600") 35 (eq_attr "type" "idiv")) 36 "imuldiv*42") 37 38 39(define_insn_reservation "r4650_imul" 4 40 (and (eq_attr "cpu" "r4650") 41 (eq_attr "type" "imul,imul3,imadd")) 42 "imuldiv*4") 43 44(define_insn_reservation "r4650_idiv" 36 45 (and (eq_attr "cpu" "r4650") 46 (eq_attr "type" "idiv")) 47 "imuldiv*36") 48 49 50(define_insn_reservation "r4600_load" 2 51 (and (eq_attr "cpu" "r4600,r4650") 52 (eq_attr "type" "load,fpload,fpidxload")) 53 "alu") 54 55(define_insn_reservation "r4600_fmove" 1 56 (and (eq_attr "cpu" "r4600,r4650") 57 (eq_attr "type" "fabs,fneg,fmove")) 58 "alu") 59 60(define_insn_reservation "r4600_fmul_single" 8 61 (and (eq_attr "cpu" "r4600,r4650") 62 (and (eq_attr "type" "fmul,fmadd") 63 (eq_attr "mode" "SF"))) 64 "alu") 65 66(define_insn_reservation "r4600_fdiv_single" 32 67 (and (eq_attr "cpu" "r4600,r4650") 68 (and (eq_attr "type" "fdiv,frdiv") 69 (eq_attr "mode" "SF"))) 70 "alu") 71 72(define_insn_reservation "r4600_fdiv_double" 61 73 (and (eq_attr "cpu" "r4600,r4650") 74 (and (eq_attr "type" "fdiv,frdiv") 75 (eq_attr "mode" "DF"))) 76 "alu") 77 78(define_insn_reservation "r4600_fsqrt_single" 31 79 (and (eq_attr "cpu" "r4600,r4650") 80 (and (eq_attr "type" "fsqrt,frsqrt") 81 (eq_attr "mode" "SF"))) 82 "alu") 83 84(define_insn_reservation "r4600_fsqrt_double" 60 85 (and (eq_attr "cpu" "r4600,r4650") 86 (and (eq_attr "type" "fsqrt,frsqrt") 87 (eq_attr "mode" "DF"))) 88 "alu") 89