4100.md revision 169689
1152830Sdavidxu;; VR4100 and VR4120 pipeline description. 2152830Sdavidxu;; Copyright (C) 2004, 2005 Free Software Foundation, Inc. 3152830Sdavidxu;; 4152830Sdavidxu;; This file is part of GCC. 5152830Sdavidxu 6152830Sdavidxu;; GCC is free software; you can redistribute it and/or modify it 7152830Sdavidxu;; under the terms of the GNU General Public License as published 8152830Sdavidxu;; by the Free Software Foundation; either version 2, or (at your 9152830Sdavidxu;; option) any later version. 10152830Sdavidxu 11152830Sdavidxu;; GCC is distributed in the hope that it will be useful, but WITHOUT 12152830Sdavidxu;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13152830Sdavidxu;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14152830Sdavidxu;; License for more details. 15152830Sdavidxu 16152830Sdavidxu;; You should have received a copy of the GNU General Public License 17152830Sdavidxu;; along with GCC; see the file COPYING. If not, write to the 18152830Sdavidxu;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 19152830Sdavidxu;; MA 02110-1301, USA. 20152830Sdavidxu 21152830Sdavidxu 22152830Sdavidxu;; This file overrides parts of generic.md. It is derived from the 23152830Sdavidxu;; old define_function_unit description. 24152830Sdavidxu 25152830Sdavidxu(define_insn_reservation "r4100_load" 2 26152830Sdavidxu (and (eq_attr "cpu" "r4100,r4120") 27152830Sdavidxu (eq_attr "type" "load,fpload,fpidxload,xfer")) 28152830Sdavidxu "alu") 29152830Sdavidxu 30152830Sdavidxu(define_insn_reservation "r4100_imul_si" 1 31152830Sdavidxu (and (eq_attr "cpu" "r4100,r4120") 32152950Sdavidxu (and (eq_attr "type" "imul,imul3,imadd") 33152830Sdavidxu (eq_attr "mode" "SI"))) 34152830Sdavidxu "imuldiv") 35152830Sdavidxu 36152830Sdavidxu(define_insn_reservation "r4100_imul_di" 4 37152830Sdavidxu (and (eq_attr "cpu" "r4100,r4120") 38152830Sdavidxu (and (eq_attr "type" "imul,imul3,imadd") 39152950Sdavidxu (eq_attr "mode" "DI"))) 40152830Sdavidxu "imuldiv*4") 41152830Sdavidxu 42152830Sdavidxu(define_insn_reservation "r4100_idiv_si" 35 43152830Sdavidxu (and (eq_attr "cpu" "r4100,r4120") 44152830Sdavidxu (and (eq_attr "type" "idiv") 45152830Sdavidxu (eq_attr "mode" "SI"))) 46152830Sdavidxu "imuldiv*35") 47152830Sdavidxu 48152830Sdavidxu(define_insn_reservation "r4100_idiv_di" 67 49152830Sdavidxu (and (eq_attr "cpu" "r4100,r4120") 50152830Sdavidxu (and (eq_attr "type" "idiv") 51152830Sdavidxu (eq_attr "mode" "DI"))) 52152830Sdavidxu "imuldiv*67") 53152950Sdavidxu