netbsd-elf.h revision 117395
1/* Definitions of target machine for GNU compiler, NetBSD/arm ELF version. 2 Copyright (C) 2002 Free Software Foundation, Inc. 3 Contributed by Wasabi Systems, Inc. 4 5This file is part of GNU CC. 6 7GNU CC is free software; you can redistribute it and/or modify 8it under the terms of the GNU General Public License as published by 9the Free Software Foundation; either version 2, or (at your option) 10any later version. 11 12GNU CC is distributed in the hope that it will be useful, 13but WITHOUT ANY WARRANTY; without even the implied warranty of 14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15GNU General Public License for more details. 16 17You should have received a copy of the GNU General Public License 18along with GNU CC; see the file COPYING. If not, write to 19the Free Software Foundation, 59 Temple Place - Suite 330, 20Boston, MA 02111-1307, USA. */ 21 22/* Run-time Target Specification. */ 23#undef TARGET_VERSION 24#define TARGET_VERSION fputs (" (NetBSD/arm ELF)", stderr); 25 26/* This is used in ASM_FILE_START. */ 27#undef ARM_OS_NAME 28#define ARM_OS_NAME "NetBSD" 29 30/* arm.h defaults to ARM6 CPU. */ 31 32/* This defaults us to little-endian. */ 33#ifndef TARGET_ENDIAN_DEFAULT 34#define TARGET_ENDIAN_DEFAULT 0 35#endif 36 37#undef MULTILIB_DEFAULTS 38 39/* Default it to use ATPCS with soft-VFP. */ 40#undef TARGET_DEFAULT 41#define TARGET_DEFAULT \ 42 (ARM_FLAG_APCS_32 \ 43 | ARM_FLAG_SOFT_FLOAT \ 44 | ARM_FLAG_APCS_FRAME \ 45 | ARM_FLAG_ATPCS \ 46 | ARM_FLAG_VFP \ 47 | ARM_FLAG_MMU_TRAPS \ 48 | TARGET_ENDIAN_DEFAULT) 49 50#define TARGET_OS_CPP_BUILTINS() \ 51 do \ 52 { \ 53 NETBSD_OS_CPP_BUILTINS_ELF(); \ 54 } \ 55 while (0) 56 57#undef SUBTARGET_CPP_SPEC 58#define SUBTARGET_CPP_SPEC NETBSD_CPP_SPEC 59 60#undef SUBTARGET_EXTRA_ASM_SPEC 61#define SUBTARGET_EXTRA_ASM_SPEC \ 62 "-matpcs %{fpic:-k} %{fPIC:-k}" 63 64/* Default floating point model is soft-VFP. 65 FIXME: -mhard-float currently implies FPA. */ 66#undef SUBTARGET_ASM_FLOAT_SPEC 67#define SUBTARGET_ASM_FLOAT_SPEC \ 68 "%{mhard-float:-mfpu=fpa} \ 69 %{msoft-float:-mfpu=softvfp} \ 70 %{!mhard-float: \ 71 %{!msoft-float:-mfpu=softvfp}}" 72 73#undef SUBTARGET_EXTRA_SPECS 74#define SUBTARGET_EXTRA_SPECS \ 75 { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \ 76 { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \ 77 { "netbsd_link_spec", NETBSD_LINK_SPEC_ELF }, \ 78 { "netbsd_entry_point", NETBSD_ENTRY_POINT }, 79 80#define NETBSD_ENTRY_POINT "__start" 81 82#undef LINK_SPEC 83#define LINK_SPEC \ 84 "-X %{mbig-endian:-EB} %{mlittle-endian:-EL} \ 85 %(netbsd_link_spec)" 86 87/* Make GCC agree with <machine/ansi.h>. */ 88 89#undef SIZE_TYPE 90#define SIZE_TYPE "long unsigned int" 91 92#undef PTRDIFF_TYPE 93#define PTRDIFF_TYPE "long int" 94 95/* We don't have any limit on the length as out debugger is GDB. */ 96#undef DBX_CONTIN_LENGTH 97 98/* NetBSD does its profiling differently to the Acorn compiler. We 99 don't need a word following the mcount call; and to skip it 100 requires either an assembly stub or use of fomit-frame-pointer when 101 compiling the profiling functions. Since we break Acorn CC 102 compatibility below a little more won't hurt. */ 103 104#undef ARM_FUNCTION_PROFILER 105#define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \ 106{ \ 107 asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n"); \ 108 asm_fprintf (STREAM, "\tbl\t__mcount%s\n", \ 109 NEED_PLT_RELOC ? "(PLT)" : ""); \ 110} 111 112/* VERY BIG NOTE: Change of structure alignment for NetBSD/arm. 113 There are consequences you should be aware of... 114 115 Normally GCC/arm uses a structure alignment of 32 for compatibility 116 with armcc. This means that structures are padded to a word 117 boundary. However this causes problems with bugged NetBSD kernel 118 code (possibly userland code as well - I have not checked every 119 binary). The nature of this bugged code is to rely on sizeof() 120 returning the correct size of various structures rounded to the 121 nearest byte (SCSI and ether code are two examples, the vm system 122 is another). This code breaks when the structure alignment is 32 123 as sizeof() will report a word=rounded size. By changing the 124 structure alignment to 8. GCC will conform to what is expected by 125 NetBSD. 126 127 This has several side effects that should be considered. 128 1. Structures will only be aligned to the size of the largest member. 129 i.e. structures containing only bytes will be byte aligned. 130 structures containing shorts will be half word alinged. 131 structures containing ints will be word aligned. 132 133 This means structures should be padded to a word boundary if 134 alignment of 32 is required for byte structures etc. 135 136 2. A potential performance penalty may exist if strings are no longer 137 word aligned. GCC will not be able to use word load/stores to copy 138 short strings. 139 140 This modification is not encouraged but with the present state of the 141 NetBSD source tree it is currently the only solution that meets the 142 requirements. */ 143 144#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY 145#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8 146 147/* Emit code to set up a trampoline and synchronize the caches. */ 148#undef INITIALIZE_TRAMPOLINE 149#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 150do \ 151 { \ 152 emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \ 153 (CXT)); \ 154 emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \ 155 (FNADDR)); \ 156 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \ 157 0, VOIDmode, 2, TRAMP, Pmode, \ 158 plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \ 159 } \ 160while (0) 161 162/* Clear the instruction cache from `BEG' to `END'. This makes a 163 call to the ARM_SYNC_ICACHE architecture specific syscall. */ 164#define CLEAR_INSN_CACHE(BEG, END) \ 165do \ 166 { \ 167 extern int sysarch(int number, void *args); \ 168 struct \ 169 { \ 170 unsigned int addr; \ 171 int len; \ 172 } s; \ 173 s.addr = (unsigned int)(BEG); \ 174 s.len = (END) - (BEG); \ 175 (void) sysarch (0, &s); \ 176 } \ 177while (0) 178