netbsd-elf.h revision 132718
1/* Definitions of target machine for GNU compiler, NetBSD/arm ELF version. 2 Copyright (C) 2002, 2003 Free Software Foundation, Inc. 3 Contributed by Wasabi Systems, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 2, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to 19 the Free Software Foundation, 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22/* Run-time Target Specification. */ 23#undef TARGET_VERSION 24#define TARGET_VERSION fputs (" (NetBSD/arm ELF)", stderr); 25 26/* arm.h defaults to ARM6 CPU. */ 27 28/* This defaults us to little-endian. */ 29#ifndef TARGET_ENDIAN_DEFAULT 30#define TARGET_ENDIAN_DEFAULT 0 31#endif 32 33#undef MULTILIB_DEFAULTS 34 35/* Default it to use ATPCS with soft-VFP. */ 36#undef TARGET_DEFAULT 37#define TARGET_DEFAULT \ 38 (ARM_FLAG_APCS_32 \ 39 | ARM_FLAG_SOFT_FLOAT \ 40 | ARM_FLAG_APCS_FRAME \ 41 | ARM_FLAG_ATPCS \ 42 | ARM_FLAG_VFP \ 43 | ARM_FLAG_MMU_TRAPS \ 44 | TARGET_ENDIAN_DEFAULT) 45 46#define TARGET_OS_CPP_BUILTINS() \ 47 do \ 48 { \ 49 NETBSD_OS_CPP_BUILTINS_ELF(); \ 50 } \ 51 while (0) 52 53#undef SUBTARGET_CPP_SPEC 54#define SUBTARGET_CPP_SPEC NETBSD_CPP_SPEC 55 56#undef SUBTARGET_EXTRA_ASM_SPEC 57#define SUBTARGET_EXTRA_ASM_SPEC \ 58 "-matpcs %{fpic|fpie:-k} %{fPIC|fPIE:-k}" 59 60/* Default floating point model is soft-VFP. 61 FIXME: -mhard-float currently implies FPA. */ 62#undef SUBTARGET_ASM_FLOAT_SPEC 63#define SUBTARGET_ASM_FLOAT_SPEC \ 64 "%{mhard-float:-mfpu=fpa} \ 65 %{msoft-float:-mfpu=softvfp} \ 66 %{!mhard-float: \ 67 %{!msoft-float:-mfpu=softvfp}}" 68 69#undef SUBTARGET_EXTRA_SPECS 70#define SUBTARGET_EXTRA_SPECS \ 71 { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \ 72 { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \ 73 { "netbsd_link_spec", NETBSD_LINK_SPEC_ELF }, \ 74 { "netbsd_entry_point", NETBSD_ENTRY_POINT }, 75 76#define NETBSD_ENTRY_POINT "__start" 77 78#undef LINK_SPEC 79#define LINK_SPEC \ 80 "-X %{mbig-endian:-EB} %{mlittle-endian:-EL} \ 81 %(netbsd_link_spec)" 82 83/* Make GCC agree with <machine/ansi.h>. */ 84 85#undef SIZE_TYPE 86#define SIZE_TYPE "long unsigned int" 87 88#undef PTRDIFF_TYPE 89#define PTRDIFF_TYPE "long int" 90 91/* We don't have any limit on the length as out debugger is GDB. */ 92#undef DBX_CONTIN_LENGTH 93 94/* NetBSD does its profiling differently to the Acorn compiler. We 95 don't need a word following the mcount call; and to skip it 96 requires either an assembly stub or use of fomit-frame-pointer when 97 compiling the profiling functions. Since we break Acorn CC 98 compatibility below a little more won't hurt. */ 99 100#undef ARM_FUNCTION_PROFILER 101#define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \ 102{ \ 103 asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n"); \ 104 asm_fprintf (STREAM, "\tbl\t__mcount%s\n", \ 105 NEED_PLT_RELOC ? "(PLT)" : ""); \ 106} 107 108/* VERY BIG NOTE: Change of structure alignment for NetBSD/arm. 109 There are consequences you should be aware of... 110 111 Normally GCC/arm uses a structure alignment of 32 for compatibility 112 with armcc. This means that structures are padded to a word 113 boundary. However this causes problems with bugged NetBSD kernel 114 code (possibly userland code as well - I have not checked every 115 binary). The nature of this bugged code is to rely on sizeof() 116 returning the correct size of various structures rounded to the 117 nearest byte (SCSI and ether code are two examples, the vm system 118 is another). This code breaks when the structure alignment is 32 119 as sizeof() will report a word=rounded size. By changing the 120 structure alignment to 8. GCC will conform to what is expected by 121 NetBSD. 122 123 This has several side effects that should be considered. 124 1. Structures will only be aligned to the size of the largest member. 125 i.e. structures containing only bytes will be byte aligned. 126 structures containing shorts will be half word aligned. 127 structures containing ints will be word aligned. 128 129 This means structures should be padded to a word boundary if 130 alignment of 32 is required for byte structures etc. 131 132 2. A potential performance penalty may exist if strings are no longer 133 word aligned. GCC will not be able to use word load/stores to copy 134 short strings. 135 136 This modification is not encouraged but with the present state of the 137 NetBSD source tree it is currently the only solution that meets the 138 requirements. */ 139 140#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY 141#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8 142 143/* Emit code to set up a trampoline and synchronize the caches. */ 144#undef INITIALIZE_TRAMPOLINE 145#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 146do \ 147 { \ 148 emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \ 149 (CXT)); \ 150 emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \ 151 (FNADDR)); \ 152 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \ 153 0, VOIDmode, 2, TRAMP, Pmode, \ 154 plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \ 155 } \ 156while (0) 157 158/* Clear the instruction cache from `BEG' to `END'. This makes a 159 call to the ARM_SYNC_ICACHE architecture specific syscall. */ 160#define CLEAR_INSN_CACHE(BEG, END) \ 161do \ 162 { \ 163 extern int sysarch(int number, void *args); \ 164 struct \ 165 { \ 166 unsigned int addr; \ 167 int len; \ 168 } s; \ 169 s.addr = (unsigned int)(BEG); \ 170 s.len = (END) - (BEG); \ 171 (void) sysarch (0, &s); \ 172 } \ 173while (0) 174