itbl-ops.c revision 33965
1/* itbl-ops.c 2 Copyright (C) 1997 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to the Free 18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 19 02111-1307, USA. */ 20 21/*======================================================================*/ 22/* 23 * Herein lies the support for dynamic specification of processor 24 * instructions and registers. Mnemonics, values, and formats for each 25 * instruction and register are specified in an ascii file consisting of 26 * table entries. The grammar for the table is defined in the document 27 * "Processor instruction table specification". 28 * 29 * Instructions use the gnu assembler syntax, with the addition of 30 * allowing mnemonics for register. 31 * Eg. "func $2,reg3,0x100,symbol ; comment" 32 * func - opcode name 33 * $n - register n 34 * reg3 - mnemonic for processor's register defined in table 35 * 0xddd..d - immediate value 36 * symbol - address of label or external symbol 37 * 38 * First, itbl_parse reads in the table of register and instruction 39 * names and formats, and builds a list of entries for each 40 * processor/type combination. lex and yacc are used to parse 41 * the entries in the table and call functions defined here to 42 * add each entry to our list. 43 * 44 * Then, when assembling or disassembling, these functions are called to 45 * 1) get information on a processor's registers and 46 * 2) assemble/disassemble an instruction. 47 * To assemble(disassemble) an instruction, the function 48 * itbl_assemble(itbl_disassemble) is called to search the list of 49 * instruction entries, and if a match is found, uses the format 50 * described in the instruction entry structure to complete the action. 51 * 52 * Eg. Suppose we have a Mips coprocessor "cop3" with data register "d2" 53 * and we want to define function "pig" which takes two operands. 54 * 55 * Given the table entries: 56 * "p3 insn pig 0x1:24-21 dreg:20-16 immed:15-0" 57 * "p3 dreg d2 0x2" 58 * and that the instruction encoding for coprocessor pz has encoding: 59 * #define MIPS_ENCODE_COP_NUM(z) ((0x21|(z<<1))<<25) 60 * #define ITBL_ENCODE_PNUM(pnum) MIPS_ENCODE_COP_NUM(pnum) 61 * 62 * a structure to describe the instruction might look something like: 63 * struct itbl_entry = { 64 * e_processor processor = e_p3 65 * e_type type = e_insn 66 * char *name = "pig" 67 * uint value = 0x1 68 * uint flags = 0 69 * struct itbl_range range = 24-21 70 * struct itbl_field *field = { 71 * e_type type = e_dreg 72 * struct itbl_range range = 20-16 73 * struct itbl_field *next = { 74 * e_type type = e_immed 75 * struct itbl_range range = 15-0 76 * struct itbl_field *next = 0 77 * }; 78 * }; 79 * struct itbl_entry *next = 0 80 * }; 81 * 82 * And the assembler instructions: 83 * "pig d2,0x100" 84 * "pig $2,0x100" 85 * 86 * would both assemble to the hex value: 87 * "0x4e220100" 88 * 89 */ 90 91#include <stdio.h> 92#include <stdlib.h> 93#include <string.h> 94#include "itbl-ops.h" 95#include "itbl-parse.h" 96 97/* #define DEBUG */ 98 99#ifdef DEBUG 100#include <assert.h> 101#define ASSERT(x) assert(x) 102#define DBG(x) printf x 103#else 104#define ASSERT(x) 105#define DBG(x) 106#endif 107 108#ifndef min 109#define min(a,b) (a<b?a:b) 110#endif 111 112int itbl_have_entries = 0; 113 114/*======================================================================*/ 115/* structures for keeping itbl format entries */ 116 117struct itbl_range 118 { 119 int sbit; /* mask starting bit position */ 120 int ebit; /* mask ending bit position */ 121 }; 122 123struct itbl_field 124 { 125 e_type type; /* dreg/creg/greg/immed/symb */ 126 struct itbl_range range; /* field's bitfield range within instruction */ 127 unsigned long flags; /* field flags */ 128 struct itbl_field *next; /* next field in list */ 129 }; 130 131 132/* These structures define the instructions and registers for a processor. 133 * If the type is an instruction, the structure defines the format of an 134 * instruction where the fields are the list of operands. 135 * The flags field below uses the same values as those defined in the 136 * gnu assembler and are machine specific. */ 137struct itbl_entry 138 { 139 e_processor processor; /* processor number */ 140 e_type type; /* dreg/creg/greg/insn */ 141 char *name; /* mnemionic name for insn/register */ 142 unsigned long value; /* opcode/instruction mask/register number */ 143 unsigned long flags; /* effects of the instruction */ 144 struct itbl_range range; /* bit range within instruction for value */ 145 struct itbl_field *fields; /* list of operand definitions (if any) */ 146 struct itbl_entry *next; /* next entry */ 147 }; 148 149 150/* local data and structures */ 151 152static int itbl_num_opcodes = 0; 153/* Array of entries for each processor and entry type */ 154static struct itbl_entry *entries[e_nprocs][e_ntypes] = 155{ 156 {0, 0, 0, 0, 0, 0}, 157 {0, 0, 0, 0, 0, 0}, 158 {0, 0, 0, 0, 0, 0}, 159 {0, 0, 0, 0, 0, 0} 160}; 161 162/* local prototypes */ 163static unsigned long build_opcode PARAMS ((struct itbl_entry *e)); 164static e_type get_type PARAMS ((int yytype)); 165static e_processor get_processor PARAMS ((int yyproc)); 166static struct itbl_entry **get_entries PARAMS ((e_processor processor, 167 e_type type)); 168static struct itbl_entry *find_entry_byname PARAMS ((e_processor processor, 169 e_type type, char *name)); 170static struct itbl_entry *find_entry_byval PARAMS ((e_processor processor, 171 e_type type, unsigned long val, struct itbl_range *r)); 172static struct itbl_entry *alloc_entry PARAMS ((e_processor processor, 173 e_type type, char *name, unsigned long value)); 174static unsigned long apply_range PARAMS ((unsigned long value, 175 struct itbl_range r)); 176static unsigned long extract_range PARAMS ((unsigned long value, 177 struct itbl_range r)); 178static struct itbl_field *alloc_field PARAMS ((e_type type, int sbit, 179 int ebit, unsigned long flags)); 180 181 182/*======================================================================*/ 183/* Interfaces to the parser */ 184 185 186/* Open the table and use lex and yacc to parse the entries. 187 * Return 1 for failure; 0 for success. */ 188 189int 190itbl_parse (char *insntbl) 191{ 192 extern FILE *yyin; 193 extern int yyparse (void); 194 yyin = fopen (insntbl, "r"); 195 if (yyin == 0) 196 { 197 printf ("Can't open processor instruction specification file \"%s\"\n", 198 insntbl); 199 return 1; 200 } 201 else 202 { 203 while (yyparse ()); 204 } 205 fclose (yyin); 206 itbl_have_entries = 1; 207 return 0; 208} 209 210/* Add a register entry */ 211 212struct itbl_entry * 213itbl_add_reg (int yyprocessor, int yytype, char *regname, 214 int regnum) 215{ 216#if 0 217#include "as.h" 218#include "symbols.h" 219 /* Since register names don't have a prefix, we put them in the symbol table so 220 they can't be used as symbols. This also simplifies argument parsing as 221 we can let gas parse registers for us. The recorded register number is 222 regnum. */ 223 /* Use symbol_create here instead of symbol_new so we don't try to 224 output registers into the object file's symbol table. */ 225 symbol_table_insert (symbol_create (regname, reg_section, 226 regnum, &zero_address_frag)); 227#endif 228 return alloc_entry (get_processor (yyprocessor), get_type (yytype), regname, 229 (unsigned long) regnum); 230} 231 232/* Add an instruction entry */ 233 234struct itbl_entry * 235itbl_add_insn (int yyprocessor, char *name, unsigned long value, 236 int sbit, int ebit, unsigned long flags) 237{ 238 struct itbl_entry *e; 239 e = alloc_entry (get_processor (yyprocessor), e_insn, name, value); 240 if (e) 241 { 242 e->range.sbit = sbit; 243 e->range.ebit = ebit; 244 e->flags = flags; 245 itbl_num_opcodes++; 246 } 247 return e; 248} 249 250/* Add an operand to an instruction entry */ 251 252struct itbl_field * 253itbl_add_operand (struct itbl_entry *e, int yytype, int sbit, 254 int ebit, unsigned long flags) 255{ 256 struct itbl_field *f, **last_f; 257 if (!e) 258 return 0; 259 /* Add to end of fields' list. */ 260 f = alloc_field (get_type (yytype), sbit, ebit, flags); 261 if (f) 262 { 263 last_f = &e->fields; 264 while (*last_f) 265 last_f = &(*last_f)->next; 266 *last_f = f; 267 f->next = 0; 268 } 269 return f; 270} 271 272 273/*======================================================================*/ 274/* Interfaces for assembler and disassembler */ 275 276#ifndef STAND_ALONE 277#include "as.h" 278#include "symbols.h" 279static void append_insns_as_macros (void); 280 281/* initialize for gas */ 282void 283itbl_init (void) 284{ 285 struct itbl_entry *e, **es; 286 e_processor procn; 287 e_type type; 288 289 if (!itbl_have_entries) 290 return; 291 292 /* Since register names don't have a prefix, put them in the symbol table so 293 they can't be used as symbols. This simplifies argument parsing as 294 we can let gas parse registers for us. */ 295 /* Use symbol_create instead of symbol_new so we don't try to 296 output registers into the object file's symbol table. */ 297 298 for (type = e_regtype0; type < e_nregtypes; type++) 299 for (procn = e_p0; procn < e_nprocs; procn++) 300 { 301 es = get_entries (procn, type); 302 for (e = *es; e; e = e->next) 303 { 304 symbol_table_insert (symbol_create (e->name, reg_section, 305 e->value, &zero_address_frag)); 306 } 307 } 308 append_insns_as_macros (); 309} 310 311 312/* Append insns to opcodes table and increase number of opcodes 313 * Structure of opcodes table: 314 * struct itbl_opcode 315 * { 316 * const char *name; 317 * const char *args; - string describing the arguments. 318 * unsigned long match; - opcode, or ISA level if pinfo=INSN_MACRO 319 * unsigned long mask; - opcode mask, or macro id if pinfo=INSN_MACRO 320 * unsigned long pinfo; - insn flags, or INSN_MACRO 321 * }; 322 * examples: 323 * {"li", "t,i", 0x34000000, 0xffe00000, WR_t }, 324 * {"li", "t,I", 0, (int) M_LI, INSN_MACRO }, 325 */ 326 327static char *form_args (struct itbl_entry *e); 328static void 329append_insns_as_macros (void) 330{ 331 struct ITBL_OPCODE_STRUCT *new_opcodes, *o; 332 struct itbl_entry *e, **es; 333 int n, id, size, new_size, new_num_opcodes; 334 335 if (!itbl_have_entries) 336 return; 337 338 if (!itbl_num_opcodes) /* no new instructions to add! */ 339 { 340 return; 341 } 342 DBG (("previous num_opcodes=%d\n", ITBL_NUM_OPCODES)); 343 344 new_num_opcodes = ITBL_NUM_OPCODES + itbl_num_opcodes; 345 ASSERT (new_num_opcodes >= itbl_num_opcodes); 346 347 size = sizeof (struct ITBL_OPCODE_STRUCT) * ITBL_NUM_OPCODES; 348 ASSERT (size >= 0); 349 DBG (("I get=%d\n", size / sizeof (ITBL_OPCODES[0]))); 350 351 new_size = sizeof (struct ITBL_OPCODE_STRUCT) * new_num_opcodes; 352 ASSERT (new_size > size); 353 354 /* FIXME since ITBL_OPCODES culd be a static table, 355 we can't realloc or delete the old memory. */ 356 new_opcodes = (struct ITBL_OPCODE_STRUCT *) malloc (new_size); 357 if (!new_opcodes) 358 { 359 printf ("Unable to allocate memory for new instructions\n"); 360 return; 361 } 362 if (size) /* copy prexisting opcodes table */ 363 memcpy (new_opcodes, ITBL_OPCODES, size); 364 365 /* FIXME! some NUMOPCODES are calculated expressions. 366 These need to be changed before itbls can be supported. */ 367 368 id = ITBL_NUM_MACROS; /* begin the next macro id after the last */ 369 o = &new_opcodes[ITBL_NUM_OPCODES]; /* append macro to opcodes list */ 370 for (n = e_p0; n < e_nprocs; n++) 371 { 372 es = get_entries (n, e_insn); 373 for (e = *es; e; e = e->next) 374 { 375 /* name, args, mask, match, pinfo 376 * {"li", "t,i", 0x34000000, 0xffe00000, WR_t }, 377 * {"li", "t,I", 0, (int) M_LI, INSN_MACRO }, 378 * Construct args from itbl_fields. 379 */ 380 o->name = e->name; 381 o->args = strdup (form_args (e)); 382 o->mask = apply_range (e->value, e->range); 383 /* FIXME how to catch durring assembly? */ 384 /* mask to identify this insn */ 385 o->match = apply_range (e->value, e->range); 386 o->pinfo = 0; 387 388#ifdef USE_MACROS 389 o->mask = id++; /* FIXME how to catch durring assembly? */ 390 o->match = 0; /* for macros, the insn_isa number */ 391 o->pinfo = INSN_MACRO; 392#endif 393 394 /* Don't add instructions which caused an error */ 395 if (o->args) 396 o++; 397 else 398 new_num_opcodes--; 399 } 400 } 401 ITBL_OPCODES = new_opcodes; 402 ITBL_NUM_OPCODES = new_num_opcodes; 403 404 /* FIXME 405 At this point, we can free the entries, as they should have 406 been added to the assembler's tables. 407 Don't free name though, since name is being used by the new 408 opcodes table. 409 410 Eventually, we should also free the new opcodes table itself 411 on exit. 412 */ 413} 414 415static char * 416form_args (struct itbl_entry *e) 417{ 418 static char s[31]; 419 char c = 0, *p = s; 420 struct itbl_field *f; 421 422 ASSERT (e); 423 for (f = e->fields; f; f = f->next) 424 { 425 switch (f->type) 426 { 427 case e_dreg: 428 c = 'd'; 429 break; 430 case e_creg: 431 c = 't'; 432 break; 433 case e_greg: 434 c = 's'; 435 break; 436 case e_immed: 437 c = 'i'; 438 break; 439 case e_addr: 440 c = 'a'; 441 break; 442 default: 443 c = 0; /* ignore; unknown field type */ 444 } 445 if (c) 446 { 447 if (p != s) 448 *p++ = ','; 449 *p++ = c; 450 } 451 } 452 *p = 0; 453 return s; 454} 455#endif /* !STAND_ALONE */ 456 457 458/* Get processor's register name from val */ 459 460unsigned long 461itbl_get_reg_val (char *name) 462{ 463 e_type t; 464 e_processor p; 465 int r = 0; 466 for (p = e_p0; p < e_nprocs; p++) 467 for (t = e_regtype0; t < e_nregtypes; t++) 468 { 469 if (r = itbl_get_val (p, t, name), r) 470 return r; 471 } 472 return 0; 473} 474 475char * 476itbl_get_name (e_processor processor, e_type type, unsigned long val) 477{ 478 struct itbl_entry *r; 479 /* type depends on instruction passed */ 480 r = find_entry_byval (processor, type, val, 0); 481 if (r) 482 return r->name; 483 else 484 return 0; /* error; invalid operand */ 485} 486 487/* Get processor's register value from name */ 488 489unsigned long 490itbl_get_val (e_processor processor, e_type type, char *name) 491{ 492 struct itbl_entry *r; 493 /* type depends on instruction passed */ 494 r = find_entry_byname (processor, type, name); 495 if (r) 496 return r->value; 497 else 498 return 0; /* error; invalid operand */ 499} 500 501 502/* Assemble instruction "name" with operands "s". 503 * name - name of instruction 504 * s - operands 505 * returns - long word for assembled instruction */ 506 507unsigned long 508itbl_assemble (char *name, char *s) 509{ 510 unsigned long opcode; 511 struct itbl_entry *e; 512 struct itbl_field *f; 513 char *n; 514 int processor; 515 516 if (!name || !*name) 517 return 0; /* error! must have a opcode name/expr */ 518 519 /* find entry in list of instructions for all processors */ 520 for (processor = 0; processor < e_nprocs; processor++) 521 { 522 e = find_entry_byname (processor, e_insn, name); 523 if (e) 524 break; 525 } 526 if (!e) 527 return 0; /* opcode not in table; invalid instrustion */ 528 opcode = build_opcode (e); 529 530 /* parse opcode's args (if any) */ 531 for (f = e->fields; f; f = f->next) /* for each arg, ... */ 532 { 533 struct itbl_entry *r; 534 unsigned long value; 535 if (!s || !*s) 536 return 0; /* error - not enough operands */ 537 n = itbl_get_field (&s); 538 /* n should be in form $n or 0xhhh (are symbol names valid?? */ 539 switch (f->type) 540 { 541 case e_dreg: 542 case e_creg: 543 case e_greg: 544 /* Accept either a string name 545 * or '$' followed by the register number */ 546 if (*n == '$') 547 { 548 n++; 549 value = strtol (n, 0, 10); 550 /* FIXME! could have "0l"... then what?? */ 551 if (value == 0 && *n != '0') 552 return 0; /* error; invalid operand */ 553 } 554 else 555 { 556 r = find_entry_byname (e->processor, f->type, n); 557 if (r) 558 value = r->value; 559 else 560 return 0; /* error; invalid operand */ 561 } 562 break; 563 case e_addr: 564 /* use assembler's symbol table to find symbol */ 565 /* FIXME!! Do we need this? 566 if so, what about relocs?? 567 my_getExpression (&imm_expr, s); 568 return 0; /-* error; invalid operand *-/ 569 break; 570 */ 571 /* If not a symbol, fall thru to IMMED */ 572 case e_immed: 573 if (*n == '0' && *(n + 1) == 'x') /* hex begins 0x... */ 574 { 575 n += 2; 576 value = strtol (n, 0, 16); 577 /* FIXME! could have "0xl"... then what?? */ 578 } 579 else 580 { 581 value = strtol (n, 0, 10); 582 /* FIXME! could have "0l"... then what?? */ 583 if (value == 0 && *n != '0') 584 return 0; /* error; invalid operand */ 585 } 586 break; 587 default: 588 return 0; /* error; invalid field spec */ 589 } 590 opcode |= apply_range (value, f->range); 591 } 592 if (s && *s) 593 return 0; /* error - too many operands */ 594 return opcode; /* done! */ 595} 596 597/* Disassemble instruction "insn". 598 * insn - instruction 599 * s - buffer to hold disassembled instruction 600 * returns - 1 if succeeded; 0 if failed 601 */ 602 603int 604itbl_disassemble (char *s, unsigned long insn) 605{ 606 e_processor processor; 607 struct itbl_entry *e; 608 struct itbl_field *f; 609 610 if (!ITBL_IS_INSN (insn)) 611 return 0; /* error*/ 612 processor = get_processor (ITBL_DECODE_PNUM (insn)); 613 614 /* find entry in list */ 615 e = find_entry_byval (processor, e_insn, insn, 0); 616 if (!e) 617 return 0; /* opcode not in table; invalid instrustion */ 618 strcpy (s, e->name); 619 620 /* parse insn's args (if any) */ 621 for (f = e->fields; f; f = f->next) /* for each arg, ... */ 622 { 623 struct itbl_entry *r; 624 unsigned long value; 625 626 if (f == e->fields) /* first operand is preceeded by tab */ 627 strcat (s, "\t"); 628 else /* ','s separate following operands */ 629 strcat (s, ","); 630 value = extract_range (insn, f->range); 631 /* n should be in form $n or 0xhhh (are symbol names valid?? */ 632 switch (f->type) 633 { 634 case e_dreg: 635 case e_creg: 636 case e_greg: 637 /* Accept either a string name 638 * or '$' followed by the register number */ 639 r = find_entry_byval (e->processor, f->type, value, &f->range); 640 if (r) 641 strcat (s, r->name); 642 else 643 sprintf (s, "%s$%d", s, value); 644 break; 645 case e_addr: 646 /* use assembler's symbol table to find symbol */ 647 /* FIXME!! Do we need this? 648 * if so, what about relocs?? 649 */ 650 /* If not a symbol, fall thru to IMMED */ 651 case e_immed: 652 sprintf (s, "%s0x%x", s, value); 653 break; 654 default: 655 return 0; /* error; invalid field spec */ 656 } 657 } 658 return 1; /* done! */ 659} 660 661/*======================================================================*/ 662/* 663 * Local functions for manipulating private structures containing 664 * the names and format for the new instructions and registers 665 * for each processor. 666 */ 667 668/* Calculate instruction's opcode and function values from entry */ 669 670static unsigned long 671build_opcode (struct itbl_entry *e) 672{ 673 unsigned long opcode; 674 675 opcode = apply_range (e->value, e->range); 676 opcode |= ITBL_ENCODE_PNUM (e->processor); 677 return opcode; 678} 679 680/* Calculate absolute value given the relative value and bit position range 681 * within the instruction. 682 * The range is inclusive where 0 is least significant bit. 683 * A range of { 24, 20 } will have a mask of 684 * bit 3 2 1 685 * pos: 1098 7654 3210 9876 5432 1098 7654 3210 686 * bin: 0000 0001 1111 0000 0000 0000 0000 0000 687 * hex: 0 1 f 0 0 0 0 0 688 * mask: 0x01f00000. 689 */ 690 691static unsigned long 692apply_range (unsigned long rval, struct itbl_range r) 693{ 694 unsigned long mask; 695 unsigned long aval; 696 int len = MAX_BITPOS - r.sbit; 697 698 ASSERT (r.sbit >= r.ebit); 699 ASSERT (MAX_BITPOS >= r.sbit); 700 ASSERT (r.ebit >= 0); 701 702 /* create mask by truncating 1s by shifting */ 703 mask = 0xffffffff << len; 704 mask = mask >> len; 705 mask = mask >> r.ebit; 706 mask = mask << r.ebit; 707 708 aval = (rval << r.ebit) & mask; 709 return aval; 710} 711 712/* Calculate relative value given the absolute value and bit position range 713 * within the instruction. */ 714 715static unsigned long 716extract_range (unsigned long aval, struct itbl_range r) 717{ 718 unsigned long mask; 719 unsigned long rval; 720 int len = MAX_BITPOS - r.sbit; 721 722 /* create mask by truncating 1s by shifting */ 723 mask = 0xffffffff << len; 724 mask = mask >> len; 725 mask = mask >> r.ebit; 726 mask = mask << r.ebit; 727 728 rval = (aval & mask) >> r.ebit; 729 return rval; 730} 731 732/* Extract processor's assembly instruction field name from s; 733 * forms are "n args" "n,args" or "n" */ 734/* Return next argument from string pointer "s" and advance s. 735 * delimiters are " ,\0" */ 736 737char * 738itbl_get_field (char **S) 739{ 740 static char n[128]; 741 char *p, *ps, *s; 742 int len; 743 744 s = *S; 745 if (!s || !*s) 746 return 0; 747 p = s + strlen (s); 748 if (ps = strchr (s, ','), ps) 749 p = ps; 750 if (ps = strchr (s, ' '), ps) 751 p = min (p, ps); 752 if (ps = strchr (s, '\0'), ps) 753 p = min (p, ps); 754 if (p == 0) 755 return 0; /* error! */ 756 len = p - s; 757 ASSERT (128 > len + 1); 758 strncpy (n, s, len); 759 n[len] = 0; 760 if (s[len] == '\0') 761 s = 0; /* no more args */ 762 else 763 s += len + 1; /* advance to next arg */ 764 765 *S = s; 766 return n; 767} 768 769/* Search entries for a given processor and type 770 * to find one matching the name "n". 771 * Return a pointer to the entry */ 772 773static struct itbl_entry * 774find_entry_byname (e_processor processor, 775 e_type type, char *n) 776{ 777 struct itbl_entry *e, **es; 778 779 es = get_entries (processor, type); 780 for (e = *es; e; e = e->next) /* for each entry, ... */ 781 { 782 if (!strcmp (e->name, n)) 783 return e; 784 } 785 return 0; 786} 787 788/* Search entries for a given processor and type 789 * to find one matching the value "val" for the range "r". 790 * Return a pointer to the entry. 791 * This function is used for disassembling fields of an instruction. 792 */ 793 794static struct itbl_entry * 795find_entry_byval (e_processor processor, e_type type, 796 unsigned long val, struct itbl_range *r) 797{ 798 struct itbl_entry *e, **es; 799 unsigned long eval; 800 801 es = get_entries (processor, type); 802 for (e = *es; e; e = e->next) /* for each entry, ... */ 803 { 804 if (processor != e->processor) 805 continue; 806 /* For insns, we might not know the range of the opcode, 807 * so a range of 0 will allow this routine to match against 808 * the range of the entry to be compared with. 809 * This could cause ambiguities. 810 * For operands, we get an extracted value and a range. 811 */ 812 /* if range is 0, mask val against the range of the compared entry. */ 813 if (r == 0) /* if no range passed, must be whole 32-bits 814 * so create 32-bit value from entry's range */ 815 { 816 eval = apply_range (e->value, e->range); 817 val &= apply_range (0xffffffff, e->range); 818 } 819 else if (r->sbit == e->range.sbit && r->ebit == e->range.ebit 820 || e->range.sbit == 0 && e->range.ebit == 0) 821 { 822 eval = apply_range (e->value, *r); 823 val = apply_range (val, *r); 824 } 825 else 826 continue; 827 if (val == eval) 828 return e; 829 } 830 return 0; 831} 832 833/* Return a pointer to the list of entries for a given processor and type. */ 834 835static struct itbl_entry ** 836get_entries (e_processor processor, e_type type) 837{ 838 return &entries[processor][type]; 839} 840 841/* Return an integral value for the processor passed from yyparse. */ 842 843static e_processor 844get_processor (int yyproc) 845{ 846 /* translate from yacc's processor to enum */ 847 if (yyproc >= e_p0 && yyproc < e_nprocs) 848 return (e_processor) yyproc; 849 return e_invproc; /* error; invalid processor */ 850} 851 852/* Return an integral value for the entry type passed from yyparse. */ 853 854static e_type 855get_type (int yytype) 856{ 857 switch (yytype) 858 { 859 /* translate from yacc's type to enum */ 860 case INSN: 861 return e_insn; 862 case DREG: 863 return e_dreg; 864 case CREG: 865 return e_creg; 866 case GREG: 867 return e_greg; 868 case ADDR: 869 return e_addr; 870 case IMMED: 871 return e_immed; 872 default: 873 return e_invtype; /* error; invalid type */ 874 } 875} 876 877 878/* Allocate and initialize an entry */ 879 880static struct itbl_entry * 881alloc_entry (e_processor processor, e_type type, 882 char *name, unsigned long value) 883{ 884 struct itbl_entry *e, **es; 885 if (!name) 886 return 0; 887 e = (struct itbl_entry *) malloc (sizeof (struct itbl_entry)); 888 if (e) 889 { 890 memset (e, 0, sizeof (struct itbl_entry)); 891 e->name = (char *) malloc (sizeof (strlen (name)) + 1); 892 if (e->name) 893 strcpy (e->name, name); 894 e->processor = processor; 895 e->type = type; 896 e->value = value; 897 es = get_entries (e->processor, e->type); 898 e->next = *es; 899 *es = e; 900 } 901 return e; 902} 903 904/* Allocate and initialize an entry's field */ 905 906static struct itbl_field * 907alloc_field (e_type type, int sbit, int ebit, 908 unsigned long flags) 909{ 910 struct itbl_field *f; 911 f = (struct itbl_field *) malloc (sizeof (struct itbl_field)); 912 if (f) 913 { 914 memset (f, 0, sizeof (struct itbl_field)); 915 f->type = type; 916 f->range.sbit = sbit; 917 f->range.ebit = ebit; 918 f->flags = flags; 919 } 920 return f; 921} 922