bhyverun.c revision 247523
1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/usr.sbin/bhyve/bhyverun.c 247523 2013-03-01 02:26:28Z neel $ 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: head/usr.sbin/bhyve/bhyverun.c 247523 2013-03-01 02:26:28Z neel $"); 31 32#include <sys/types.h> 33#include <sys/mman.h> 34#include <sys/time.h> 35 36#include <machine/segments.h> 37 38#include <stdio.h> 39#include <stdlib.h> 40#include <libgen.h> 41#include <unistd.h> 42#include <assert.h> 43#include <errno.h> 44#include <signal.h> 45#include <pthread.h> 46#include <pthread_np.h> 47 48#include <machine/vmm.h> 49#include <vmmapi.h> 50 51#include "bhyverun.h" 52#include "acpi.h" 53#include "inout.h" 54#include "dbgport.h" 55#include "mem.h" 56#include "mevent.h" 57#include "mptbl.h" 58#include "pci_emul.h" 59#include "xmsr.h" 60#include "ioapic.h" 61#include "spinup_ap.h" 62 63#define DEFAULT_GUEST_HZ 100 64#define DEFAULT_GUEST_TSLICE 200 65 66#define GUEST_NIO_PORT 0x488 /* guest upcalls via i/o port */ 67 68#define VMEXIT_SWITCH 0 /* force vcpu switch in mux mode */ 69#define VMEXIT_CONTINUE 1 /* continue from next instruction */ 70#define VMEXIT_RESTART 2 /* restart current instruction */ 71#define VMEXIT_ABORT 3 /* abort the vm run loop */ 72#define VMEXIT_RESET 4 /* guest machine has reset */ 73 74#define MB (1024UL * 1024) 75#define GB (1024UL * MB) 76 77typedef int (*vmexit_handler_t)(struct vmctx *, struct vm_exit *, int *vcpu); 78 79int guest_tslice = DEFAULT_GUEST_TSLICE; 80int guest_hz = DEFAULT_GUEST_HZ; 81char *vmname; 82 83u_long lomem_sz; 84u_long himem_sz; 85 86int guest_ncpus; 87 88static int pincpu = -1; 89static int guest_vcpu_mux; 90static int guest_vmexit_on_hlt, guest_vmexit_on_pause, disable_x2apic; 91 92static int foundcpus; 93 94static int strictio; 95 96static int acpi; 97 98static char *lomem_addr; 99static char *himem_addr; 100 101static char *progname; 102static const int BSP = 0; 103 104static int cpumask; 105 106static void vm_loop(struct vmctx *ctx, int vcpu, uint64_t rip); 107 108struct vm_exit vmexit[VM_MAXCPU]; 109 110struct fbsdstats { 111 uint64_t vmexit_bogus; 112 uint64_t vmexit_bogus_switch; 113 uint64_t vmexit_hlt; 114 uint64_t vmexit_pause; 115 uint64_t vmexit_mtrap; 116 uint64_t vmexit_paging; 117 uint64_t cpu_switch_rotate; 118 uint64_t cpu_switch_direct; 119 int io_reset; 120} stats; 121 122struct mt_vmm_info { 123 pthread_t mt_thr; 124 struct vmctx *mt_ctx; 125 int mt_vcpu; 126} mt_vmm_info[VM_MAXCPU]; 127 128static void 129usage(int code) 130{ 131 132 fprintf(stderr, 133 "Usage: %s [-aehABHIP][-g <gdb port>][-z <hz>][-s <pci>]" 134 "[-S <pci>][-p pincpu][-n <pci>][-m lowmem][-M highmem]" 135 " <vmname>\n" 136 " -a: local apic is in XAPIC mode (default is X2APIC)\n" 137 " -A: create an ACPI table\n" 138 " -g: gdb port (default is %d and 0 means don't open)\n" 139 " -c: # cpus (default 1)\n" 140 " -p: pin vcpu 'n' to host cpu 'pincpu + n'\n" 141 " -B: inject breakpoint exception on vm entry\n" 142 " -H: vmexit from the guest on hlt\n" 143 " -I: present an ioapic to the guest\n" 144 " -P: vmexit from the guest on pause\n" 145 " -e: exit on unhandled i/o access\n" 146 " -h: help\n" 147 " -z: guest hz (default is %d)\n" 148 " -s: <slot,driver,configinfo> PCI slot config\n" 149 " -S: <slot,driver,configinfo> legacy PCI slot config\n" 150 " -m: lowmem in MB\n" 151 " -M: highmem in MB\n" 152 " -x: mux vcpus to 1 hcpu\n" 153 " -t: mux vcpu timeslice hz (default %d)\n", 154 progname, DEFAULT_GDB_PORT, DEFAULT_GUEST_HZ, 155 DEFAULT_GUEST_TSLICE); 156 exit(code); 157} 158 159void * 160paddr_guest2host(uintptr_t gaddr, size_t len) 161{ 162 163 if (gaddr < lomem_sz && gaddr + len <= lomem_sz) 164 return ((void *)(lomem_addr + gaddr)); 165 166 if (gaddr >= 4*GB) { 167 gaddr -= 4*GB; 168 if (gaddr < himem_sz && gaddr + len <= himem_sz) 169 return ((void *)(himem_addr + gaddr)); 170 } 171 172 return (NULL); 173} 174 175int 176fbsdrun_disable_x2apic(void) 177{ 178 179 return (disable_x2apic); 180} 181 182int 183fbsdrun_vmexit_on_pause(void) 184{ 185 186 return (guest_vmexit_on_pause); 187} 188 189int 190fbsdrun_vmexit_on_hlt(void) 191{ 192 193 return (guest_vmexit_on_hlt); 194} 195 196int 197fbsdrun_muxed(void) 198{ 199 200 return (guest_vcpu_mux); 201} 202 203static void * 204fbsdrun_start_thread(void *param) 205{ 206 char tname[MAXCOMLEN + 1]; 207 struct mt_vmm_info *mtp; 208 int vcpu; 209 210 mtp = param; 211 vcpu = mtp->mt_vcpu; 212 213 snprintf(tname, sizeof(tname), "%s vcpu %d", vmname, vcpu); 214 pthread_set_name_np(mtp->mt_thr, tname); 215 216 vm_loop(mtp->mt_ctx, vcpu, vmexit[vcpu].rip); 217 218 /* not reached */ 219 exit(1); 220 return (NULL); 221} 222 223void 224fbsdrun_addcpu(struct vmctx *ctx, int vcpu, uint64_t rip) 225{ 226 int error; 227 228 if (cpumask & (1 << vcpu)) { 229 fprintf(stderr, "addcpu: attempting to add existing cpu %d\n", 230 vcpu); 231 exit(1); 232 } 233 234 cpumask |= 1 << vcpu; 235 foundcpus++; 236 237 /* 238 * Set up the vmexit struct to allow execution to start 239 * at the given RIP 240 */ 241 vmexit[vcpu].rip = rip; 242 vmexit[vcpu].inst_length = 0; 243 244 if (vcpu == BSP || !guest_vcpu_mux){ 245 mt_vmm_info[vcpu].mt_ctx = ctx; 246 mt_vmm_info[vcpu].mt_vcpu = vcpu; 247 248 error = pthread_create(&mt_vmm_info[vcpu].mt_thr, NULL, 249 fbsdrun_start_thread, &mt_vmm_info[vcpu]); 250 assert(error == 0); 251 } 252} 253 254static int 255fbsdrun_get_next_cpu(int curcpu) 256{ 257 258 /* 259 * Get the next available CPU. Assumes they arrive 260 * in ascending order with no gaps. 261 */ 262 return ((curcpu + 1) % foundcpus); 263} 264 265static int 266vmexit_catch_reset(void) 267{ 268 stats.io_reset++; 269 return (VMEXIT_RESET); 270} 271 272static int 273vmexit_catch_inout(void) 274{ 275 return (VMEXIT_ABORT); 276} 277 278static int 279vmexit_handle_notify(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu, 280 uint32_t eax) 281{ 282#if PG_DEBUG /* put all types of debug here */ 283 if (eax == 0) { 284 pause_noswitch = 1; 285 } else if (eax == 1) { 286 pause_noswitch = 0; 287 } else { 288 pause_noswitch = 0; 289 if (eax == 5) { 290 vm_set_capability(ctx, *pvcpu, VM_CAP_MTRAP_EXIT, 1); 291 } 292 } 293#endif 294 return (VMEXIT_CONTINUE); 295} 296 297static int 298vmexit_inout(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu) 299{ 300 int error; 301 int bytes, port, in, out; 302 uint32_t eax; 303 int vcpu; 304 305 vcpu = *pvcpu; 306 307 port = vme->u.inout.port; 308 bytes = vme->u.inout.bytes; 309 eax = vme->u.inout.eax; 310 in = vme->u.inout.in; 311 out = !in; 312 313 /* We don't deal with these */ 314 if (vme->u.inout.string || vme->u.inout.rep) 315 return (VMEXIT_ABORT); 316 317 /* Special case of guest reset */ 318 if (out && port == 0x64 && (uint8_t)eax == 0xFE) 319 return (vmexit_catch_reset()); 320 321 /* Extra-special case of host notifications */ 322 if (out && port == GUEST_NIO_PORT) 323 return (vmexit_handle_notify(ctx, vme, pvcpu, eax)); 324 325 error = emulate_inout(ctx, vcpu, in, port, bytes, &eax, strictio); 326 if (error == 0 && in) 327 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, eax); 328 329 if (error == 0) 330 return (VMEXIT_CONTINUE); 331 else { 332 fprintf(stderr, "Unhandled %s%c 0x%04x\n", 333 in ? "in" : "out", 334 bytes == 1 ? 'b' : (bytes == 2 ? 'w' : 'l'), port); 335 return (vmexit_catch_inout()); 336 } 337} 338 339static int 340vmexit_rdmsr(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu) 341{ 342 fprintf(stderr, "vm exit rdmsr 0x%x, cpu %d\n", vme->u.msr.code, 343 *pvcpu); 344 return (VMEXIT_ABORT); 345} 346 347static int 348vmexit_wrmsr(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu) 349{ 350 int newcpu; 351 int retval = VMEXIT_CONTINUE; 352 353 newcpu = emulate_wrmsr(ctx, *pvcpu, vme->u.msr.code,vme->u.msr.wval); 354 355 if (guest_vcpu_mux && *pvcpu != newcpu) { 356 retval = VMEXIT_SWITCH; 357 *pvcpu = newcpu; 358 } 359 360 return (retval); 361} 362 363static int 364vmexit_spinup_ap(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu) 365{ 366 int newcpu; 367 int retval = VMEXIT_CONTINUE; 368 369 newcpu = spinup_ap(ctx, *pvcpu, 370 vme->u.spinup_ap.vcpu, vme->u.spinup_ap.rip); 371 372 if (guest_vcpu_mux && *pvcpu != newcpu) { 373 retval = VMEXIT_SWITCH; 374 *pvcpu = newcpu; 375 } 376 377 return (retval); 378} 379 380static int 381vmexit_vmx(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 382{ 383 384 fprintf(stderr, "vm exit[%d]\n", *pvcpu); 385 fprintf(stderr, "\treason\t\tVMX\n"); 386 fprintf(stderr, "\trip\t\t0x%016lx\n", vmexit->rip); 387 fprintf(stderr, "\tinst_length\t%d\n", vmexit->inst_length); 388 fprintf(stderr, "\terror\t\t%d\n", vmexit->u.vmx.error); 389 fprintf(stderr, "\texit_reason\t%u\n", vmexit->u.vmx.exit_reason); 390 fprintf(stderr, "\tqualification\t0x%016lx\n", 391 vmexit->u.vmx.exit_qualification); 392 393 return (VMEXIT_ABORT); 394} 395 396static int bogus_noswitch = 1; 397 398static int 399vmexit_bogus(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 400{ 401 stats.vmexit_bogus++; 402 403 if (!guest_vcpu_mux || guest_ncpus == 1 || bogus_noswitch) { 404 return (VMEXIT_RESTART); 405 } else { 406 stats.vmexit_bogus_switch++; 407 vmexit->inst_length = 0; 408 *pvcpu = -1; 409 return (VMEXIT_SWITCH); 410 } 411} 412 413static int 414vmexit_hlt(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 415{ 416 stats.vmexit_hlt++; 417 if (fbsdrun_muxed()) { 418 *pvcpu = -1; 419 return (VMEXIT_SWITCH); 420 } else { 421 /* 422 * Just continue execution with the next instruction. We use 423 * the HLT VM exit as a way to be friendly with the host 424 * scheduler. 425 */ 426 return (VMEXIT_CONTINUE); 427 } 428} 429 430static int pause_noswitch; 431 432static int 433vmexit_pause(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 434{ 435 stats.vmexit_pause++; 436 437 if (fbsdrun_muxed() && !pause_noswitch) { 438 *pvcpu = -1; 439 return (VMEXIT_SWITCH); 440 } else { 441 return (VMEXIT_CONTINUE); 442 } 443} 444 445static int 446vmexit_mtrap(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 447{ 448 stats.vmexit_mtrap++; 449 450 return (VMEXIT_RESTART); 451} 452 453static int 454vmexit_paging(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 455{ 456 int err; 457 stats.vmexit_paging++; 458 459 err = emulate_mem(ctx, *pvcpu, vmexit->u.paging.gpa, 460 &vmexit->u.paging.vie); 461 462 if (err) { 463 if (err == EINVAL) { 464 fprintf(stderr, 465 "Failed to emulate instruction at 0x%lx\n", 466 vmexit->rip); 467 } else if (err == ESRCH) { 468 fprintf(stderr, "Unhandled memory access to 0x%lx\n", 469 vmexit->u.paging.gpa); 470 } 471 472 return (VMEXIT_ABORT); 473 } 474 475 return (VMEXIT_CONTINUE); 476} 477 478static void 479sigalrm(int sig) 480{ 481 return; 482} 483 484static void 485setup_timeslice(void) 486{ 487 struct sigaction sa; 488 struct itimerval itv; 489 int error; 490 491 /* 492 * Setup a realtime timer to generate a SIGALRM at a 493 * frequency of 'guest_tslice' ticks per second. 494 */ 495 sigemptyset(&sa.sa_mask); 496 sa.sa_flags = 0; 497 sa.sa_handler = sigalrm; 498 499 error = sigaction(SIGALRM, &sa, NULL); 500 assert(error == 0); 501 502 itv.it_interval.tv_sec = 0; 503 itv.it_interval.tv_usec = 1000000 / guest_tslice; 504 itv.it_value.tv_sec = 0; 505 itv.it_value.tv_usec = 1000000 / guest_tslice; 506 507 error = setitimer(ITIMER_REAL, &itv, NULL); 508 assert(error == 0); 509} 510 511static vmexit_handler_t handler[VM_EXITCODE_MAX] = { 512 [VM_EXITCODE_INOUT] = vmexit_inout, 513 [VM_EXITCODE_VMX] = vmexit_vmx, 514 [VM_EXITCODE_BOGUS] = vmexit_bogus, 515 [VM_EXITCODE_RDMSR] = vmexit_rdmsr, 516 [VM_EXITCODE_WRMSR] = vmexit_wrmsr, 517 [VM_EXITCODE_MTRAP] = vmexit_mtrap, 518 [VM_EXITCODE_PAGING] = vmexit_paging, 519 [VM_EXITCODE_SPINUP_AP] = vmexit_spinup_ap, 520}; 521 522static void 523vm_loop(struct vmctx *ctx, int vcpu, uint64_t rip) 524{ 525 cpuset_t mask; 526 int error, rc, prevcpu; 527 528 if (guest_vcpu_mux) 529 setup_timeslice(); 530 531 if (pincpu >= 0) { 532 CPU_ZERO(&mask); 533 CPU_SET(pincpu + vcpu, &mask); 534 error = pthread_setaffinity_np(pthread_self(), 535 sizeof(mask), &mask); 536 assert(error == 0); 537 } 538 539 while (1) { 540 error = vm_run(ctx, vcpu, rip, &vmexit[vcpu]); 541 if (error != 0) { 542 /* 543 * It is possible that 'vmmctl' or some other process 544 * has transitioned the vcpu to CANNOT_RUN state right 545 * before we tried to transition it to RUNNING. 546 * 547 * This is expected to be temporary so just retry. 548 */ 549 if (errno == EBUSY) 550 continue; 551 else 552 break; 553 } 554 555 prevcpu = vcpu; 556 rc = (*handler[vmexit[vcpu].exitcode])(ctx, &vmexit[vcpu], 557 &vcpu); 558 switch (rc) { 559 case VMEXIT_SWITCH: 560 assert(guest_vcpu_mux); 561 if (vcpu == -1) { 562 stats.cpu_switch_rotate++; 563 vcpu = fbsdrun_get_next_cpu(prevcpu); 564 } else { 565 stats.cpu_switch_direct++; 566 } 567 /* fall through */ 568 case VMEXIT_CONTINUE: 569 rip = vmexit[vcpu].rip + vmexit[vcpu].inst_length; 570 break; 571 case VMEXIT_RESTART: 572 rip = vmexit[vcpu].rip; 573 break; 574 case VMEXIT_RESET: 575 exit(0); 576 default: 577 exit(1); 578 } 579 } 580 fprintf(stderr, "vm_run error %d, errno %d\n", error, errno); 581} 582 583static int 584num_vcpus_allowed(struct vmctx *ctx) 585{ 586 int tmp, error; 587 588 error = vm_get_capability(ctx, BSP, VM_CAP_UNRESTRICTED_GUEST, &tmp); 589 590 /* 591 * The guest is allowed to spinup more than one processor only if the 592 * UNRESTRICTED_GUEST capability is available. 593 */ 594 if (error == 0) 595 return (VM_MAXCPU); 596 else 597 return (1); 598} 599 600int 601main(int argc, char *argv[]) 602{ 603 int c, error, gdb_port, inject_bkpt, tmp, err, ioapic, bvmcons; 604 int max_vcpus; 605 struct vmctx *ctx; 606 uint64_t rip; 607 608 bvmcons = 0; 609 inject_bkpt = 0; 610 progname = basename(argv[0]); 611 gdb_port = DEFAULT_GDB_PORT; 612 guest_ncpus = 1; 613 ioapic = 0; 614 615 while ((c = getopt(argc, argv, "abehABHIPxp:g:c:z:s:S:n:m:M:")) != -1) { 616 switch (c) { 617 case 'a': 618 disable_x2apic = 1; 619 break; 620 case 'A': 621 acpi = 1; 622 break; 623 case 'b': 624 bvmcons = 1; 625 break; 626 case 'B': 627 inject_bkpt = 1; 628 break; 629 case 'x': 630 guest_vcpu_mux = 1; 631 break; 632 case 'p': 633 pincpu = atoi(optarg); 634 break; 635 case 'c': 636 guest_ncpus = atoi(optarg); 637 break; 638 case 'g': 639 gdb_port = atoi(optarg); 640 break; 641 case 'z': 642 guest_hz = atoi(optarg); 643 break; 644 case 't': 645 guest_tslice = atoi(optarg); 646 break; 647 case 's': 648 pci_parse_slot(optarg, 0); 649 break; 650 case 'S': 651 pci_parse_slot(optarg, 1); 652 break; 653 case 'm': 654 lomem_sz = strtoul(optarg, NULL, 0) * MB; 655 break; 656 case 'M': 657 himem_sz = strtoul(optarg, NULL, 0) * MB; 658 break; 659 case 'H': 660 guest_vmexit_on_hlt = 1; 661 break; 662 case 'I': 663 ioapic = 1; 664 break; 665 case 'P': 666 guest_vmexit_on_pause = 1; 667 break; 668 case 'e': 669 strictio = 1; 670 break; 671 case 'h': 672 usage(0); 673 default: 674 usage(1); 675 } 676 } 677 argc -= optind; 678 argv += optind; 679 680 if (argc != 1) 681 usage(1); 682 683 /* No need to mux if guest is uni-processor */ 684 if (guest_ncpus <= 1) 685 guest_vcpu_mux = 0; 686 687 /* vmexit on hlt if guest is muxed */ 688 if (guest_vcpu_mux) { 689 guest_vmexit_on_hlt = 1; 690 guest_vmexit_on_pause = 1; 691 } 692 693 vmname = argv[0]; 694 695 ctx = vm_open(vmname); 696 if (ctx == NULL) { 697 perror("vm_open"); 698 exit(1); 699 } 700 701 max_vcpus = num_vcpus_allowed(ctx); 702 if (guest_ncpus > max_vcpus) { 703 fprintf(stderr, "%d vCPUs requested but only %d available\n", 704 guest_ncpus, max_vcpus); 705 exit(1); 706 } 707 708 if (fbsdrun_vmexit_on_hlt()) { 709 err = vm_get_capability(ctx, BSP, VM_CAP_HALT_EXIT, &tmp); 710 if (err < 0) { 711 fprintf(stderr, "VM exit on HLT not supported\n"); 712 exit(1); 713 } 714 vm_set_capability(ctx, BSP, VM_CAP_HALT_EXIT, 1); 715 handler[VM_EXITCODE_HLT] = vmexit_hlt; 716 } 717 718 if (fbsdrun_vmexit_on_pause()) { 719 /* 720 * pause exit support required for this mode 721 */ 722 err = vm_get_capability(ctx, BSP, VM_CAP_PAUSE_EXIT, &tmp); 723 if (err < 0) { 724 fprintf(stderr, 725 "SMP mux requested, no pause support\n"); 726 exit(1); 727 } 728 vm_set_capability(ctx, BSP, VM_CAP_PAUSE_EXIT, 1); 729 handler[VM_EXITCODE_PAUSE] = vmexit_pause; 730 } 731 732 if (fbsdrun_disable_x2apic()) 733 err = vm_set_x2apic_state(ctx, BSP, X2APIC_DISABLED); 734 else 735 err = vm_set_x2apic_state(ctx, BSP, X2APIC_ENABLED); 736 737 if (err) { 738 fprintf(stderr, "Unable to set x2apic state (%d)\n", err); 739 exit(1); 740 } 741 742 if (lomem_sz != 0) { 743 lomem_addr = vm_map_memory(ctx, 0, lomem_sz); 744 if (lomem_addr == (char *) MAP_FAILED) { 745 lomem_sz = 0; 746 } else if (himem_sz != 0) { 747 himem_addr = vm_map_memory(ctx, 4*GB, himem_sz); 748 if (himem_addr == (char *) MAP_FAILED) { 749 lomem_sz = 0; 750 himem_sz = 0; 751 } 752 } 753 } 754 755 init_inout(); 756 init_pci(ctx); 757 if (ioapic) 758 ioapic_init(0); 759 760 if (gdb_port != 0) 761 init_dbgport(gdb_port); 762 763 if (bvmcons) 764 init_bvmcons(); 765 766 error = vm_get_register(ctx, BSP, VM_REG_GUEST_RIP, &rip); 767 assert(error == 0); 768 769 if (inject_bkpt) { 770 error = vm_inject_event(ctx, BSP, VM_HW_EXCEPTION, IDT_BP); 771 assert(error == 0); 772 } 773 774 /* 775 * build the guest tables, MP etc. 776 */ 777 mptable_build(ctx, guest_ncpus, ioapic); 778 779 if (acpi) { 780 error = acpi_build(ctx, guest_ncpus, ioapic); 781 assert(error == 0); 782 } 783 784 /* 785 * Add CPU 0 786 */ 787 fbsdrun_addcpu(ctx, BSP, rip); 788 789 /* 790 * Head off to the main event dispatch loop 791 */ 792 mevent_dispatch(); 793 794 exit(1); 795} 796