trace.h revision 183375
1181624Skmacy/****************************************************************************** 2181624Skmacy * include/public/trace.h 3181624Skmacy * 4181624Skmacy * Permission is hereby granted, free of charge, to any person obtaining a copy 5181624Skmacy * of this software and associated documentation files (the "Software"), to 6181624Skmacy * deal in the Software without restriction, including without limitation the 7181624Skmacy * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 8181624Skmacy * sell copies of the Software, and to permit persons to whom the Software is 9181624Skmacy * furnished to do so, subject to the following conditions: 10181624Skmacy * 11181624Skmacy * The above copyright notice and this permission notice shall be included in 12181624Skmacy * all copies or substantial portions of the Software. 13181624Skmacy * 14181624Skmacy * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15181624Skmacy * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16181624Skmacy * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 17181624Skmacy * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18181624Skmacy * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19181624Skmacy * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20181624Skmacy * DEALINGS IN THE SOFTWARE. 21181624Skmacy * 22181624Skmacy * Mark Williamson, (C) 2004 Intel Research Cambridge 23181624Skmacy * Copyright (C) 2005 Bin Ren 24181624Skmacy */ 25181624Skmacy 26181624Skmacy#ifndef __XEN_PUBLIC_TRACE_H__ 27181624Skmacy#define __XEN_PUBLIC_TRACE_H__ 28181624Skmacy 29183375Skmacy#define TRACE_EXTRA_MAX 7 30183375Skmacy#define TRACE_EXTRA_SHIFT 28 31183375Skmacy 32181624Skmacy/* Trace classes */ 33181624Skmacy#define TRC_CLS_SHIFT 16 34183375Skmacy#define TRC_GEN 0x0001f000 /* General trace */ 35183375Skmacy#define TRC_SCHED 0x0002f000 /* Xen Scheduler trace */ 36183375Skmacy#define TRC_DOM0OP 0x0004f000 /* Xen DOM0 operation trace */ 37183375Skmacy#define TRC_HVM 0x0008f000 /* Xen HVM trace */ 38183375Skmacy#define TRC_MEM 0x0010f000 /* Xen memory trace */ 39183375Skmacy#define TRC_PV 0x0020f000 /* Xen PV traces */ 40183375Skmacy#define TRC_SHADOW 0x0040f000 /* Xen shadow tracing */ 41183375Skmacy#define TRC_ALL 0x0ffff000 42183375Skmacy#define TRC_HD_TO_EVENT(x) ((x)&0x0fffffff) 43183375Skmacy#define TRC_HD_CYCLE_FLAG (1UL<<31) 44183375Skmacy#define TRC_HD_INCLUDES_CYCLE_COUNT(x) ( !!( (x) & TRC_HD_CYCLE_FLAG ) ) 45183375Skmacy#define TRC_HD_EXTRA(x) (((x)>>TRACE_EXTRA_SHIFT)&TRACE_EXTRA_MAX) 46181624Skmacy 47181624Skmacy/* Trace subclasses */ 48181624Skmacy#define TRC_SUBCLS_SHIFT 12 49181624Skmacy 50181624Skmacy/* trace subclasses for SVM */ 51181624Skmacy#define TRC_HVM_ENTRYEXIT 0x00081000 /* VMENTRY and #VMEXIT */ 52181624Skmacy#define TRC_HVM_HANDLER 0x00082000 /* various HVM handlers */ 53181624Skmacy 54183375Skmacy#define TRC_SCHED_MIN 0x00021000 /* Just runstate changes */ 55183375Skmacy#define TRC_SCHED_VERBOSE 0x00028000 /* More inclusive scheduling */ 56183375Skmacy 57181624Skmacy/* Trace events per class */ 58181624Skmacy#define TRC_LOST_RECORDS (TRC_GEN + 1) 59183375Skmacy#define TRC_TRACE_WRAP_BUFFER (TRC_GEN + 2) 60183375Skmacy#define TRC_TRACE_CPU_CHANGE (TRC_GEN + 3) 61181624Skmacy 62183375Skmacy#define TRC_SCHED_RUNSTATE_CHANGE (TRC_SCHED_MIN + 1) 63183375Skmacy#define TRC_SCHED_DOM_ADD (TRC_SCHED_VERBOSE + 1) 64183375Skmacy#define TRC_SCHED_DOM_REM (TRC_SCHED_VERBOSE + 2) 65183375Skmacy#define TRC_SCHED_SLEEP (TRC_SCHED_VERBOSE + 3) 66183375Skmacy#define TRC_SCHED_WAKE (TRC_SCHED_VERBOSE + 4) 67183375Skmacy#define TRC_SCHED_YIELD (TRC_SCHED_VERBOSE + 5) 68183375Skmacy#define TRC_SCHED_BLOCK (TRC_SCHED_VERBOSE + 6) 69183375Skmacy#define TRC_SCHED_SHUTDOWN (TRC_SCHED_VERBOSE + 7) 70183375Skmacy#define TRC_SCHED_CTL (TRC_SCHED_VERBOSE + 8) 71183375Skmacy#define TRC_SCHED_ADJDOM (TRC_SCHED_VERBOSE + 9) 72183375Skmacy#define TRC_SCHED_SWITCH (TRC_SCHED_VERBOSE + 10) 73183375Skmacy#define TRC_SCHED_S_TIMER_FN (TRC_SCHED_VERBOSE + 11) 74183375Skmacy#define TRC_SCHED_T_TIMER_FN (TRC_SCHED_VERBOSE + 12) 75183375Skmacy#define TRC_SCHED_DOM_TIMER_FN (TRC_SCHED_VERBOSE + 13) 76183375Skmacy#define TRC_SCHED_SWITCH_INFPREV (TRC_SCHED_VERBOSE + 14) 77183375Skmacy#define TRC_SCHED_SWITCH_INFNEXT (TRC_SCHED_VERBOSE + 15) 78181624Skmacy 79181624Skmacy#define TRC_MEM_PAGE_GRANT_MAP (TRC_MEM + 1) 80181624Skmacy#define TRC_MEM_PAGE_GRANT_UNMAP (TRC_MEM + 2) 81181624Skmacy#define TRC_MEM_PAGE_GRANT_TRANSFER (TRC_MEM + 3) 82181624Skmacy 83183375Skmacy#define TRC_PV_HYPERCALL (TRC_PV + 1) 84183375Skmacy#define TRC_PV_TRAP (TRC_PV + 3) 85183375Skmacy#define TRC_PV_PAGE_FAULT (TRC_PV + 4) 86183375Skmacy#define TRC_PV_FORCED_INVALID_OP (TRC_PV + 5) 87183375Skmacy#define TRC_PV_EMULATE_PRIVOP (TRC_PV + 6) 88183375Skmacy#define TRC_PV_EMULATE_4GB (TRC_PV + 7) 89183375Skmacy#define TRC_PV_MATH_STATE_RESTORE (TRC_PV + 8) 90183375Skmacy#define TRC_PV_PAGING_FIXUP (TRC_PV + 9) 91183375Skmacy#define TRC_PV_GDT_LDT_MAPPING_FAULT (TRC_PV + 10) 92183375Skmacy#define TRC_PV_PTWR_EMULATION (TRC_PV + 11) 93183375Skmacy#define TRC_PV_PTWR_EMULATION_PAE (TRC_PV + 12) 94183375Skmacy /* Indicates that addresses in trace record are 64 bits */ 95183375Skmacy#define TRC_64_FLAG (0x100) 96183375Skmacy 97183375Skmacy#define TRC_SHADOW_NOT_SHADOW (TRC_SHADOW + 1) 98183375Skmacy#define TRC_SHADOW_FAST_PROPAGATE (TRC_SHADOW + 2) 99183375Skmacy#define TRC_SHADOW_FAST_MMIO (TRC_SHADOW + 3) 100183375Skmacy#define TRC_SHADOW_FALSE_FAST_PATH (TRC_SHADOW + 4) 101183375Skmacy#define TRC_SHADOW_MMIO (TRC_SHADOW + 5) 102183375Skmacy#define TRC_SHADOW_FIXUP (TRC_SHADOW + 6) 103183375Skmacy#define TRC_SHADOW_DOMF_DYING (TRC_SHADOW + 7) 104183375Skmacy#define TRC_SHADOW_EMULATE (TRC_SHADOW + 8) 105183375Skmacy#define TRC_SHADOW_EMULATE_UNSHADOW_USER (TRC_SHADOW + 9) 106183375Skmacy#define TRC_SHADOW_EMULATE_UNSHADOW_EVTINJ (TRC_SHADOW + 10) 107183375Skmacy#define TRC_SHADOW_EMULATE_UNSHADOW_UNHANDLED (TRC_SHADOW + 11) 108183375Skmacy#define TRC_SHADOW_WRMAP_BF (TRC_SHADOW + 12) 109183375Skmacy#define TRC_SHADOW_PREALLOC_UNPIN (TRC_SHADOW + 13) 110183375Skmacy#define TRC_SHADOW_RESYNC_FULL (TRC_SHADOW + 14) 111183375Skmacy#define TRC_SHADOW_RESYNC_ONLY (TRC_SHADOW + 15) 112183375Skmacy 113181624Skmacy/* trace events per subclass */ 114181624Skmacy#define TRC_HVM_VMENTRY (TRC_HVM_ENTRYEXIT + 0x01) 115181624Skmacy#define TRC_HVM_VMEXIT (TRC_HVM_ENTRYEXIT + 0x02) 116183375Skmacy#define TRC_HVM_VMEXIT64 (TRC_HVM_ENTRYEXIT + TRC_64_FLAG + 0x02) 117181624Skmacy#define TRC_HVM_PF_XEN (TRC_HVM_HANDLER + 0x01) 118183375Skmacy#define TRC_HVM_PF_XEN64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x01) 119181624Skmacy#define TRC_HVM_PF_INJECT (TRC_HVM_HANDLER + 0x02) 120183375Skmacy#define TRC_HVM_PF_INJECT64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x02) 121181624Skmacy#define TRC_HVM_INJ_EXC (TRC_HVM_HANDLER + 0x03) 122181624Skmacy#define TRC_HVM_INJ_VIRQ (TRC_HVM_HANDLER + 0x04) 123181624Skmacy#define TRC_HVM_REINJ_VIRQ (TRC_HVM_HANDLER + 0x05) 124181624Skmacy#define TRC_HVM_IO_READ (TRC_HVM_HANDLER + 0x06) 125181624Skmacy#define TRC_HVM_IO_WRITE (TRC_HVM_HANDLER + 0x07) 126181624Skmacy#define TRC_HVM_CR_READ (TRC_HVM_HANDLER + 0x08) 127183375Skmacy#define TRC_HVM_CR_READ64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x08) 128181624Skmacy#define TRC_HVM_CR_WRITE (TRC_HVM_HANDLER + 0x09) 129183375Skmacy#define TRC_HVM_CR_WRITE64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x09) 130181624Skmacy#define TRC_HVM_DR_READ (TRC_HVM_HANDLER + 0x0A) 131181624Skmacy#define TRC_HVM_DR_WRITE (TRC_HVM_HANDLER + 0x0B) 132181624Skmacy#define TRC_HVM_MSR_READ (TRC_HVM_HANDLER + 0x0C) 133181624Skmacy#define TRC_HVM_MSR_WRITE (TRC_HVM_HANDLER + 0x0D) 134181624Skmacy#define TRC_HVM_CPUID (TRC_HVM_HANDLER + 0x0E) 135181624Skmacy#define TRC_HVM_INTR (TRC_HVM_HANDLER + 0x0F) 136181624Skmacy#define TRC_HVM_NMI (TRC_HVM_HANDLER + 0x10) 137181624Skmacy#define TRC_HVM_SMI (TRC_HVM_HANDLER + 0x11) 138181624Skmacy#define TRC_HVM_VMMCALL (TRC_HVM_HANDLER + 0x12) 139181624Skmacy#define TRC_HVM_HLT (TRC_HVM_HANDLER + 0x13) 140181624Skmacy#define TRC_HVM_INVLPG (TRC_HVM_HANDLER + 0x14) 141183375Skmacy#define TRC_HVM_INVLPG64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x14) 142181624Skmacy#define TRC_HVM_MCE (TRC_HVM_HANDLER + 0x15) 143183375Skmacy#define TRC_HVM_IO_ASSIST (TRC_HVM_HANDLER + 0x16) 144183375Skmacy#define TRC_HVM_MMIO_ASSIST (TRC_HVM_HANDLER + 0x17) 145183375Skmacy#define TRC_HVM_CLTS (TRC_HVM_HANDLER + 0x18) 146183375Skmacy#define TRC_HVM_LMSW (TRC_HVM_HANDLER + 0x19) 147183375Skmacy#define TRC_HVM_LMSW64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x19) 148181624Skmacy 149181624Skmacy/* This structure represents a single trace buffer record. */ 150181624Skmacystruct t_rec { 151183375Skmacy uint32_t event:28; 152183375Skmacy uint32_t extra_u32:3; /* # entries in trailing extra_u32[] array */ 153183375Skmacy uint32_t cycles_included:1; /* u.cycles or u.no_cycles? */ 154183375Skmacy union { 155183375Skmacy struct { 156183375Skmacy uint32_t cycles_lo, cycles_hi; /* cycle counter timestamp */ 157183375Skmacy uint32_t extra_u32[7]; /* event data items */ 158183375Skmacy } cycles; 159183375Skmacy struct { 160183375Skmacy uint32_t extra_u32[7]; /* event data items */ 161183375Skmacy } nocycles; 162183375Skmacy } u; 163181624Skmacy}; 164181624Skmacy 165181624Skmacy/* 166181624Skmacy * This structure contains the metadata for a single trace buffer. The head 167181624Skmacy * field, indexes into an array of struct t_rec's. 168181624Skmacy */ 169181624Skmacystruct t_buf { 170183375Skmacy /* Assume the data buffer size is X. X is generally not a power of 2. 171183375Skmacy * CONS and PROD are incremented modulo (2*X): 172183375Skmacy * 0 <= cons < 2*X 173183375Skmacy * 0 <= prod < 2*X 174183375Skmacy * This is done because addition modulo X breaks at 2^32 when X is not a 175183375Skmacy * power of 2: 176183375Skmacy * (((2^32 - 1) % X) + 1) % X != (2^32) % X 177183375Skmacy */ 178183375Skmacy uint32_t cons; /* Offset of next item to be consumed by control tools. */ 179183375Skmacy uint32_t prod; /* Offset of next item to be produced by Xen. */ 180183375Skmacy /* Records follow immediately after the meta-data header. */ 181181624Skmacy}; 182181624Skmacy 183181624Skmacy#endif /* __XEN_PUBLIC_TRACE_H__ */ 184181624Skmacy 185181624Skmacy/* 186181624Skmacy * Local variables: 187181624Skmacy * mode: C 188181624Skmacy * c-set-style: "BSD" 189181624Skmacy * c-basic-offset: 4 190181624Skmacy * tab-width: 4 191181624Skmacy * indent-tabs-mode: nil 192181624Skmacy * End: 193181624Skmacy */ 194