isa_dma.c revision 79008
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37 * $FreeBSD: head/sys/i386/isa/isa_dma.c 79008 2001-06-30 05:29:11Z imp $ 38 */ 39 40/* 41 * code to manage AT bus 42 * 43 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 44 * Fixed uninitialized variable problem and added code to deal 45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 46 * mode DMA count compution and reorganized DMA setup code in 47 * isa_dmastart() 48 */ 49 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/bus.h> 53#include <sys/kernel.h> 54#include <sys/malloc.h> 55#include <sys/lock.h> 56#include <sys/mutex.h> 57#include <sys/module.h> 58#include <vm/vm.h> 59#include <vm/vm_param.h> 60#include <vm/pmap.h> 61#include <i386/isa/isa.h> 62#include <dev/ic/i8237.h> 63#include <isa/isavar.h> 64 65/* 66** Register definitions for DMA controller 1 (channels 0..3): 67*/ 68#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 69#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 70#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 71#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 72 73/* 74** Register definitions for DMA controller 2 (channels 4..7): 75*/ 76#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 77#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 78#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 79#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 80 81static int isa_dmarangecheck __P((caddr_t va, u_int length, int chan)); 82 83static caddr_t dma_bouncebuf[8]; 84static u_int dma_bouncebufsize[8]; 85static u_int8_t dma_bounced = 0; 86static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 87static u_int8_t dma_inuse = 0; /* User for acquire/release */ 88static u_int8_t dma_auto_mode = 0; 89 90#define VALID_DMA_MASK (7) 91 92/* high byte of address is stored in this port for i-th dma channel */ 93static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 94 95/* 96 * Setup a DMA channel's bounce buffer. 97 */ 98void 99isa_dmainit(chan, bouncebufsize) 100 int chan; 101 u_int bouncebufsize; 102{ 103 void *buf; 104 105#ifdef DIAGNOSTIC 106 if (chan & ~VALID_DMA_MASK) 107 panic("isa_dmainit: channel out of range"); 108 109 if (dma_bouncebuf[chan] != NULL) 110 panic("isa_dmainit: impossible request"); 111#endif 112 113 dma_bouncebufsize[chan] = bouncebufsize; 114 115 /* Try malloc() first. It works better if it works. */ 116 buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 117 if (buf != NULL) { 118 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 119 dma_bouncebuf[chan] = buf; 120 return; 121 } 122 free(buf, M_DEVBUF); 123 } 124 buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 125 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 126 if (buf == NULL) 127 printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 128 else 129 dma_bouncebuf[chan] = buf; 130} 131 132/* 133 * Register a DMA channel's usage. Usually called from a device driver 134 * in open() or during its initialization. 135 */ 136int 137isa_dma_acquire(chan) 138 int chan; 139{ 140#ifdef DIAGNOSTIC 141 if (chan & ~VALID_DMA_MASK) 142 panic("isa_dma_acquire: channel out of range"); 143#endif 144 145 if (dma_inuse & (1 << chan)) { 146 printf("isa_dma_acquire: channel %d already in use\n", chan); 147 return (EBUSY); 148 } 149 dma_inuse |= (1 << chan); 150 dma_auto_mode &= ~(1 << chan); 151 152 return (0); 153} 154 155/* 156 * Unregister a DMA channel's usage. Usually called from a device driver 157 * during close() or during its shutdown. 158 */ 159void 160isa_dma_release(chan) 161 int chan; 162{ 163#ifdef DIAGNOSTIC 164 if (chan & ~VALID_DMA_MASK) 165 panic("isa_dma_release: channel out of range"); 166 167 if ((dma_inuse & (1 << chan)) == 0) 168 printf("isa_dma_release: channel %d not in use\n", chan); 169#endif 170 171 if (dma_busy & (1 << chan)) { 172 dma_busy &= ~(1 << chan); 173 /* 174 * XXX We should also do "dma_bounced &= (1 << chan);" 175 * because we are acting on behalf of isa_dmadone() which 176 * was not called to end the last DMA operation. This does 177 * not matter now, but it may in the future. 178 */ 179 } 180 181 dma_inuse &= ~(1 << chan); 182 dma_auto_mode &= ~(1 << chan); 183} 184 185/* 186 * isa_dmacascade(): program 8237 DMA controller channel to accept 187 * external dma control by a board. 188 */ 189void 190isa_dmacascade(chan) 191 int chan; 192{ 193#ifdef DIAGNOSTIC 194 if (chan & ~VALID_DMA_MASK) 195 panic("isa_dmacascade: channel out of range"); 196#endif 197 198 /* set dma channel mode, and set dma channel mode */ 199 if ((chan & 4) == 0) { 200 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 201 outb(DMA1_SMSK, chan); 202 } else { 203 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 204 outb(DMA2_SMSK, chan & 3); 205 } 206} 207 208/* 209 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 210 * problems by using a bounce buffer. 211 */ 212void 213isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 214{ 215 vm_offset_t phys; 216 int waport; 217 caddr_t newaddr; 218 219#ifdef DIAGNOSTIC 220 if (chan & ~VALID_DMA_MASK) 221 panic("isa_dmastart: channel out of range"); 222 223 if ((chan < 4 && nbytes > (1<<16)) 224 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 225 panic("isa_dmastart: impossible request"); 226 227 if ((dma_inuse & (1 << chan)) == 0) 228 printf("isa_dmastart: channel %d not acquired\n", chan); 229#endif 230 231#if 0 232 /* 233 * XXX This should be checked, but drivers like ad1848 only call 234 * isa_dmastart() once because they use Auto DMA mode. If we 235 * leave this in, drivers that do this will print this continuously. 236 */ 237 if (dma_busy & (1 << chan)) 238 printf("isa_dmastart: channel %d busy\n", chan); 239#endif 240 241 dma_busy |= (1 << chan); 242 243 if (isa_dmarangecheck(addr, nbytes, chan)) { 244 if (dma_bouncebuf[chan] == NULL 245 || dma_bouncebufsize[chan] < nbytes) 246 panic("isa_dmastart: bad bounce buffer"); 247 dma_bounced |= (1 << chan); 248 newaddr = dma_bouncebuf[chan]; 249 250 /* copy bounce buffer on write */ 251 if (!(flags & ISADMA_READ)) 252 bcopy(addr, newaddr, nbytes); 253 addr = newaddr; 254 } 255 256 /* translate to physical */ 257 mtx_lock(&vm_mtx); /* 258 * XXX: need to hold for longer period to 259 * ensure that mappings don't change 260 */ 261 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 262 mtx_unlock(&vm_mtx); 263 264 if (flags & ISADMA_RAW) { 265 dma_auto_mode |= (1 << chan); 266 } else { 267 dma_auto_mode &= ~(1 << chan); 268 } 269 270 if ((chan & 4) == 0) { 271 /* 272 * Program one of DMA channels 0..3. These are 273 * byte mode channels. 274 */ 275 /* set dma channel mode, and reset address ff */ 276 277 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 278 if (flags & ISADMA_RAW) { 279 if (flags & ISADMA_READ) 280 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 281 else 282 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 283 } 284 else 285 if (flags & ISADMA_READ) 286 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 287 else 288 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 289 outb(DMA1_FFC, 0); 290 291 /* send start address */ 292 waport = DMA1_CHN(chan); 293 outb(waport, phys); 294 outb(waport, phys>>8); 295 outb(dmapageport[chan], phys>>16); 296 297 /* send count */ 298 outb(waport + 1, --nbytes); 299 outb(waport + 1, nbytes>>8); 300 301 /* unmask channel */ 302 outb(DMA1_SMSK, chan); 303 } else { 304 /* 305 * Program one of DMA channels 4..7. These are 306 * word mode channels. 307 */ 308 /* set dma channel mode, and reset address ff */ 309 310 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 311 if (flags & ISADMA_RAW) { 312 if (flags & ISADMA_READ) 313 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 314 else 315 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 316 } 317 else 318 if (flags & ISADMA_READ) 319 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 320 else 321 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 322 outb(DMA2_FFC, 0); 323 324 /* send start address */ 325 waport = DMA2_CHN(chan - 4); 326 outb(waport, phys>>1); 327 outb(waport, phys>>9); 328 outb(dmapageport[chan], phys>>16); 329 330 /* send count */ 331 nbytes >>= 1; 332 outb(waport + 2, --nbytes); 333 outb(waport + 2, nbytes>>8); 334 335 /* unmask channel */ 336 outb(DMA2_SMSK, chan & 3); 337 } 338} 339 340void 341isa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 342{ 343#ifdef DIAGNOSTIC 344 if (chan & ~VALID_DMA_MASK) 345 panic("isa_dmadone: channel out of range"); 346 347 if ((dma_inuse & (1 << chan)) == 0) 348 printf("isa_dmadone: channel %d not acquired\n", chan); 349#endif 350 351 if (((dma_busy & (1 << chan)) == 0) && 352 (dma_auto_mode & (1 << chan)) == 0 ) 353 printf("isa_dmadone: channel %d not busy\n", chan); 354 355 if ((dma_auto_mode & (1 << chan)) == 0) 356 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 357 358 if (dma_bounced & (1 << chan)) { 359 /* copy bounce buffer on read */ 360 if (flags & ISADMA_READ) 361 bcopy(dma_bouncebuf[chan], addr, nbytes); 362 363 dma_bounced &= ~(1 << chan); 364 } 365 dma_busy &= ~(1 << chan); 366} 367 368/* 369 * Check for problems with the address range of a DMA transfer 370 * (non-contiguous physical pages, outside of bus address space, 371 * crossing DMA page boundaries). 372 * Return true if special handling needed. 373 */ 374 375static int 376isa_dmarangecheck(caddr_t va, u_int length, int chan) 377{ 378 vm_offset_t phys, priorpage = 0, endva; 379 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 380 381 endva = (vm_offset_t)round_page((vm_offset_t)va + length); 382 for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 383 mtx_lock(&vm_mtx); 384 phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va)); 385 mtx_unlock(&vm_mtx); 386#define ISARAM_END RAM_END 387 if (phys == 0) 388 panic("isa_dmacheck: no physical page present"); 389 if (phys >= ISARAM_END) 390 return (1); 391 if (priorpage) { 392 if (priorpage + PAGE_SIZE != phys) 393 return (1); 394 /* check if crossing a DMA page boundary */ 395 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 396 return (1); 397 } 398 priorpage = phys; 399 } 400 return (0); 401} 402 403/* 404 * Query the progress of a transfer on a DMA channel. 405 * 406 * To avoid having to interrupt a transfer in progress, we sample 407 * each of the high and low databytes twice, and apply the following 408 * logic to determine the correct count. 409 * 410 * Reads are performed with interrupts disabled, thus it is to be 411 * expected that the time between reads is very small. At most 412 * one rollover in the low count byte can be expected within the 413 * four reads that are performed. 414 * 415 * There are three gaps in which a rollover can occur : 416 * 417 * - read low1 418 * gap1 419 * - read high1 420 * gap2 421 * - read low2 422 * gap3 423 * - read high2 424 * 425 * If a rollover occurs in gap1 or gap2, the low2 value will be 426 * greater than the low1 value. In this case, low2 and high2 are a 427 * corresponding pair. 428 * 429 * In any other case, low1 and high1 can be considered to be correct. 430 * 431 * The function returns the number of bytes remaining in the transfer, 432 * or -1 if the channel requested is not active. 433 * 434 */ 435int 436isa_dmastatus(int chan) 437{ 438 u_long cnt = 0; 439 int ffport, waport; 440 u_long low1, high1, low2, high2; 441 442 /* channel active? */ 443 if ((dma_inuse & (1 << chan)) == 0) { 444 printf("isa_dmastatus: channel %d not active\n", chan); 445 return(-1); 446 } 447 /* channel busy? */ 448 449 if (((dma_busy & (1 << chan)) == 0) && 450 (dma_auto_mode & (1 << chan)) == 0 ) { 451 printf("chan %d not busy\n", chan); 452 return -2 ; 453 } 454 if (chan < 4) { /* low DMA controller */ 455 ffport = DMA1_FFC; 456 waport = DMA1_CHN(chan) + 1; 457 } else { /* high DMA controller */ 458 ffport = DMA2_FFC; 459 waport = DMA2_CHN(chan - 4) + 2; 460 } 461 462 disable_intr(); /* no interrupts Mr Jones! */ 463 outb(ffport, 0); /* clear register LSB flipflop */ 464 low1 = inb(waport); 465 high1 = inb(waport); 466 outb(ffport, 0); /* clear again */ 467 low2 = inb(waport); 468 high2 = inb(waport); 469 enable_intr(); /* enable interrupts again */ 470 471 /* 472 * Now decide if a wrap has tried to skew our results. 473 * Note that after TC, the count will read 0xffff, while we want 474 * to return zero, so we add and then mask to compensate. 475 */ 476 if (low1 >= low2) { 477 cnt = (low1 + (high1 << 8) + 1) & 0xffff; 478 } else { 479 cnt = (low2 + (high2 << 8) + 1) & 0xffff; 480 } 481 482 if (chan >= 4) /* high channels move words */ 483 cnt *= 2; 484 return(cnt); 485} 486 487/* 488 * Stop a DMA transfer currently in progress. 489 */ 490int 491isa_dmastop(int chan) 492{ 493 if ((dma_inuse & (1 << chan)) == 0) 494 printf("isa_dmastop: channel %d not acquired\n", chan); 495 496 if (((dma_busy & (1 << chan)) == 0) && 497 ((dma_auto_mode & (1 << chan)) == 0)) { 498 printf("chan %d not busy\n", chan); 499 return -2 ; 500 } 501 502 if ((chan & 4) == 0) { 503 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 504 } else { 505 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 506 } 507 return(isa_dmastatus(chan)); 508} 509 510/* 511 * Attach to the ISA PnP descriptor for the AT DMA controller 512 */ 513static struct isa_pnp_id atdma_ids[] = { 514 { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 515 { 0 } 516}; 517 518static int 519atdma_probe(device_t dev) 520{ 521 int result; 522 523 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 524 device_quiet(dev); 525 return(result); 526} 527 528static int 529atdma_attach(device_t dev) 530{ 531 return(0); 532} 533 534static device_method_t atdma_methods[] = { 535 /* Device interface */ 536 DEVMETHOD(device_probe, atdma_probe), 537 DEVMETHOD(device_attach, atdma_attach), 538 DEVMETHOD(device_detach, bus_generic_detach), 539 DEVMETHOD(device_shutdown, bus_generic_shutdown), 540 DEVMETHOD(device_suspend, bus_generic_suspend), 541 DEVMETHOD(device_resume, bus_generic_resume), 542 { 0, 0 } 543}; 544 545static driver_t atdma_driver = { 546 "atdma", 547 atdma_methods, 548 1, /* no softc */ 549}; 550 551static devclass_t atdma_devclass; 552 553DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 554