isa_dma.c revision 79224
145720Speter/*- 245720Speter * Copyright (c) 1991 The Regents of the University of California. 345720Speter * All rights reserved. 445720Speter * 545720Speter * This code is derived from software contributed to Berkeley by 645720Speter * William Jolitz. 745720Speter * 845720Speter * Redistribution and use in source and binary forms, with or without 945720Speter * modification, are permitted provided that the following conditions 1045720Speter * are met: 1145720Speter * 1. Redistributions of source code must retain the above copyright 1245720Speter * notice, this list of conditions and the following disclaimer. 1345720Speter * 2. Redistributions in binary form must reproduce the above copyright 1445720Speter * notice, this list of conditions and the following disclaimer in the 1545720Speter * documentation and/or other materials provided with the distribution. 1645720Speter * 3. All advertising materials mentioning features or use of this software 1745720Speter * must display the following acknowledgement: 1845720Speter * This product includes software developed by the University of 1945720Speter * California, Berkeley and its contributors. 2045720Speter * 4. Neither the name of the University nor the names of its contributors 2145720Speter * may be used to endorse or promote products derived from this software 2245720Speter * without specific prior written permission. 2345720Speter * 2445720Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2545720Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2645720Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2745720Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2845720Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2945720Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3045720Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3145720Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3245720Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3345720Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3445720Speter * SUCH DAMAGE. 3545720Speter * 3645720Speter * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 3750477Speter * $FreeBSD: head/sys/i386/isa/isa_dma.c 79224 2001-07-04 16:20:28Z dillon $ 3845720Speter */ 3945720Speter 4045720Speter/* 4145720Speter * code to manage AT bus 4245720Speter * 4345720Speter * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 4445720Speter * Fixed uninitialized variable problem and added code to deal 4545720Speter * with DMA page boundaries in isa_dmarangecheck(). Fixed word 4645720Speter * mode DMA count compution and reorganized DMA setup code in 4745720Speter * isa_dmastart() 4845720Speter */ 4945720Speter 5045720Speter#include <sys/param.h> 5145720Speter#include <sys/systm.h> 5261994Smsmith#include <sys/bus.h> 5361994Smsmith#include <sys/kernel.h> 5445720Speter#include <sys/malloc.h> 5577081Salfred#include <sys/lock.h> 5679224Sdillon#include <sys/proc.h> 5777081Salfred#include <sys/mutex.h> 5861994Smsmith#include <sys/module.h> 5945720Speter#include <vm/vm.h> 6045720Speter#include <vm/vm_param.h> 6145720Speter#include <vm/pmap.h> 6245720Speter#include <i386/isa/isa.h> 6379008Simp#include <dev/ic/i8237.h> 6461994Smsmith#include <isa/isavar.h> 6545720Speter 6645720Speter/* 6745720Speter** Register definitions for DMA controller 1 (channels 0..3): 6845720Speter*/ 6945720Speter#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 7045720Speter#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 7145720Speter#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 7245720Speter#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 7345720Speter 7445720Speter/* 7545720Speter** Register definitions for DMA controller 2 (channels 4..7): 7645720Speter*/ 7745720Speter#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 7845720Speter#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 7945720Speter#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 8045720Speter#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 8145720Speter 8245720Speterstatic int isa_dmarangecheck __P((caddr_t va, u_int length, int chan)); 8345720Speter 8445720Speterstatic caddr_t dma_bouncebuf[8]; 8545720Speterstatic u_int dma_bouncebufsize[8]; 8645720Speterstatic u_int8_t dma_bounced = 0; 8745720Speterstatic u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 8845720Speterstatic u_int8_t dma_inuse = 0; /* User for acquire/release */ 8945720Speterstatic u_int8_t dma_auto_mode = 0; 9045720Speter 9145720Speter#define VALID_DMA_MASK (7) 9245720Speter 9345720Speter/* high byte of address is stored in this port for i-th dma channel */ 9445720Speterstatic int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 9545720Speter 9645720Speter/* 9745720Speter * Setup a DMA channel's bounce buffer. 9845720Speter */ 9945720Spetervoid 10045720Speterisa_dmainit(chan, bouncebufsize) 10145720Speter int chan; 10245720Speter u_int bouncebufsize; 10345720Speter{ 10445720Speter void *buf; 10545720Speter 10645720Speter#ifdef DIAGNOSTIC 10745720Speter if (chan & ~VALID_DMA_MASK) 10845720Speter panic("isa_dmainit: channel out of range"); 10945720Speter 11045720Speter if (dma_bouncebuf[chan] != NULL) 11145720Speter panic("isa_dmainit: impossible request"); 11245720Speter#endif 11345720Speter 11445720Speter dma_bouncebufsize[chan] = bouncebufsize; 11545720Speter 11645720Speter /* Try malloc() first. It works better if it works. */ 11745720Speter buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 11845720Speter if (buf != NULL) { 11945720Speter if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 12045720Speter dma_bouncebuf[chan] = buf; 12145720Speter return; 12245720Speter } 12345720Speter free(buf, M_DEVBUF); 12445720Speter } 12545720Speter buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 12645720Speter 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 12745720Speter if (buf == NULL) 12845720Speter printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 12945720Speter else 13045720Speter dma_bouncebuf[chan] = buf; 13145720Speter} 13245720Speter 13345720Speter/* 13445720Speter * Register a DMA channel's usage. Usually called from a device driver 13545720Speter * in open() or during its initialization. 13645720Speter */ 13745720Speterint 13845720Speterisa_dma_acquire(chan) 13945720Speter int chan; 14045720Speter{ 14145720Speter#ifdef DIAGNOSTIC 14245720Speter if (chan & ~VALID_DMA_MASK) 14345720Speter panic("isa_dma_acquire: channel out of range"); 14445720Speter#endif 14545720Speter 14645720Speter if (dma_inuse & (1 << chan)) { 14745720Speter printf("isa_dma_acquire: channel %d already in use\n", chan); 14845720Speter return (EBUSY); 14945720Speter } 15045720Speter dma_inuse |= (1 << chan); 15145720Speter dma_auto_mode &= ~(1 << chan); 15245720Speter 15345720Speter return (0); 15445720Speter} 15545720Speter 15645720Speter/* 15745720Speter * Unregister a DMA channel's usage. Usually called from a device driver 15845720Speter * during close() or during its shutdown. 15945720Speter */ 16045720Spetervoid 16145720Speterisa_dma_release(chan) 16245720Speter int chan; 16345720Speter{ 16445720Speter#ifdef DIAGNOSTIC 16545720Speter if (chan & ~VALID_DMA_MASK) 16645720Speter panic("isa_dma_release: channel out of range"); 16745720Speter 16845720Speter if ((dma_inuse & (1 << chan)) == 0) 16945720Speter printf("isa_dma_release: channel %d not in use\n", chan); 17045720Speter#endif 17145720Speter 17245720Speter if (dma_busy & (1 << chan)) { 17345720Speter dma_busy &= ~(1 << chan); 17445720Speter /* 17545720Speter * XXX We should also do "dma_bounced &= (1 << chan);" 17645720Speter * because we are acting on behalf of isa_dmadone() which 17745720Speter * was not called to end the last DMA operation. This does 17845720Speter * not matter now, but it may in the future. 17945720Speter */ 18045720Speter } 18145720Speter 18245720Speter dma_inuse &= ~(1 << chan); 18345720Speter dma_auto_mode &= ~(1 << chan); 18445720Speter} 18545720Speter 18645720Speter/* 18745720Speter * isa_dmacascade(): program 8237 DMA controller channel to accept 18845720Speter * external dma control by a board. 18945720Speter */ 19045720Spetervoid 19145720Speterisa_dmacascade(chan) 19245720Speter int chan; 19345720Speter{ 19445720Speter#ifdef DIAGNOSTIC 19545720Speter if (chan & ~VALID_DMA_MASK) 19645720Speter panic("isa_dmacascade: channel out of range"); 19745720Speter#endif 19845720Speter 19945720Speter /* set dma channel mode, and set dma channel mode */ 20045720Speter if ((chan & 4) == 0) { 20145720Speter outb(DMA1_MODE, DMA37MD_CASCADE | chan); 20245720Speter outb(DMA1_SMSK, chan); 20345720Speter } else { 20445720Speter outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 20545720Speter outb(DMA2_SMSK, chan & 3); 20645720Speter } 20745720Speter} 20845720Speter 20945720Speter/* 21045720Speter * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 21145720Speter * problems by using a bounce buffer. 21245720Speter */ 21345720Spetervoid 21445720Speterisa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 21545720Speter{ 21645720Speter vm_offset_t phys; 21745720Speter int waport; 21845720Speter caddr_t newaddr; 21945720Speter 22079224Sdillon GIANT_REQUIRED; 22179224Sdillon 22245720Speter#ifdef DIAGNOSTIC 22345720Speter if (chan & ~VALID_DMA_MASK) 22445720Speter panic("isa_dmastart: channel out of range"); 22545720Speter 22645720Speter if ((chan < 4 && nbytes > (1<<16)) 22745720Speter || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 22845720Speter panic("isa_dmastart: impossible request"); 22945720Speter 23045720Speter if ((dma_inuse & (1 << chan)) == 0) 23145720Speter printf("isa_dmastart: channel %d not acquired\n", chan); 23245720Speter#endif 23345720Speter 23445720Speter#if 0 23545720Speter /* 23645720Speter * XXX This should be checked, but drivers like ad1848 only call 23745720Speter * isa_dmastart() once because they use Auto DMA mode. If we 23845720Speter * leave this in, drivers that do this will print this continuously. 23945720Speter */ 24045720Speter if (dma_busy & (1 << chan)) 24145720Speter printf("isa_dmastart: channel %d busy\n", chan); 24245720Speter#endif 24345720Speter 24445720Speter dma_busy |= (1 << chan); 24545720Speter 24645720Speter if (isa_dmarangecheck(addr, nbytes, chan)) { 24745720Speter if (dma_bouncebuf[chan] == NULL 24845720Speter || dma_bouncebufsize[chan] < nbytes) 24945720Speter panic("isa_dmastart: bad bounce buffer"); 25045720Speter dma_bounced |= (1 << chan); 25145720Speter newaddr = dma_bouncebuf[chan]; 25245720Speter 25345720Speter /* copy bounce buffer on write */ 25457973Sphk if (!(flags & ISADMA_READ)) 25545720Speter bcopy(addr, newaddr, nbytes); 25645720Speter addr = newaddr; 25745720Speter } 25845720Speter 25945720Speter /* translate to physical */ 26045720Speter phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 26145720Speter 26257973Sphk if (flags & ISADMA_RAW) { 26345720Speter dma_auto_mode |= (1 << chan); 26445720Speter } else { 26545720Speter dma_auto_mode &= ~(1 << chan); 26645720Speter } 26745720Speter 26845720Speter if ((chan & 4) == 0) { 26945720Speter /* 27045720Speter * Program one of DMA channels 0..3. These are 27145720Speter * byte mode channels. 27245720Speter */ 27345720Speter /* set dma channel mode, and reset address ff */ 27445720Speter 27557973Sphk /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 27657973Sphk if (flags & ISADMA_RAW) { 27757973Sphk if (flags & ISADMA_READ) 27845720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 27945720Speter else 28045720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 28145720Speter } 28245720Speter else 28357973Sphk if (flags & ISADMA_READ) 28445720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 28545720Speter else 28645720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 28745720Speter outb(DMA1_FFC, 0); 28845720Speter 28945720Speter /* send start address */ 29045720Speter waport = DMA1_CHN(chan); 29145720Speter outb(waport, phys); 29245720Speter outb(waport, phys>>8); 29345720Speter outb(dmapageport[chan], phys>>16); 29445720Speter 29545720Speter /* send count */ 29645720Speter outb(waport + 1, --nbytes); 29745720Speter outb(waport + 1, nbytes>>8); 29845720Speter 29945720Speter /* unmask channel */ 30045720Speter outb(DMA1_SMSK, chan); 30145720Speter } else { 30245720Speter /* 30345720Speter * Program one of DMA channels 4..7. These are 30445720Speter * word mode channels. 30545720Speter */ 30645720Speter /* set dma channel mode, and reset address ff */ 30745720Speter 30857973Sphk /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 30957973Sphk if (flags & ISADMA_RAW) { 31057973Sphk if (flags & ISADMA_READ) 31145720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 31245720Speter else 31345720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 31445720Speter } 31545720Speter else 31657973Sphk if (flags & ISADMA_READ) 31745720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 31845720Speter else 31945720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 32045720Speter outb(DMA2_FFC, 0); 32145720Speter 32245720Speter /* send start address */ 32345720Speter waport = DMA2_CHN(chan - 4); 32445720Speter outb(waport, phys>>1); 32545720Speter outb(waport, phys>>9); 32645720Speter outb(dmapageport[chan], phys>>16); 32745720Speter 32845720Speter /* send count */ 32945720Speter nbytes >>= 1; 33045720Speter outb(waport + 2, --nbytes); 33145720Speter outb(waport + 2, nbytes>>8); 33245720Speter 33345720Speter /* unmask channel */ 33445720Speter outb(DMA2_SMSK, chan & 3); 33545720Speter } 33645720Speter} 33745720Speter 33845720Spetervoid 33945720Speterisa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 34045720Speter{ 34145720Speter#ifdef DIAGNOSTIC 34245720Speter if (chan & ~VALID_DMA_MASK) 34345720Speter panic("isa_dmadone: channel out of range"); 34445720Speter 34545720Speter if ((dma_inuse & (1 << chan)) == 0) 34645720Speter printf("isa_dmadone: channel %d not acquired\n", chan); 34745720Speter#endif 34845720Speter 34945720Speter if (((dma_busy & (1 << chan)) == 0) && 35045720Speter (dma_auto_mode & (1 << chan)) == 0 ) 35145720Speter printf("isa_dmadone: channel %d not busy\n", chan); 35245720Speter 35345720Speter if ((dma_auto_mode & (1 << chan)) == 0) 35445720Speter outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 35545720Speter 35645720Speter if (dma_bounced & (1 << chan)) { 35745720Speter /* copy bounce buffer on read */ 35857973Sphk if (flags & ISADMA_READ) 35945720Speter bcopy(dma_bouncebuf[chan], addr, nbytes); 36045720Speter 36145720Speter dma_bounced &= ~(1 << chan); 36245720Speter } 36345720Speter dma_busy &= ~(1 << chan); 36445720Speter} 36545720Speter 36645720Speter/* 36745720Speter * Check for problems with the address range of a DMA transfer 36845720Speter * (non-contiguous physical pages, outside of bus address space, 36945720Speter * crossing DMA page boundaries). 37045720Speter * Return true if special handling needed. 37145720Speter */ 37245720Speter 37345720Speterstatic int 37445720Speterisa_dmarangecheck(caddr_t va, u_int length, int chan) 37545720Speter{ 37645720Speter vm_offset_t phys, priorpage = 0, endva; 37745720Speter u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 37845720Speter 37979224Sdillon GIANT_REQUIRED; 38079224Sdillon 38145720Speter endva = (vm_offset_t)round_page((vm_offset_t)va + length); 38245720Speter for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 38345720Speter phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va)); 38445720Speter#define ISARAM_END RAM_END 38545720Speter if (phys == 0) 38645720Speter panic("isa_dmacheck: no physical page present"); 38745720Speter if (phys >= ISARAM_END) 38845720Speter return (1); 38945720Speter if (priorpage) { 39045720Speter if (priorpage + PAGE_SIZE != phys) 39145720Speter return (1); 39245720Speter /* check if crossing a DMA page boundary */ 39345720Speter if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 39445720Speter return (1); 39545720Speter } 39645720Speter priorpage = phys; 39745720Speter } 39845720Speter return (0); 39945720Speter} 40045720Speter 40145720Speter/* 40245720Speter * Query the progress of a transfer on a DMA channel. 40345720Speter * 40445720Speter * To avoid having to interrupt a transfer in progress, we sample 40545720Speter * each of the high and low databytes twice, and apply the following 40645720Speter * logic to determine the correct count. 40745720Speter * 40845720Speter * Reads are performed with interrupts disabled, thus it is to be 40945720Speter * expected that the time between reads is very small. At most 41045720Speter * one rollover in the low count byte can be expected within the 41145720Speter * four reads that are performed. 41245720Speter * 41345720Speter * There are three gaps in which a rollover can occur : 41445720Speter * 41545720Speter * - read low1 41645720Speter * gap1 41745720Speter * - read high1 41845720Speter * gap2 41945720Speter * - read low2 42045720Speter * gap3 42145720Speter * - read high2 42245720Speter * 42345720Speter * If a rollover occurs in gap1 or gap2, the low2 value will be 42445720Speter * greater than the low1 value. In this case, low2 and high2 are a 42545720Speter * corresponding pair. 42645720Speter * 42745720Speter * In any other case, low1 and high1 can be considered to be correct. 42845720Speter * 42945720Speter * The function returns the number of bytes remaining in the transfer, 43045720Speter * or -1 if the channel requested is not active. 43145720Speter * 43245720Speter */ 43345720Speterint 43445720Speterisa_dmastatus(int chan) 43545720Speter{ 43645720Speter u_long cnt = 0; 43745720Speter int ffport, waport; 43845720Speter u_long low1, high1, low2, high2; 43945720Speter 44045720Speter /* channel active? */ 44145720Speter if ((dma_inuse & (1 << chan)) == 0) { 44245720Speter printf("isa_dmastatus: channel %d not active\n", chan); 44345720Speter return(-1); 44445720Speter } 44545720Speter /* channel busy? */ 44645720Speter 44745720Speter if (((dma_busy & (1 << chan)) == 0) && 44845720Speter (dma_auto_mode & (1 << chan)) == 0 ) { 44945720Speter printf("chan %d not busy\n", chan); 45045720Speter return -2 ; 45145720Speter } 45245720Speter if (chan < 4) { /* low DMA controller */ 45345720Speter ffport = DMA1_FFC; 45445720Speter waport = DMA1_CHN(chan) + 1; 45545720Speter } else { /* high DMA controller */ 45645720Speter ffport = DMA2_FFC; 45745720Speter waport = DMA2_CHN(chan - 4) + 2; 45845720Speter } 45945720Speter 46045720Speter disable_intr(); /* no interrupts Mr Jones! */ 46145720Speter outb(ffport, 0); /* clear register LSB flipflop */ 46245720Speter low1 = inb(waport); 46345720Speter high1 = inb(waport); 46445720Speter outb(ffport, 0); /* clear again */ 46545720Speter low2 = inb(waport); 46645720Speter high2 = inb(waport); 46745720Speter enable_intr(); /* enable interrupts again */ 46845720Speter 46945720Speter /* 47045720Speter * Now decide if a wrap has tried to skew our results. 47145720Speter * Note that after TC, the count will read 0xffff, while we want 47245720Speter * to return zero, so we add and then mask to compensate. 47345720Speter */ 47445720Speter if (low1 >= low2) { 47545720Speter cnt = (low1 + (high1 << 8) + 1) & 0xffff; 47645720Speter } else { 47745720Speter cnt = (low2 + (high2 << 8) + 1) & 0xffff; 47845720Speter } 47945720Speter 48045720Speter if (chan >= 4) /* high channels move words */ 48145720Speter cnt *= 2; 48245720Speter return(cnt); 48345720Speter} 48445720Speter 48545720Speter/* 48645720Speter * Stop a DMA transfer currently in progress. 48745720Speter */ 48845720Speterint 48945720Speterisa_dmastop(int chan) 49045720Speter{ 49145720Speter if ((dma_inuse & (1 << chan)) == 0) 49245720Speter printf("isa_dmastop: channel %d not acquired\n", chan); 49345720Speter 49445720Speter if (((dma_busy & (1 << chan)) == 0) && 49545720Speter ((dma_auto_mode & (1 << chan)) == 0)) { 49645720Speter printf("chan %d not busy\n", chan); 49745720Speter return -2 ; 49845720Speter } 49945720Speter 50045720Speter if ((chan & 4) == 0) { 50145720Speter outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 50245720Speter } else { 50345720Speter outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 50445720Speter } 50545720Speter return(isa_dmastatus(chan)); 50645720Speter} 50761994Smsmith 50861994Smsmith/* 50961994Smsmith * Attach to the ISA PnP descriptor for the AT DMA controller 51061994Smsmith */ 51161994Smsmithstatic struct isa_pnp_id atdma_ids[] = { 51261994Smsmith { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 51361994Smsmith { 0 } 51461994Smsmith}; 51561994Smsmith 51661994Smsmithstatic int 51761994Smsmithatdma_probe(device_t dev) 51861994Smsmith{ 51961994Smsmith int result; 52061994Smsmith 52161994Smsmith if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 52261994Smsmith device_quiet(dev); 52361994Smsmith return(result); 52461994Smsmith} 52561994Smsmith 52661994Smsmithstatic int 52761994Smsmithatdma_attach(device_t dev) 52861994Smsmith{ 52961994Smsmith return(0); 53061994Smsmith} 53161994Smsmith 53261994Smsmithstatic device_method_t atdma_methods[] = { 53361994Smsmith /* Device interface */ 53461994Smsmith DEVMETHOD(device_probe, atdma_probe), 53561994Smsmith DEVMETHOD(device_attach, atdma_attach), 53661994Smsmith DEVMETHOD(device_detach, bus_generic_detach), 53761994Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 53861994Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 53961994Smsmith DEVMETHOD(device_resume, bus_generic_resume), 54061994Smsmith { 0, 0 } 54161994Smsmith}; 54261994Smsmith 54361994Smsmithstatic driver_t atdma_driver = { 54461994Smsmith "atdma", 54561994Smsmith atdma_methods, 54661994Smsmith 1, /* no softc */ 54761994Smsmith}; 54861994Smsmith 54961994Smsmithstatic devclass_t atdma_devclass; 55061994Smsmith 55161994SmsmithDRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 552