isa_dma.c revision 61994
145720Speter/*-
245720Speter * Copyright (c) 1991 The Regents of the University of California.
345720Speter * All rights reserved.
445720Speter *
545720Speter * This code is derived from software contributed to Berkeley by
645720Speter * William Jolitz.
745720Speter *
845720Speter * Redistribution and use in source and binary forms, with or without
945720Speter * modification, are permitted provided that the following conditions
1045720Speter * are met:
1145720Speter * 1. Redistributions of source code must retain the above copyright
1245720Speter *    notice, this list of conditions and the following disclaimer.
1345720Speter * 2. Redistributions in binary form must reproduce the above copyright
1445720Speter *    notice, this list of conditions and the following disclaimer in the
1545720Speter *    documentation and/or other materials provided with the distribution.
1645720Speter * 3. All advertising materials mentioning features or use of this software
1745720Speter *    must display the following acknowledgement:
1845720Speter *	This product includes software developed by the University of
1945720Speter *	California, Berkeley and its contributors.
2045720Speter * 4. Neither the name of the University nor the names of its contributors
2145720Speter *    may be used to endorse or promote products derived from this software
2245720Speter *    without specific prior written permission.
2345720Speter *
2445720Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
2545720Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2645720Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2745720Speter * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
2845720Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2945720Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
3045720Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
3145720Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
3245720Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
3345720Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3445720Speter * SUCH DAMAGE.
3545720Speter *
3645720Speter *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
3750477Speter * $FreeBSD: head/sys/i386/isa/isa_dma.c 61994 2000-06-23 07:44:33Z msmith $
3845720Speter */
3945720Speter
4045720Speter/*
4145720Speter * code to manage AT bus
4245720Speter *
4345720Speter * 92/08/18  Frank P. MacLachlan (fpm@crash.cts.com):
4445720Speter * Fixed uninitialized variable problem and added code to deal
4545720Speter * with DMA page boundaries in isa_dmarangecheck().  Fixed word
4645720Speter * mode DMA count compution and reorganized DMA setup code in
4745720Speter * isa_dmastart()
4845720Speter */
4945720Speter
5045720Speter#include <sys/param.h>
5145720Speter#include <sys/systm.h>
5261994Smsmith#include <sys/bus.h>
5361994Smsmith#include <sys/kernel.h>
5445720Speter#include <sys/malloc.h>
5561994Smsmith#include <sys/module.h>
5645720Speter#include <vm/vm.h>
5745720Speter#include <vm/vm_param.h>
5845720Speter#include <vm/pmap.h>
5945720Speter#include <i386/isa/isa.h>
6045720Speter#include <i386/isa/ic/i8237.h>
6161994Smsmith#include <isa/isavar.h>
6245720Speter
6345720Speter/*
6445720Speter**  Register definitions for DMA controller 1 (channels 0..3):
6545720Speter*/
6645720Speter#define	DMA1_CHN(c)	(IO_DMA1 + 1*(2*(c)))	/* addr reg for channel c */
6745720Speter#define	DMA1_SMSK	(IO_DMA1 + 1*10)	/* single mask register */
6845720Speter#define	DMA1_MODE	(IO_DMA1 + 1*11)	/* mode register */
6945720Speter#define	DMA1_FFC	(IO_DMA1 + 1*12)	/* clear first/last FF */
7045720Speter
7145720Speter/*
7245720Speter**  Register definitions for DMA controller 2 (channels 4..7):
7345720Speter*/
7445720Speter#define	DMA2_CHN(c)	(IO_DMA2 + 2*(2*(c)))	/* addr reg for channel c */
7545720Speter#define	DMA2_SMSK	(IO_DMA2 + 2*10)	/* single mask register */
7645720Speter#define	DMA2_MODE	(IO_DMA2 + 2*11)	/* mode register */
7745720Speter#define	DMA2_FFC	(IO_DMA2 + 2*12)	/* clear first/last FF */
7845720Speter
7945720Speterstatic int isa_dmarangecheck __P((caddr_t va, u_int length, int chan));
8045720Speter
8145720Speterstatic caddr_t	dma_bouncebuf[8];
8245720Speterstatic u_int	dma_bouncebufsize[8];
8345720Speterstatic u_int8_t	dma_bounced = 0;
8445720Speterstatic u_int8_t	dma_busy = 0;		/* Used in isa_dmastart() */
8545720Speterstatic u_int8_t	dma_inuse = 0;		/* User for acquire/release */
8645720Speterstatic u_int8_t dma_auto_mode = 0;
8745720Speter
8845720Speter#define VALID_DMA_MASK (7)
8945720Speter
9045720Speter/* high byte of address is stored in this port for i-th dma channel */
9145720Speterstatic int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
9245720Speter
9345720Speter/*
9445720Speter * Setup a DMA channel's bounce buffer.
9545720Speter */
9645720Spetervoid
9745720Speterisa_dmainit(chan, bouncebufsize)
9845720Speter	int chan;
9945720Speter	u_int bouncebufsize;
10045720Speter{
10145720Speter	void *buf;
10245720Speter
10345720Speter#ifdef DIAGNOSTIC
10445720Speter	if (chan & ~VALID_DMA_MASK)
10545720Speter		panic("isa_dmainit: channel out of range");
10645720Speter
10745720Speter	if (dma_bouncebuf[chan] != NULL)
10845720Speter		panic("isa_dmainit: impossible request");
10945720Speter#endif
11045720Speter
11145720Speter	dma_bouncebufsize[chan] = bouncebufsize;
11245720Speter
11345720Speter	/* Try malloc() first.  It works better if it works. */
11445720Speter	buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT);
11545720Speter	if (buf != NULL) {
11645720Speter		if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) {
11745720Speter			dma_bouncebuf[chan] = buf;
11845720Speter			return;
11945720Speter		}
12045720Speter		free(buf, M_DEVBUF);
12145720Speter	}
12245720Speter	buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful,
12345720Speter			   1ul, chan & 4 ? 0x20000ul : 0x10000ul);
12445720Speter	if (buf == NULL)
12545720Speter		printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize);
12645720Speter	else
12745720Speter		dma_bouncebuf[chan] = buf;
12845720Speter}
12945720Speter
13045720Speter/*
13145720Speter * Register a DMA channel's usage.  Usually called from a device driver
13245720Speter * in open() or during its initialization.
13345720Speter */
13445720Speterint
13545720Speterisa_dma_acquire(chan)
13645720Speter	int chan;
13745720Speter{
13845720Speter#ifdef DIAGNOSTIC
13945720Speter	if (chan & ~VALID_DMA_MASK)
14045720Speter		panic("isa_dma_acquire: channel out of range");
14145720Speter#endif
14245720Speter
14345720Speter	if (dma_inuse & (1 << chan)) {
14445720Speter		printf("isa_dma_acquire: channel %d already in use\n", chan);
14545720Speter		return (EBUSY);
14645720Speter	}
14745720Speter	dma_inuse |= (1 << chan);
14845720Speter	dma_auto_mode &= ~(1 << chan);
14945720Speter
15045720Speter	return (0);
15145720Speter}
15245720Speter
15345720Speter/*
15445720Speter * Unregister a DMA channel's usage.  Usually called from a device driver
15545720Speter * during close() or during its shutdown.
15645720Speter */
15745720Spetervoid
15845720Speterisa_dma_release(chan)
15945720Speter	int chan;
16045720Speter{
16145720Speter#ifdef DIAGNOSTIC
16245720Speter	if (chan & ~VALID_DMA_MASK)
16345720Speter		panic("isa_dma_release: channel out of range");
16445720Speter
16545720Speter	if ((dma_inuse & (1 << chan)) == 0)
16645720Speter		printf("isa_dma_release: channel %d not in use\n", chan);
16745720Speter#endif
16845720Speter
16945720Speter	if (dma_busy & (1 << chan)) {
17045720Speter		dma_busy &= ~(1 << chan);
17145720Speter		/*
17245720Speter		 * XXX We should also do "dma_bounced &= (1 << chan);"
17345720Speter		 * because we are acting on behalf of isa_dmadone() which
17445720Speter		 * was not called to end the last DMA operation.  This does
17545720Speter		 * not matter now, but it may in the future.
17645720Speter		 */
17745720Speter	}
17845720Speter
17945720Speter	dma_inuse &= ~(1 << chan);
18045720Speter	dma_auto_mode &= ~(1 << chan);
18145720Speter}
18245720Speter
18345720Speter/*
18445720Speter * isa_dmacascade(): program 8237 DMA controller channel to accept
18545720Speter * external dma control by a board.
18645720Speter */
18745720Spetervoid
18845720Speterisa_dmacascade(chan)
18945720Speter	int chan;
19045720Speter{
19145720Speter#ifdef DIAGNOSTIC
19245720Speter	if (chan & ~VALID_DMA_MASK)
19345720Speter		panic("isa_dmacascade: channel out of range");
19445720Speter#endif
19545720Speter
19645720Speter	/* set dma channel mode, and set dma channel mode */
19745720Speter	if ((chan & 4) == 0) {
19845720Speter		outb(DMA1_MODE, DMA37MD_CASCADE | chan);
19945720Speter		outb(DMA1_SMSK, chan);
20045720Speter	} else {
20145720Speter		outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
20245720Speter		outb(DMA2_SMSK, chan & 3);
20345720Speter	}
20445720Speter}
20545720Speter
20645720Speter/*
20745720Speter * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
20845720Speter * problems by using a bounce buffer.
20945720Speter */
21045720Spetervoid
21145720Speterisa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
21245720Speter{
21345720Speter	vm_offset_t phys;
21445720Speter	int waport;
21545720Speter	caddr_t newaddr;
21645720Speter
21745720Speter#ifdef DIAGNOSTIC
21845720Speter	if (chan & ~VALID_DMA_MASK)
21945720Speter		panic("isa_dmastart: channel out of range");
22045720Speter
22145720Speter	if ((chan < 4 && nbytes > (1<<16))
22245720Speter	    || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
22345720Speter		panic("isa_dmastart: impossible request");
22445720Speter
22545720Speter	if ((dma_inuse & (1 << chan)) == 0)
22645720Speter		printf("isa_dmastart: channel %d not acquired\n", chan);
22745720Speter#endif
22845720Speter
22945720Speter#if 0
23045720Speter	/*
23145720Speter	 * XXX This should be checked, but drivers like ad1848 only call
23245720Speter	 * isa_dmastart() once because they use Auto DMA mode.  If we
23345720Speter	 * leave this in, drivers that do this will print this continuously.
23445720Speter	 */
23545720Speter	if (dma_busy & (1 << chan))
23645720Speter		printf("isa_dmastart: channel %d busy\n", chan);
23745720Speter#endif
23845720Speter
23945720Speter	dma_busy |= (1 << chan);
24045720Speter
24145720Speter	if (isa_dmarangecheck(addr, nbytes, chan)) {
24245720Speter		if (dma_bouncebuf[chan] == NULL
24345720Speter		    || dma_bouncebufsize[chan] < nbytes)
24445720Speter			panic("isa_dmastart: bad bounce buffer");
24545720Speter		dma_bounced |= (1 << chan);
24645720Speter		newaddr = dma_bouncebuf[chan];
24745720Speter
24845720Speter		/* copy bounce buffer on write */
24957973Sphk		if (!(flags & ISADMA_READ))
25045720Speter			bcopy(addr, newaddr, nbytes);
25145720Speter		addr = newaddr;
25245720Speter	}
25345720Speter
25445720Speter	/* translate to physical */
25545720Speter	phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
25645720Speter
25757973Sphk	if (flags & ISADMA_RAW) {
25845720Speter	    dma_auto_mode |= (1 << chan);
25945720Speter	} else {
26045720Speter	    dma_auto_mode &= ~(1 << chan);
26145720Speter	}
26245720Speter
26345720Speter	if ((chan & 4) == 0) {
26445720Speter		/*
26545720Speter		 * Program one of DMA channels 0..3.  These are
26645720Speter		 * byte mode channels.
26745720Speter		 */
26845720Speter		/* set dma channel mode, and reset address ff */
26945720Speter
27057973Sphk		/* If ISADMA_RAW flag is set, then use autoinitialise mode */
27157973Sphk		if (flags & ISADMA_RAW) {
27257973Sphk		  if (flags & ISADMA_READ)
27345720Speter			outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
27445720Speter		  else
27545720Speter			outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
27645720Speter		}
27745720Speter		else
27857973Sphk		if (flags & ISADMA_READ)
27945720Speter			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
28045720Speter		else
28145720Speter			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
28245720Speter		outb(DMA1_FFC, 0);
28345720Speter
28445720Speter		/* send start address */
28545720Speter		waport =  DMA1_CHN(chan);
28645720Speter		outb(waport, phys);
28745720Speter		outb(waport, phys>>8);
28845720Speter		outb(dmapageport[chan], phys>>16);
28945720Speter
29045720Speter		/* send count */
29145720Speter		outb(waport + 1, --nbytes);
29245720Speter		outb(waport + 1, nbytes>>8);
29345720Speter
29445720Speter		/* unmask channel */
29545720Speter		outb(DMA1_SMSK, chan);
29645720Speter	} else {
29745720Speter		/*
29845720Speter		 * Program one of DMA channels 4..7.  These are
29945720Speter		 * word mode channels.
30045720Speter		 */
30145720Speter		/* set dma channel mode, and reset address ff */
30245720Speter
30357973Sphk		/* If ISADMA_RAW flag is set, then use autoinitialise mode */
30457973Sphk		if (flags & ISADMA_RAW) {
30557973Sphk		  if (flags & ISADMA_READ)
30645720Speter			outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
30745720Speter		  else
30845720Speter			outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
30945720Speter		}
31045720Speter		else
31157973Sphk		if (flags & ISADMA_READ)
31245720Speter			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
31345720Speter		else
31445720Speter			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
31545720Speter		outb(DMA2_FFC, 0);
31645720Speter
31745720Speter		/* send start address */
31845720Speter		waport = DMA2_CHN(chan - 4);
31945720Speter		outb(waport, phys>>1);
32045720Speter		outb(waport, phys>>9);
32145720Speter		outb(dmapageport[chan], phys>>16);
32245720Speter
32345720Speter		/* send count */
32445720Speter		nbytes >>= 1;
32545720Speter		outb(waport + 2, --nbytes);
32645720Speter		outb(waport + 2, nbytes>>8);
32745720Speter
32845720Speter		/* unmask channel */
32945720Speter		outb(DMA2_SMSK, chan & 3);
33045720Speter	}
33145720Speter}
33245720Speter
33345720Spetervoid
33445720Speterisa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
33545720Speter{
33645720Speter#ifdef DIAGNOSTIC
33745720Speter	if (chan & ~VALID_DMA_MASK)
33845720Speter		panic("isa_dmadone: channel out of range");
33945720Speter
34045720Speter	if ((dma_inuse & (1 << chan)) == 0)
34145720Speter		printf("isa_dmadone: channel %d not acquired\n", chan);
34245720Speter#endif
34345720Speter
34445720Speter	if (((dma_busy & (1 << chan)) == 0) &&
34545720Speter	    (dma_auto_mode & (1 << chan)) == 0 )
34645720Speter		printf("isa_dmadone: channel %d not busy\n", chan);
34745720Speter
34845720Speter	if ((dma_auto_mode & (1 << chan)) == 0)
34945720Speter		outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
35045720Speter
35145720Speter	if (dma_bounced & (1 << chan)) {
35245720Speter		/* copy bounce buffer on read */
35357973Sphk		if (flags & ISADMA_READ)
35445720Speter			bcopy(dma_bouncebuf[chan], addr, nbytes);
35545720Speter
35645720Speter		dma_bounced &= ~(1 << chan);
35745720Speter	}
35845720Speter	dma_busy &= ~(1 << chan);
35945720Speter}
36045720Speter
36145720Speter/*
36245720Speter * Check for problems with the address range of a DMA transfer
36345720Speter * (non-contiguous physical pages, outside of bus address space,
36445720Speter * crossing DMA page boundaries).
36545720Speter * Return true if special handling needed.
36645720Speter */
36745720Speter
36845720Speterstatic int
36945720Speterisa_dmarangecheck(caddr_t va, u_int length, int chan)
37045720Speter{
37145720Speter	vm_offset_t phys, priorpage = 0, endva;
37245720Speter	u_int dma_pgmsk = (chan & 4) ?  ~(128*1024-1) : ~(64*1024-1);
37345720Speter
37445720Speter	endva = (vm_offset_t)round_page((vm_offset_t)va + length);
37545720Speter	for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
37645720Speter		phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va));
37745720Speter#define ISARAM_END	RAM_END
37845720Speter		if (phys == 0)
37945720Speter			panic("isa_dmacheck: no physical page present");
38045720Speter		if (phys >= ISARAM_END)
38145720Speter			return (1);
38245720Speter		if (priorpage) {
38345720Speter			if (priorpage + PAGE_SIZE != phys)
38445720Speter				return (1);
38545720Speter			/* check if crossing a DMA page boundary */
38645720Speter			if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
38745720Speter				return (1);
38845720Speter		}
38945720Speter		priorpage = phys;
39045720Speter	}
39145720Speter	return (0);
39245720Speter}
39345720Speter
39445720Speter/*
39545720Speter * Query the progress of a transfer on a DMA channel.
39645720Speter *
39745720Speter * To avoid having to interrupt a transfer in progress, we sample
39845720Speter * each of the high and low databytes twice, and apply the following
39945720Speter * logic to determine the correct count.
40045720Speter *
40145720Speter * Reads are performed with interrupts disabled, thus it is to be
40245720Speter * expected that the time between reads is very small.  At most
40345720Speter * one rollover in the low count byte can be expected within the
40445720Speter * four reads that are performed.
40545720Speter *
40645720Speter * There are three gaps in which a rollover can occur :
40745720Speter *
40845720Speter * - read low1
40945720Speter *              gap1
41045720Speter * - read high1
41145720Speter *              gap2
41245720Speter * - read low2
41345720Speter *              gap3
41445720Speter * - read high2
41545720Speter *
41645720Speter * If a rollover occurs in gap1 or gap2, the low2 value will be
41745720Speter * greater than the low1 value.  In this case, low2 and high2 are a
41845720Speter * corresponding pair.
41945720Speter *
42045720Speter * In any other case, low1 and high1 can be considered to be correct.
42145720Speter *
42245720Speter * The function returns the number of bytes remaining in the transfer,
42345720Speter * or -1 if the channel requested is not active.
42445720Speter *
42545720Speter */
42645720Speterint
42745720Speterisa_dmastatus(int chan)
42845720Speter{
42945720Speter	u_long	cnt = 0;
43045720Speter	int	ffport, waport;
43145720Speter	u_long	low1, high1, low2, high2;
43245720Speter
43345720Speter	/* channel active? */
43445720Speter	if ((dma_inuse & (1 << chan)) == 0) {
43545720Speter		printf("isa_dmastatus: channel %d not active\n", chan);
43645720Speter		return(-1);
43745720Speter	}
43845720Speter	/* channel busy? */
43945720Speter
44045720Speter	if (((dma_busy & (1 << chan)) == 0) &&
44145720Speter	    (dma_auto_mode & (1 << chan)) == 0 ) {
44245720Speter	    printf("chan %d not busy\n", chan);
44345720Speter	    return -2 ;
44445720Speter	}
44545720Speter	if (chan < 4) {			/* low DMA controller */
44645720Speter		ffport = DMA1_FFC;
44745720Speter		waport = DMA1_CHN(chan) + 1;
44845720Speter	} else {			/* high DMA controller */
44945720Speter		ffport = DMA2_FFC;
45045720Speter		waport = DMA2_CHN(chan - 4) + 2;
45145720Speter	}
45245720Speter
45345720Speter	disable_intr();			/* no interrupts Mr Jones! */
45445720Speter	outb(ffport, 0);		/* clear register LSB flipflop */
45545720Speter	low1 = inb(waport);
45645720Speter	high1 = inb(waport);
45745720Speter	outb(ffport, 0);		/* clear again */
45845720Speter	low2 = inb(waport);
45945720Speter	high2 = inb(waport);
46045720Speter	enable_intr();			/* enable interrupts again */
46145720Speter
46245720Speter	/*
46345720Speter	 * Now decide if a wrap has tried to skew our results.
46445720Speter	 * Note that after TC, the count will read 0xffff, while we want
46545720Speter	 * to return zero, so we add and then mask to compensate.
46645720Speter	 */
46745720Speter	if (low1 >= low2) {
46845720Speter		cnt = (low1 + (high1 << 8) + 1) & 0xffff;
46945720Speter	} else {
47045720Speter		cnt = (low2 + (high2 << 8) + 1) & 0xffff;
47145720Speter	}
47245720Speter
47345720Speter	if (chan >= 4)			/* high channels move words */
47445720Speter		cnt *= 2;
47545720Speter	return(cnt);
47645720Speter}
47745720Speter
47845720Speter/*
47945720Speter * Stop a DMA transfer currently in progress.
48045720Speter */
48145720Speterint
48245720Speterisa_dmastop(int chan)
48345720Speter{
48445720Speter	if ((dma_inuse & (1 << chan)) == 0)
48545720Speter		printf("isa_dmastop: channel %d not acquired\n", chan);
48645720Speter
48745720Speter	if (((dma_busy & (1 << chan)) == 0) &&
48845720Speter	    ((dma_auto_mode & (1 << chan)) == 0)) {
48945720Speter		printf("chan %d not busy\n", chan);
49045720Speter		return -2 ;
49145720Speter	}
49245720Speter
49345720Speter	if ((chan & 4) == 0) {
49445720Speter		outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
49545720Speter	} else {
49645720Speter		outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
49745720Speter	}
49845720Speter	return(isa_dmastatus(chan));
49945720Speter}
50061994Smsmith
50161994Smsmith/*
50261994Smsmith * Attach to the ISA PnP descriptor for the AT DMA controller
50361994Smsmith */
50461994Smsmithstatic struct isa_pnp_id atdma_ids[] = {
50561994Smsmith	{ 0x0002d041 /* PNP0200 */, "AT DMA controller" },
50661994Smsmith	{ 0 }
50761994Smsmith};
50861994Smsmith
50961994Smsmithstatic int
51061994Smsmithatdma_probe(device_t dev)
51161994Smsmith{
51261994Smsmith	int result;
51361994Smsmith
51461994Smsmith	if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
51561994Smsmith		device_quiet(dev);
51661994Smsmith	return(result);
51761994Smsmith}
51861994Smsmith
51961994Smsmithstatic int
52061994Smsmithatdma_attach(device_t dev)
52161994Smsmith{
52261994Smsmith	return(0);
52361994Smsmith}
52461994Smsmith
52561994Smsmithstatic device_method_t atdma_methods[] = {
52661994Smsmith	/* Device interface */
52761994Smsmith	DEVMETHOD(device_probe,		atdma_probe),
52861994Smsmith	DEVMETHOD(device_attach,	atdma_attach),
52961994Smsmith	DEVMETHOD(device_detach,	bus_generic_detach),
53061994Smsmith	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
53161994Smsmith	DEVMETHOD(device_suspend,	bus_generic_suspend),
53261994Smsmith	DEVMETHOD(device_resume,	bus_generic_resume),
53361994Smsmith	{ 0, 0 }
53461994Smsmith};
53561994Smsmith
53661994Smsmithstatic driver_t atdma_driver = {
53761994Smsmith	"atdma",
53861994Smsmith	atdma_methods,
53961994Smsmith	1,		/* no softc */
54061994Smsmith};
54161994Smsmith
54261994Smsmithstatic devclass_t atdma_devclass;
54361994Smsmith
54461994SmsmithDRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
545