isa_dma.c revision 45720
145720Speter/*- 245720Speter * Copyright (c) 1991 The Regents of the University of California. 345720Speter * All rights reserved. 445720Speter * 545720Speter * This code is derived from software contributed to Berkeley by 645720Speter * William Jolitz. 745720Speter * 845720Speter * Redistribution and use in source and binary forms, with or without 945720Speter * modification, are permitted provided that the following conditions 1045720Speter * are met: 1145720Speter * 1. Redistributions of source code must retain the above copyright 1245720Speter * notice, this list of conditions and the following disclaimer. 1345720Speter * 2. Redistributions in binary form must reproduce the above copyright 1445720Speter * notice, this list of conditions and the following disclaimer in the 1545720Speter * documentation and/or other materials provided with the distribution. 1645720Speter * 3. All advertising materials mentioning features or use of this software 1745720Speter * must display the following acknowledgement: 1845720Speter * This product includes software developed by the University of 1945720Speter * California, Berkeley and its contributors. 2045720Speter * 4. Neither the name of the University nor the names of its contributors 2145720Speter * may be used to endorse or promote products derived from this software 2245720Speter * without specific prior written permission. 2345720Speter * 2445720Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2545720Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2645720Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2745720Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2845720Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2945720Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3045720Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3145720Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3245720Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3345720Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3445720Speter * SUCH DAMAGE. 3545720Speter * 3645720Speter * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 3745720Speter * $Id: isa.c,v 1.117 1998/11/29 15:42:40 phk Exp $ 3845720Speter */ 3945720Speter 4045720Speter/* 4145720Speter * code to manage AT bus 4245720Speter * 4345720Speter * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 4445720Speter * Fixed uninitialized variable problem and added code to deal 4545720Speter * with DMA page boundaries in isa_dmarangecheck(). Fixed word 4645720Speter * mode DMA count compution and reorganized DMA setup code in 4745720Speter * isa_dmastart() 4845720Speter */ 4945720Speter 5045720Speter#include <sys/param.h> 5145720Speter#include <sys/systm.h> 5245720Speter#include <sys/buf.h> 5345720Speter#include <sys/malloc.h> 5445720Speter#include <machine/ipl.h> 5545720Speter#include <machine/md_var.h> 5645720Speter#ifdef APIC_IO 5745720Speter#include <machine/smp.h> 5845720Speter#endif /* APIC_IO */ 5945720Speter#include <vm/vm.h> 6045720Speter#include <vm/vm_param.h> 6145720Speter#include <vm/pmap.h> 6245720Speter#include <i386/isa/isa_device.h> 6345720Speter#include <i386/isa/intr_machdep.h> 6445720Speter#include <i386/isa/isa.h> 6545720Speter#include <i386/isa/ic/i8237.h> 6645720Speter 6745720Speter#include <sys/interrupt.h> 6845720Speter 6945720Speter#include "pnp.h" 7045720Speter#if NPNP > 0 7145720Speter#include <i386/isa/pnp.h> 7245720Speter#endif 7345720Speter 7445720Speter/* 7545720Speter** Register definitions for DMA controller 1 (channels 0..3): 7645720Speter*/ 7745720Speter#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 7845720Speter#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 7945720Speter#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 8045720Speter#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 8145720Speter 8245720Speter/* 8345720Speter** Register definitions for DMA controller 2 (channels 4..7): 8445720Speter*/ 8545720Speter#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 8645720Speter#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 8745720Speter#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 8845720Speter#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 8945720Speter 9045720Speterstatic int isa_dmarangecheck __P((caddr_t va, u_int length, int chan)); 9145720Speter 9245720Speterstatic caddr_t dma_bouncebuf[8]; 9345720Speterstatic u_int dma_bouncebufsize[8]; 9445720Speterstatic u_int8_t dma_bounced = 0; 9545720Speterstatic u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 9645720Speterstatic u_int8_t dma_inuse = 0; /* User for acquire/release */ 9745720Speterstatic u_int8_t dma_auto_mode = 0; 9845720Speter 9945720Speter#define VALID_DMA_MASK (7) 10045720Speter 10145720Speter/* high byte of address is stored in this port for i-th dma channel */ 10245720Speterstatic int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 10345720Speter 10445720Speter/* 10545720Speter * Setup a DMA channel's bounce buffer. 10645720Speter */ 10745720Spetervoid 10845720Speterisa_dmainit(chan, bouncebufsize) 10945720Speter int chan; 11045720Speter u_int bouncebufsize; 11145720Speter{ 11245720Speter void *buf; 11345720Speter 11445720Speter#ifdef DIAGNOSTIC 11545720Speter if (chan & ~VALID_DMA_MASK) 11645720Speter panic("isa_dmainit: channel out of range"); 11745720Speter 11845720Speter if (dma_bouncebuf[chan] != NULL) 11945720Speter panic("isa_dmainit: impossible request"); 12045720Speter#endif 12145720Speter 12245720Speter dma_bouncebufsize[chan] = bouncebufsize; 12345720Speter 12445720Speter /* Try malloc() first. It works better if it works. */ 12545720Speter buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 12645720Speter if (buf != NULL) { 12745720Speter if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 12845720Speter dma_bouncebuf[chan] = buf; 12945720Speter return; 13045720Speter } 13145720Speter free(buf, M_DEVBUF); 13245720Speter } 13345720Speter buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 13445720Speter 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 13545720Speter if (buf == NULL) 13645720Speter printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 13745720Speter else 13845720Speter dma_bouncebuf[chan] = buf; 13945720Speter} 14045720Speter 14145720Speter/* 14245720Speter * Register a DMA channel's usage. Usually called from a device driver 14345720Speter * in open() or during its initialization. 14445720Speter */ 14545720Speterint 14645720Speterisa_dma_acquire(chan) 14745720Speter int chan; 14845720Speter{ 14945720Speter#ifdef DIAGNOSTIC 15045720Speter if (chan & ~VALID_DMA_MASK) 15145720Speter panic("isa_dma_acquire: channel out of range"); 15245720Speter#endif 15345720Speter 15445720Speter if (dma_inuse & (1 << chan)) { 15545720Speter printf("isa_dma_acquire: channel %d already in use\n", chan); 15645720Speter return (EBUSY); 15745720Speter } 15845720Speter dma_inuse |= (1 << chan); 15945720Speter dma_auto_mode &= ~(1 << chan); 16045720Speter 16145720Speter return (0); 16245720Speter} 16345720Speter 16445720Speter/* 16545720Speter * Unregister a DMA channel's usage. Usually called from a device driver 16645720Speter * during close() or during its shutdown. 16745720Speter */ 16845720Spetervoid 16945720Speterisa_dma_release(chan) 17045720Speter int chan; 17145720Speter{ 17245720Speter#ifdef DIAGNOSTIC 17345720Speter if (chan & ~VALID_DMA_MASK) 17445720Speter panic("isa_dma_release: channel out of range"); 17545720Speter 17645720Speter if ((dma_inuse & (1 << chan)) == 0) 17745720Speter printf("isa_dma_release: channel %d not in use\n", chan); 17845720Speter#endif 17945720Speter 18045720Speter if (dma_busy & (1 << chan)) { 18145720Speter dma_busy &= ~(1 << chan); 18245720Speter /* 18345720Speter * XXX We should also do "dma_bounced &= (1 << chan);" 18445720Speter * because we are acting on behalf of isa_dmadone() which 18545720Speter * was not called to end the last DMA operation. This does 18645720Speter * not matter now, but it may in the future. 18745720Speter */ 18845720Speter } 18945720Speter 19045720Speter dma_inuse &= ~(1 << chan); 19145720Speter dma_auto_mode &= ~(1 << chan); 19245720Speter} 19345720Speter 19445720Speter/* 19545720Speter * isa_dmacascade(): program 8237 DMA controller channel to accept 19645720Speter * external dma control by a board. 19745720Speter */ 19845720Spetervoid 19945720Speterisa_dmacascade(chan) 20045720Speter int chan; 20145720Speter{ 20245720Speter#ifdef DIAGNOSTIC 20345720Speter if (chan & ~VALID_DMA_MASK) 20445720Speter panic("isa_dmacascade: channel out of range"); 20545720Speter#endif 20645720Speter 20745720Speter /* set dma channel mode, and set dma channel mode */ 20845720Speter if ((chan & 4) == 0) { 20945720Speter outb(DMA1_MODE, DMA37MD_CASCADE | chan); 21045720Speter outb(DMA1_SMSK, chan); 21145720Speter } else { 21245720Speter outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 21345720Speter outb(DMA2_SMSK, chan & 3); 21445720Speter } 21545720Speter} 21645720Speter 21745720Speter/* 21845720Speter * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 21945720Speter * problems by using a bounce buffer. 22045720Speter */ 22145720Spetervoid 22245720Speterisa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 22345720Speter{ 22445720Speter vm_offset_t phys; 22545720Speter int waport; 22645720Speter caddr_t newaddr; 22745720Speter 22845720Speter#ifdef DIAGNOSTIC 22945720Speter if (chan & ~VALID_DMA_MASK) 23045720Speter panic("isa_dmastart: channel out of range"); 23145720Speter 23245720Speter if ((chan < 4 && nbytes > (1<<16)) 23345720Speter || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 23445720Speter panic("isa_dmastart: impossible request"); 23545720Speter 23645720Speter if ((dma_inuse & (1 << chan)) == 0) 23745720Speter printf("isa_dmastart: channel %d not acquired\n", chan); 23845720Speter#endif 23945720Speter 24045720Speter#if 0 24145720Speter /* 24245720Speter * XXX This should be checked, but drivers like ad1848 only call 24345720Speter * isa_dmastart() once because they use Auto DMA mode. If we 24445720Speter * leave this in, drivers that do this will print this continuously. 24545720Speter */ 24645720Speter if (dma_busy & (1 << chan)) 24745720Speter printf("isa_dmastart: channel %d busy\n", chan); 24845720Speter#endif 24945720Speter 25045720Speter dma_busy |= (1 << chan); 25145720Speter 25245720Speter if (isa_dmarangecheck(addr, nbytes, chan)) { 25345720Speter if (dma_bouncebuf[chan] == NULL 25445720Speter || dma_bouncebufsize[chan] < nbytes) 25545720Speter panic("isa_dmastart: bad bounce buffer"); 25645720Speter dma_bounced |= (1 << chan); 25745720Speter newaddr = dma_bouncebuf[chan]; 25845720Speter 25945720Speter /* copy bounce buffer on write */ 26045720Speter if (!(flags & B_READ)) 26145720Speter bcopy(addr, newaddr, nbytes); 26245720Speter addr = newaddr; 26345720Speter } 26445720Speter 26545720Speter /* translate to physical */ 26645720Speter phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 26745720Speter 26845720Speter if (flags & B_RAW) { 26945720Speter dma_auto_mode |= (1 << chan); 27045720Speter } else { 27145720Speter dma_auto_mode &= ~(1 << chan); 27245720Speter } 27345720Speter 27445720Speter if ((chan & 4) == 0) { 27545720Speter /* 27645720Speter * Program one of DMA channels 0..3. These are 27745720Speter * byte mode channels. 27845720Speter */ 27945720Speter /* set dma channel mode, and reset address ff */ 28045720Speter 28145720Speter /* If B_RAW flag is set, then use autoinitialise mode */ 28245720Speter if (flags & B_RAW) { 28345720Speter if (flags & B_READ) 28445720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 28545720Speter else 28645720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 28745720Speter } 28845720Speter else 28945720Speter if (flags & B_READ) 29045720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 29145720Speter else 29245720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 29345720Speter outb(DMA1_FFC, 0); 29445720Speter 29545720Speter /* send start address */ 29645720Speter waport = DMA1_CHN(chan); 29745720Speter outb(waport, phys); 29845720Speter outb(waport, phys>>8); 29945720Speter outb(dmapageport[chan], phys>>16); 30045720Speter 30145720Speter /* send count */ 30245720Speter outb(waport + 1, --nbytes); 30345720Speter outb(waport + 1, nbytes>>8); 30445720Speter 30545720Speter /* unmask channel */ 30645720Speter outb(DMA1_SMSK, chan); 30745720Speter } else { 30845720Speter /* 30945720Speter * Program one of DMA channels 4..7. These are 31045720Speter * word mode channels. 31145720Speter */ 31245720Speter /* set dma channel mode, and reset address ff */ 31345720Speter 31445720Speter /* If B_RAW flag is set, then use autoinitialise mode */ 31545720Speter if (flags & B_RAW) { 31645720Speter if (flags & B_READ) 31745720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 31845720Speter else 31945720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 32045720Speter } 32145720Speter else 32245720Speter if (flags & B_READ) 32345720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 32445720Speter else 32545720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 32645720Speter outb(DMA2_FFC, 0); 32745720Speter 32845720Speter /* send start address */ 32945720Speter waport = DMA2_CHN(chan - 4); 33045720Speter outb(waport, phys>>1); 33145720Speter outb(waport, phys>>9); 33245720Speter outb(dmapageport[chan], phys>>16); 33345720Speter 33445720Speter /* send count */ 33545720Speter nbytes >>= 1; 33645720Speter outb(waport + 2, --nbytes); 33745720Speter outb(waport + 2, nbytes>>8); 33845720Speter 33945720Speter /* unmask channel */ 34045720Speter outb(DMA2_SMSK, chan & 3); 34145720Speter } 34245720Speter} 34345720Speter 34445720Spetervoid 34545720Speterisa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 34645720Speter{ 34745720Speter#ifdef DIAGNOSTIC 34845720Speter if (chan & ~VALID_DMA_MASK) 34945720Speter panic("isa_dmadone: channel out of range"); 35045720Speter 35145720Speter if ((dma_inuse & (1 << chan)) == 0) 35245720Speter printf("isa_dmadone: channel %d not acquired\n", chan); 35345720Speter#endif 35445720Speter 35545720Speter if (((dma_busy & (1 << chan)) == 0) && 35645720Speter (dma_auto_mode & (1 << chan)) == 0 ) 35745720Speter printf("isa_dmadone: channel %d not busy\n", chan); 35845720Speter 35945720Speter if ((dma_auto_mode & (1 << chan)) == 0) 36045720Speter outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 36145720Speter 36245720Speter if (dma_bounced & (1 << chan)) { 36345720Speter /* copy bounce buffer on read */ 36445720Speter if (flags & B_READ) 36545720Speter bcopy(dma_bouncebuf[chan], addr, nbytes); 36645720Speter 36745720Speter dma_bounced &= ~(1 << chan); 36845720Speter } 36945720Speter dma_busy &= ~(1 << chan); 37045720Speter} 37145720Speter 37245720Speter/* 37345720Speter * Check for problems with the address range of a DMA transfer 37445720Speter * (non-contiguous physical pages, outside of bus address space, 37545720Speter * crossing DMA page boundaries). 37645720Speter * Return true if special handling needed. 37745720Speter */ 37845720Speter 37945720Speterstatic int 38045720Speterisa_dmarangecheck(caddr_t va, u_int length, int chan) 38145720Speter{ 38245720Speter vm_offset_t phys, priorpage = 0, endva; 38345720Speter u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 38445720Speter 38545720Speter endva = (vm_offset_t)round_page((vm_offset_t)va + length); 38645720Speter for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 38745720Speter phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va)); 38845720Speter#define ISARAM_END RAM_END 38945720Speter if (phys == 0) 39045720Speter panic("isa_dmacheck: no physical page present"); 39145720Speter if (phys >= ISARAM_END) 39245720Speter return (1); 39345720Speter if (priorpage) { 39445720Speter if (priorpage + PAGE_SIZE != phys) 39545720Speter return (1); 39645720Speter /* check if crossing a DMA page boundary */ 39745720Speter if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 39845720Speter return (1); 39945720Speter } 40045720Speter priorpage = phys; 40145720Speter } 40245720Speter return (0); 40345720Speter} 40445720Speter 40545720Speter/* 40645720Speter * Query the progress of a transfer on a DMA channel. 40745720Speter * 40845720Speter * To avoid having to interrupt a transfer in progress, we sample 40945720Speter * each of the high and low databytes twice, and apply the following 41045720Speter * logic to determine the correct count. 41145720Speter * 41245720Speter * Reads are performed with interrupts disabled, thus it is to be 41345720Speter * expected that the time between reads is very small. At most 41445720Speter * one rollover in the low count byte can be expected within the 41545720Speter * four reads that are performed. 41645720Speter * 41745720Speter * There are three gaps in which a rollover can occur : 41845720Speter * 41945720Speter * - read low1 42045720Speter * gap1 42145720Speter * - read high1 42245720Speter * gap2 42345720Speter * - read low2 42445720Speter * gap3 42545720Speter * - read high2 42645720Speter * 42745720Speter * If a rollover occurs in gap1 or gap2, the low2 value will be 42845720Speter * greater than the low1 value. In this case, low2 and high2 are a 42945720Speter * corresponding pair. 43045720Speter * 43145720Speter * In any other case, low1 and high1 can be considered to be correct. 43245720Speter * 43345720Speter * The function returns the number of bytes remaining in the transfer, 43445720Speter * or -1 if the channel requested is not active. 43545720Speter * 43645720Speter */ 43745720Speterint 43845720Speterisa_dmastatus(int chan) 43945720Speter{ 44045720Speter u_long cnt = 0; 44145720Speter int ffport, waport; 44245720Speter u_long low1, high1, low2, high2; 44345720Speter 44445720Speter /* channel active? */ 44545720Speter if ((dma_inuse & (1 << chan)) == 0) { 44645720Speter printf("isa_dmastatus: channel %d not active\n", chan); 44745720Speter return(-1); 44845720Speter } 44945720Speter /* channel busy? */ 45045720Speter 45145720Speter if (((dma_busy & (1 << chan)) == 0) && 45245720Speter (dma_auto_mode & (1 << chan)) == 0 ) { 45345720Speter printf("chan %d not busy\n", chan); 45445720Speter return -2 ; 45545720Speter } 45645720Speter if (chan < 4) { /* low DMA controller */ 45745720Speter ffport = DMA1_FFC; 45845720Speter waport = DMA1_CHN(chan) + 1; 45945720Speter } else { /* high DMA controller */ 46045720Speter ffport = DMA2_FFC; 46145720Speter waport = DMA2_CHN(chan - 4) + 2; 46245720Speter } 46345720Speter 46445720Speter disable_intr(); /* no interrupts Mr Jones! */ 46545720Speter outb(ffport, 0); /* clear register LSB flipflop */ 46645720Speter low1 = inb(waport); 46745720Speter high1 = inb(waport); 46845720Speter outb(ffport, 0); /* clear again */ 46945720Speter low2 = inb(waport); 47045720Speter high2 = inb(waport); 47145720Speter enable_intr(); /* enable interrupts again */ 47245720Speter 47345720Speter /* 47445720Speter * Now decide if a wrap has tried to skew our results. 47545720Speter * Note that after TC, the count will read 0xffff, while we want 47645720Speter * to return zero, so we add and then mask to compensate. 47745720Speter */ 47845720Speter if (low1 >= low2) { 47945720Speter cnt = (low1 + (high1 << 8) + 1) & 0xffff; 48045720Speter } else { 48145720Speter cnt = (low2 + (high2 << 8) + 1) & 0xffff; 48245720Speter } 48345720Speter 48445720Speter if (chan >= 4) /* high channels move words */ 48545720Speter cnt *= 2; 48645720Speter return(cnt); 48745720Speter} 48845720Speter 48945720Speter/* 49045720Speter * Stop a DMA transfer currently in progress. 49145720Speter */ 49245720Speterint 49345720Speterisa_dmastop(int chan) 49445720Speter{ 49545720Speter if ((dma_inuse & (1 << chan)) == 0) 49645720Speter printf("isa_dmastop: channel %d not acquired\n", chan); 49745720Speter 49845720Speter if (((dma_busy & (1 << chan)) == 0) && 49945720Speter ((dma_auto_mode & (1 << chan)) == 0)) { 50045720Speter printf("chan %d not busy\n", chan); 50145720Speter return -2 ; 50245720Speter } 50345720Speter 50445720Speter if ((chan & 4) == 0) { 50545720Speter outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 50645720Speter } else { 50745720Speter outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 50845720Speter } 50945720Speter return(isa_dmastatus(chan)); 51045720Speter} 511