isa_dma.c revision 199104
145720Speter/*-
245720Speter * Copyright (c) 1991 The Regents of the University of California.
345720Speter * All rights reserved.
445720Speter *
545720Speter * This code is derived from software contributed to Berkeley by
645720Speter * William Jolitz.
745720Speter *
845720Speter * Redistribution and use in source and binary forms, with or without
945720Speter * modification, are permitted provided that the following conditions
1045720Speter * are met:
1145720Speter * 1. Redistributions of source code must retain the above copyright
1245720Speter *    notice, this list of conditions and the following disclaimer.
1345720Speter * 2. Redistributions in binary form must reproduce the above copyright
1445720Speter *    notice, this list of conditions and the following disclaimer in the
1545720Speter *    documentation and/or other materials provided with the distribution.
1645720Speter * 4. Neither the name of the University nor the names of its contributors
1745720Speter *    may be used to endorse or promote products derived from this software
1845720Speter *    without specific prior written permission.
1945720Speter *
2045720Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
2145720Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2245720Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2345720Speter * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
2445720Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2545720Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2645720Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2745720Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2845720Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2945720Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3045720Speter * SUCH DAMAGE.
3145720Speter *
3245720Speter *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
3345720Speter */
3445720Speter
3545720Speter#include <sys/cdefs.h>
3645720Speter__FBSDID("$FreeBSD: head/sys/i386/isa/isa_dma.c 199104 2009-11-09 20:29:10Z rdivacky $");
3750477Speter
3845720Speter/*
3945720Speter * code to manage AT bus
4045720Speter *
4145720Speter * 92/08/18  Frank P. MacLachlan (fpm@crash.cts.com):
4245720Speter * Fixed uninitialized variable problem and added code to deal
4345720Speter * with DMA page boundaries in isa_dmarangecheck().  Fixed word
4445720Speter * mode DMA count compution and reorganized DMA setup code in
4545720Speter * isa_dmastart()
4645720Speter */
4745720Speter
4845720Speter#include <sys/param.h>
4945720Speter#include <sys/systm.h>
5045720Speter#include <sys/bus.h>
5145720Speter#include <sys/kernel.h>
5261994Smsmith#include <sys/malloc.h>
5361994Smsmith#include <sys/lock.h>
5445720Speter#include <sys/proc.h>
5577081Salfred#include <sys/mutex.h>
5679224Sdillon#include <sys/module.h>
5777081Salfred#include <vm/vm.h>
5861994Smsmith#include <vm/vm_param.h>
5945720Speter#include <vm/pmap.h>
6045720Speter#include <isa/isareg.h>
6145720Speter#include <isa/isavar.h>
6245720Speter#include <isa/isa_dmareg.h>
6379008Simp
6461994Smsmithstatic int isa_dmarangecheck(caddr_t va, u_int length, int chan);
6545720Speter
6645720Speterstatic caddr_t	dma_bouncebuf[8];
6745720Speterstatic u_int	dma_bouncebufsize[8];
6845720Speterstatic u_int8_t	dma_bounced = 0;
6945720Speterstatic u_int8_t	dma_busy = 0;		/* Used in isa_dmastart() */
7045720Speterstatic u_int8_t	dma_inuse = 0;		/* User for acquire/release */
7145720Speterstatic u_int8_t dma_auto_mode = 0;
7245720Speterstatic struct mtx isa_dma_lock;
7345720SpeterMTX_SYSINIT(isa_dma_lock, &isa_dma_lock, "isa DMA lock", MTX_DEF);
7445720Speter
7545720Speter#define VALID_DMA_MASK (7)
7645720Speter
7745720Speter/* high byte of address is stored in this port for i-th dma channel */
7845720Speterstatic int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
7945720Speter
8045720Speter/*
8145720Speter * Setup a DMA channel's bounce buffer.
8292765Salfred */
8345720Speterint
8445720Speterisa_dma_init(int chan, u_int bouncebufsize, int flag)
8545720Speter{
8645720Speter	void *buf;
8745720Speter	int contig;
8845720Speter
8945720Speter#ifdef DIAGNOSTIC
9045720Speter	if (chan & ~VALID_DMA_MASK)
9145720Speter		panic("isa_dma_init: channel out of range");
9245720Speter#endif
9345720Speter
9445720Speter
9545720Speter	/* Try malloc() first.  It works better if it works. */
9645720Speter	buf = malloc(bouncebufsize, M_DEVBUF, flag);
9745720Speter	if (buf != NULL) {
9845720Speter		if (isa_dmarangecheck(buf, bouncebufsize, chan) != 0) {
9945720Speter			free(buf, M_DEVBUF);
10045720Speter			buf = NULL;
10145720Speter		}
10245720Speter		contig = 0;
10345720Speter	}
10445720Speter
10545720Speter	if (buf == NULL) {
10645720Speter		buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful,
10745720Speter			   1ul, chan & 4 ? 0x20000ul : 0x10000ul);
10845720Speter		contig = 1;
10945720Speter	}
11045720Speter
11145720Speter	if (buf == NULL)
11245720Speter		return (ENOMEM);
11345720Speter
11445720Speter	mtx_lock(&isa_dma_lock);
11545720Speter	/*
11645720Speter	 * If a DMA channel is shared, both drivers have to call isa_dma_init
11745720Speter	 * since they don't know that the other driver will do it.
11845720Speter	 * Just return if we're already set up good.
11945720Speter	 * XXX: this only works if they agree on the bouncebuf size.  This
12045720Speter	 * XXX: is typically the case since they are multiple instances of
12145720Speter	 * XXX: the same driver.
12245720Speter	 */
12345720Speter	if (dma_bouncebuf[chan] != NULL) {
12445720Speter		if (contig)
12545720Speter			contigfree(buf, bouncebufsize, M_DEVBUF);
12645720Speter		else
12745720Speter			free(buf, M_DEVBUF);
12845720Speter		mtx_unlock(&isa_dma_lock);
12945720Speter		return (0);
13045720Speter	}
13145720Speter
13245720Speter	dma_bouncebufsize[chan] = bouncebufsize;
13345720Speter	dma_bouncebuf[chan] = buf;
13445720Speter
13545720Speter	mtx_unlock(&isa_dma_lock);
13645720Speter
13745720Speter	return (0);
13845720Speter}
13945720Speter
14045720Speter/*
14145720Speter * Register a DMA channel's usage.  Usually called from a device driver
14245720Speter * in open() or during its initialization.
14345720Speter */
14445720Speterint
14545720Speterisa_dma_acquire(chan)
14645720Speter	int chan;
14745720Speter{
14845720Speter#ifdef DIAGNOSTIC
14945720Speter	if (chan & ~VALID_DMA_MASK)
15045720Speter		panic("isa_dma_acquire: channel out of range");
15145720Speter#endif
15245720Speter
15345720Speter	mtx_lock(&isa_dma_lock);
15445720Speter	if (dma_inuse & (1 << chan)) {
15545720Speter		printf("isa_dma_acquire: channel %d already in use\n", chan);
15645720Speter		mtx_unlock(&isa_dma_lock);
15745720Speter		return (EBUSY);
15845720Speter	}
15945720Speter	dma_inuse |= (1 << chan);
16045720Speter	dma_auto_mode &= ~(1 << chan);
16145720Speter	mtx_unlock(&isa_dma_lock);
16245720Speter
16345720Speter	return (0);
16445720Speter}
16545720Speter
16645720Speter/*
16745720Speter * Unregister a DMA channel's usage.  Usually called from a device driver
16845720Speter * during close() or during its shutdown.
16945720Speter */
17045720Spetervoid
17145720Speterisa_dma_release(chan)
17245720Speter	int chan;
17345720Speter{
17445720Speter#ifdef DIAGNOSTIC
17545720Speter	if (chan & ~VALID_DMA_MASK)
17645720Speter		panic("isa_dma_release: channel out of range");
17745720Speter
17845720Speter	mtx_lock(&isa_dma_lock);
17945720Speter	if ((dma_inuse & (1 << chan)) == 0)
18045720Speter		printf("isa_dma_release: channel %d not in use\n", chan);
18145720Speter#else
18245720Speter	mtx_lock(&isa_dma_lock);
18345720Speter#endif
18445720Speter
18545720Speter	if (dma_busy & (1 << chan)) {
18645720Speter		dma_busy &= ~(1 << chan);
18745720Speter		/*
18845720Speter		 * XXX We should also do "dma_bounced &= (1 << chan);"
18945720Speter		 * because we are acting on behalf of isa_dmadone() which
19045720Speter		 * was not called to end the last DMA operation.  This does
19145720Speter		 * not matter now, but it may in the future.
19245720Speter		 */
19345720Speter	}
19445720Speter
19545720Speter	dma_inuse &= ~(1 << chan);
19645720Speter	dma_auto_mode &= ~(1 << chan);
19745720Speter
19845720Speter	mtx_unlock(&isa_dma_lock);
19945720Speter}
20045720Speter
20145720Speter/*
20245720Speter * isa_dmacascade(): program 8237 DMA controller channel to accept
20345720Speter * external dma control by a board.
20445720Speter */
20545720Spetervoid
20645720Speterisa_dmacascade(chan)
20745720Speter	int chan;
20845720Speter{
20945720Speter#ifdef DIAGNOSTIC
21045720Speter	if (chan & ~VALID_DMA_MASK)
21145720Speter		panic("isa_dmacascade: channel out of range");
21245720Speter#endif
21345720Speter
21445720Speter	mtx_lock(&isa_dma_lock);
21545720Speter	/* set dma channel mode, and set dma channel mode */
21645720Speter	if ((chan & 4) == 0) {
21745720Speter		outb(DMA1_MODE, DMA37MD_CASCADE | chan);
21845720Speter		outb(DMA1_SMSK, chan);
21945720Speter	} else {
22079224Sdillon		outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
22179224Sdillon		outb(DMA2_SMSK, chan & 3);
22245720Speter	}
22345720Speter	mtx_unlock(&isa_dma_lock);
22445720Speter}
22545720Speter
22645720Speter/*
22745720Speter * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
22845720Speter * problems by using a bounce buffer.
22945720Speter */
23045720Spetervoid
23145720Speterisa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
23245720Speter{
23345720Speter	vm_paddr_t phys;
23445720Speter	int waport;
23545720Speter	caddr_t newaddr;
23645720Speter	int dma_range_checked;
23745720Speter
23845720Speter	/* translate to physical */
23945720Speter	phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
24045720Speter	dma_range_checked = isa_dmarangecheck(addr, nbytes, chan);
24145720Speter
24245720Speter#ifdef DIAGNOSTIC
24345720Speter	if (chan & ~VALID_DMA_MASK)
24445720Speter		panic("isa_dmastart: channel out of range");
24545720Speter
24645720Speter	if ((chan < 4 && nbytes > (1<<16))
24745720Speter	    || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
24845720Speter		panic("isa_dmastart: impossible request");
24945720Speter
25045720Speter	mtx_lock(&isa_dma_lock);
25145720Speter	if ((dma_inuse & (1 << chan)) == 0)
25245720Speter		printf("isa_dmastart: channel %d not acquired\n", chan);
25345720Speter#else
25457973Sphk	mtx_lock(&isa_dma_lock);
25545720Speter#endif
25645720Speter
25745720Speter#if 0
25845720Speter	/*
25945720Speter	 * XXX This should be checked, but drivers like ad1848 only call
26045720Speter	 * isa_dmastart() once because they use Auto DMA mode.  If we
26145720Speter	 * leave this in, drivers that do this will print this continuously.
26257973Sphk	 */
26345720Speter	if (dma_busy & (1 << chan))
26445720Speter		printf("isa_dmastart: channel %d busy\n", chan);
26545720Speter#endif
26645720Speter
26745720Speter	dma_busy |= (1 << chan);
26845720Speter
26945720Speter	if (dma_range_checked) {
27045720Speter		if (dma_bouncebuf[chan] == NULL
27145720Speter		    || dma_bouncebufsize[chan] < nbytes)
27245720Speter			panic("isa_dmastart: bad bounce buffer");
27345720Speter		dma_bounced |= (1 << chan);
27445720Speter		newaddr = dma_bouncebuf[chan];
27557973Sphk
27657973Sphk		/* copy bounce buffer on write */
27757973Sphk		if (!(flags & ISADMA_READ))
27845720Speter			bcopy(addr, newaddr, nbytes);
27945720Speter		addr = newaddr;
28045720Speter	}
28145720Speter
28245720Speter	if (flags & ISADMA_RAW) {
28357973Sphk	    dma_auto_mode |= (1 << chan);
28445720Speter	} else {
28545720Speter	    dma_auto_mode &= ~(1 << chan);
28645720Speter	}
28745720Speter
28845720Speter	if ((chan & 4) == 0) {
28945720Speter		/*
29045720Speter		 * Program one of DMA channels 0..3.  These are
29145720Speter		 * byte mode channels.
29245720Speter		 */
29345720Speter		/* set dma channel mode, and reset address ff */
29445720Speter
29545720Speter		/* If ISADMA_RAW flag is set, then use autoinitialise mode */
29645720Speter		if (flags & ISADMA_RAW) {
29745720Speter		  if (flags & ISADMA_READ)
29845720Speter			outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
29945720Speter		  else
30045720Speter			outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
30145720Speter		}
30245720Speter		else
30345720Speter		if (flags & ISADMA_READ)
30445720Speter			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
30545720Speter		else
30645720Speter			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
30745720Speter		outb(DMA1_FFC, 0);
30857973Sphk
30957973Sphk		/* send start address */
31057973Sphk		waport =  DMA1_CHN(chan);
31145720Speter		outb(waport, phys);
31245720Speter		outb(waport, phys>>8);
31345720Speter		outb(dmapageport[chan], phys>>16);
31445720Speter
31545720Speter		/* send count */
31657973Sphk		outb(waport + 1, --nbytes);
31745720Speter		outb(waport + 1, nbytes>>8);
31845720Speter
31945720Speter		/* unmask channel */
32045720Speter		outb(DMA1_SMSK, chan);
32145720Speter	} else {
32245720Speter		/*
32345720Speter		 * Program one of DMA channels 4..7.  These are
32445720Speter		 * word mode channels.
32545720Speter		 */
32645720Speter		/* set dma channel mode, and reset address ff */
32745720Speter
32845720Speter		/* If ISADMA_RAW flag is set, then use autoinitialise mode */
32945720Speter		if (flags & ISADMA_RAW) {
33045720Speter		  if (flags & ISADMA_READ)
33145720Speter			outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
33245720Speter		  else
33345720Speter			outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
33445720Speter		}
33545720Speter		else
33645720Speter		if (flags & ISADMA_READ)
33745720Speter			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
33845720Speter		else
33945720Speter			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
34045720Speter		outb(DMA2_FFC, 0);
34145720Speter
34245720Speter		/* send start address */
34345720Speter		waport = DMA2_CHN(chan - 4);
34445720Speter		outb(waport, phys>>1);
34545720Speter		outb(waport, phys>>9);
34645720Speter		outb(dmapageport[chan], phys>>16);
34745720Speter
34845720Speter		/* send count */
34945720Speter		nbytes >>= 1;
35045720Speter		outb(waport + 2, --nbytes);
35145720Speter		outb(waport + 2, nbytes>>8);
35245720Speter
35345720Speter		/* unmask channel */
35445720Speter		outb(DMA2_SMSK, chan & 3);
35545720Speter	}
35645720Speter	mtx_unlock(&isa_dma_lock);
35745720Speter}
35857973Sphk
35945720Spetervoid
36045720Speterisa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
36145720Speter{
36245720Speter#ifdef DIAGNOSTIC
36345720Speter	if (chan & ~VALID_DMA_MASK)
36445720Speter		panic("isa_dmadone: channel out of range");
36545720Speter
36645720Speter	if ((dma_inuse & (1 << chan)) == 0)
36745720Speter		printf("isa_dmadone: channel %d not acquired\n", chan);
36845720Speter#endif
36945720Speter
37045720Speter	mtx_lock(&isa_dma_lock);
37145720Speter	if (((dma_busy & (1 << chan)) == 0) &&
37245720Speter	    (dma_auto_mode & (1 << chan)) == 0 )
37345720Speter		printf("isa_dmadone: channel %d not busy\n", chan);
37445720Speter
37545720Speter	if ((dma_auto_mode & (1 << chan)) == 0)
37645720Speter		outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
37745720Speter
37845720Speter	if (dma_bounced & (1 << chan)) {
37979224Sdillon		/* copy bounce buffer on read */
38079224Sdillon		if (flags & ISADMA_READ)
38145720Speter			bcopy(dma_bouncebuf[chan], addr, nbytes);
38245720Speter
38345720Speter		dma_bounced &= ~(1 << chan);
38445720Speter	}
38545720Speter	dma_busy &= ~(1 << chan);
38645720Speter	mtx_unlock(&isa_dma_lock);
38745720Speter}
38845720Speter
38945720Speter/*
39045720Speter * Check for problems with the address range of a DMA transfer
39145720Speter * (non-contiguous physical pages, outside of bus address space,
39245720Speter * crossing DMA page boundaries).
39345720Speter * Return true if special handling needed.
39445720Speter */
39545720Speter
39645720Speterstatic int
39745720Speterisa_dmarangecheck(caddr_t va, u_int length, int chan)
39845720Speter{
39945720Speter	vm_paddr_t phys, priorpage = 0;
40045720Speter	vm_offset_t endva;
40145720Speter	u_int dma_pgmsk = (chan & 4) ?  ~(128*1024-1) : ~(64*1024-1);
40245720Speter
40345720Speter	endva = (vm_offset_t)round_page((vm_offset_t)va + length);
40445720Speter	for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
40545720Speter		phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
40645720Speter#define ISARAM_END	RAM_END
40745720Speter		if (phys == 0)
40845720Speter			panic("isa_dmacheck: no physical page present");
40945720Speter		if (phys >= ISARAM_END)
41045720Speter			return (1);
41145720Speter		if (priorpage) {
41245720Speter			if (priorpage + PAGE_SIZE != phys)
41345720Speter				return (1);
41445720Speter			/* check if crossing a DMA page boundary */
41545720Speter			if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
41645720Speter				return (1);
41745720Speter		}
41845720Speter		priorpage = phys;
41945720Speter	}
42045720Speter	return (0);
42145720Speter}
42245720Speter
42345720Speter/*
42445720Speter * Query the progress of a transfer on a DMA channel.
42545720Speter *
42645720Speter * To avoid having to interrupt a transfer in progress, we sample
42745720Speter * each of the high and low databytes twice, and apply the following
42845720Speter * logic to determine the correct count.
42945720Speter *
43045720Speter * Reads are performed with interrupts disabled, thus it is to be
43145720Speter * expected that the time between reads is very small.  At most
43245720Speter * one rollover in the low count byte can be expected within the
43345720Speter * four reads that are performed.
43445720Speter *
43545720Speter * There are three gaps in which a rollover can occur :
43645720Speter *
43745720Speter * - read low1
43845720Speter *              gap1
43945720Speter * - read high1
44045720Speter *              gap2
44145720Speter * - read low2
44245720Speter *              gap3
44345720Speter * - read high2
44445720Speter *
44545720Speter * If a rollover occurs in gap1 or gap2, the low2 value will be
44645720Speter * greater than the low1 value.  In this case, low2 and high2 are a
44745720Speter * corresponding pair.
44845720Speter *
44945720Speter * In any other case, low1 and high1 can be considered to be correct.
45045720Speter *
45145720Speter * The function returns the number of bytes remaining in the transfer,
45245720Speter * or -1 if the channel requested is not active.
45345720Speter *
45445720Speter */
45545720Speterstatic int
45645720Speterisa_dmastatus_locked(int chan)
45745720Speter{
45845720Speter	u_long	cnt = 0;
45945720Speter	int	ffport, waport;
46045720Speter	u_long	low1, high1, low2, high2;
46145720Speter
46245720Speter	mtx_assert(&isa_dma_lock, MA_OWNED);
46345720Speter
46445720Speter	/* channel active? */
46545720Speter	if ((dma_inuse & (1 << chan)) == 0) {
46645720Speter		printf("isa_dmastatus: channel %d not active\n", chan);
46745720Speter		return(-1);
46845720Speter	}
46945720Speter	/* channel busy? */
47045720Speter
47145720Speter	if (((dma_busy & (1 << chan)) == 0) &&
47245720Speter	    (dma_auto_mode & (1 << chan)) == 0 ) {
47345720Speter	    printf("chan %d not busy\n", chan);
47445720Speter	    return -2 ;
47545720Speter	}
47645720Speter	if (chan < 4) {			/* low DMA controller */
47745720Speter		ffport = DMA1_FFC;
47845720Speter		waport = DMA1_CHN(chan) + 1;
47945720Speter	} else {			/* high DMA controller */
48045720Speter		ffport = DMA2_FFC;
48145720Speter		waport = DMA2_CHN(chan - 4) + 2;
48245720Speter	}
48345720Speter
48445720Speter	disable_intr();			/* no interrupts Mr Jones! */
48545720Speter	outb(ffport, 0);		/* clear register LSB flipflop */
48645720Speter	low1 = inb(waport);
48745720Speter	high1 = inb(waport);
48845720Speter	outb(ffport, 0);		/* clear again */
48945720Speter	low2 = inb(waport);
49045720Speter	high2 = inb(waport);
49145720Speter	enable_intr();			/* enable interrupts again */
49245720Speter
49345720Speter	/*
49445720Speter	 * Now decide if a wrap has tried to skew our results.
49545720Speter	 * Note that after TC, the count will read 0xffff, while we want
49645720Speter	 * to return zero, so we add and then mask to compensate.
49745720Speter	 */
49845720Speter	if (low1 >= low2) {
49945720Speter		cnt = (low1 + (high1 << 8) + 1) & 0xffff;
50045720Speter	} else {
50145720Speter		cnt = (low2 + (high2 << 8) + 1) & 0xffff;
50245720Speter	}
50345720Speter
50445720Speter	if (chan >= 4)			/* high channels move words */
50545720Speter		cnt *= 2;
50645720Speter	return(cnt);
50761994Smsmith}
50861994Smsmith
50961994Smsmithint
51061994Smsmithisa_dmastatus(int chan)
51161994Smsmith{
51261994Smsmith	int status;
51361994Smsmith
51461994Smsmith	mtx_lock(&isa_dma_lock);
51561994Smsmith	status = isa_dmastatus_locked(chan);
51661994Smsmith	mtx_unlock(&isa_dma_lock);
51761994Smsmith
51861994Smsmith	return (status);
51961994Smsmith}
52061994Smsmith
52161994Smsmith/*
52261994Smsmith * Reached terminal count yet ?
52361994Smsmith */
52461994Smsmithint
52561994Smsmithisa_dmatc(int chan)
52661994Smsmith{
52761994Smsmith
52861994Smsmith	if (chan < 4)
52961994Smsmith		return(inb(DMA1_STATUS) & (1 << chan));
53061994Smsmith	else
53161994Smsmith		return(inb(DMA2_STATUS) & (1 << (chan & 3)));
53261994Smsmith}
53361994Smsmith
53461994Smsmith/*
53561994Smsmith * Stop a DMA transfer currently in progress.
53661994Smsmith */
53761994Smsmithint
53861994Smsmithisa_dmastop(int chan)
53961994Smsmith{
54061994Smsmith	int status;
54161994Smsmith
54261994Smsmith	mtx_lock(&isa_dma_lock);
54361994Smsmith	if ((dma_inuse & (1 << chan)) == 0)
54461994Smsmith		printf("isa_dmastop: channel %d not acquired\n", chan);
54561994Smsmith
54661994Smsmith	if (((dma_busy & (1 << chan)) == 0) &&
54761994Smsmith	    ((dma_auto_mode & (1 << chan)) == 0)) {
54861994Smsmith		printf("chan %d not busy\n", chan);
54961994Smsmith		mtx_unlock(&isa_dma_lock);
55061994Smsmith		return -2 ;
55161994Smsmith	}
55282555Smsmith
553	if ((chan & 4) == 0) {
554		outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
555	} else {
556		outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
557	}
558
559	status = isa_dmastatus_locked(chan);
560
561	mtx_unlock(&isa_dma_lock);
562
563	return (status);
564}
565
566/*
567 * Attach to the ISA PnP descriptor for the AT DMA controller
568 */
569static struct isa_pnp_id atdma_ids[] = {
570	{ 0x0002d041 /* PNP0200 */, "AT DMA controller" },
571	{ 0 }
572};
573
574static int
575atdma_probe(device_t dev)
576{
577	int result;
578
579	if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
580		device_quiet(dev);
581	return(result);
582}
583
584static int
585atdma_attach(device_t dev)
586{
587	return(0);
588}
589
590static device_method_t atdma_methods[] = {
591	/* Device interface */
592	DEVMETHOD(device_probe,		atdma_probe),
593	DEVMETHOD(device_attach,	atdma_attach),
594	DEVMETHOD(device_detach,	bus_generic_detach),
595	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
596	DEVMETHOD(device_suspend,	bus_generic_suspend),
597	DEVMETHOD(device_resume,	bus_generic_resume),
598	{ 0, 0 }
599};
600
601static driver_t atdma_driver = {
602	"atdma",
603	atdma_methods,
604	1,		/* no softc */
605};
606
607static devclass_t atdma_devclass;
608
609DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
610DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
611