isa_dma.c revision 135262
145720Speter/*- 245720Speter * Copyright (c) 1991 The Regents of the University of California. 345720Speter * All rights reserved. 445720Speter * 545720Speter * This code is derived from software contributed to Berkeley by 645720Speter * William Jolitz. 745720Speter * 845720Speter * Redistribution and use in source and binary forms, with or without 945720Speter * modification, are permitted provided that the following conditions 1045720Speter * are met: 1145720Speter * 1. Redistributions of source code must retain the above copyright 1245720Speter * notice, this list of conditions and the following disclaimer. 1345720Speter * 2. Redistributions in binary form must reproduce the above copyright 1445720Speter * notice, this list of conditions and the following disclaimer in the 1545720Speter * documentation and/or other materials provided with the distribution. 1645720Speter * 4. Neither the name of the University nor the names of its contributors 1745720Speter * may be used to endorse or promote products derived from this software 1845720Speter * without specific prior written permission. 1945720Speter * 2045720Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2145720Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2245720Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2345720Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2445720Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2545720Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2645720Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2745720Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2845720Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2945720Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3045720Speter * SUCH DAMAGE. 3145720Speter * 3245720Speter * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 3345720Speter */ 3445720Speter 35115703Sobrien#include <sys/cdefs.h> 36115703Sobrien__FBSDID("$FreeBSD: head/sys/i386/isa/isa_dma.c 135262 2004-09-15 12:09:50Z phk $"); 37115703Sobrien 3845720Speter/* 3945720Speter * code to manage AT bus 4045720Speter * 4145720Speter * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 4245720Speter * Fixed uninitialized variable problem and added code to deal 4345720Speter * with DMA page boundaries in isa_dmarangecheck(). Fixed word 4445720Speter * mode DMA count compution and reorganized DMA setup code in 4545720Speter * isa_dmastart() 4645720Speter */ 4745720Speter 4845720Speter#include <sys/param.h> 4945720Speter#include <sys/systm.h> 5061994Smsmith#include <sys/bus.h> 5161994Smsmith#include <sys/kernel.h> 5245720Speter#include <sys/malloc.h> 5377081Salfred#include <sys/lock.h> 5479224Sdillon#include <sys/proc.h> 5577081Salfred#include <sys/mutex.h> 5661994Smsmith#include <sys/module.h> 5745720Speter#include <vm/vm.h> 5845720Speter#include <vm/vm_param.h> 5945720Speter#include <vm/pmap.h> 6045720Speter#include <i386/isa/isa.h> 6179008Simp#include <dev/ic/i8237.h> 6261994Smsmith#include <isa/isavar.h> 6345720Speter 6445720Speter/* 6545720Speter** Register definitions for DMA controller 1 (channels 0..3): 6645720Speter*/ 6745720Speter#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 6845720Speter#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 6945720Speter#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 7045720Speter#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 7145720Speter 7245720Speter/* 7345720Speter** Register definitions for DMA controller 2 (channels 4..7): 7445720Speter*/ 7545720Speter#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 7645720Speter#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 7745720Speter#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 7845720Speter#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 7945720Speter 8092765Salfredstatic int isa_dmarangecheck(caddr_t va, u_int length, int chan); 8145720Speter 8245720Speterstatic caddr_t dma_bouncebuf[8]; 8345720Speterstatic u_int dma_bouncebufsize[8]; 8445720Speterstatic u_int8_t dma_bounced = 0; 8545720Speterstatic u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 8645720Speterstatic u_int8_t dma_inuse = 0; /* User for acquire/release */ 8745720Speterstatic u_int8_t dma_auto_mode = 0; 8845720Speter 8945720Speter#define VALID_DMA_MASK (7) 9045720Speter 9145720Speter/* high byte of address is stored in this port for i-th dma channel */ 9245720Speterstatic int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 9345720Speter 9445720Speter/* 9545720Speter * Setup a DMA channel's bounce buffer. 9645720Speter */ 97135262Sphkint 98135262Sphkisa_dma_init(int chan, u_int bouncebufsize, int flag) 9945720Speter{ 10045720Speter void *buf; 10145720Speter 102131647Sphk /* 103135262Sphk * If a DMA channel is shared, both drivers have to call isa_dma_init 104131647Sphk * since they don't know that the other driver will do it. 105131647Sphk * Just return if we're already set up good. 106131647Sphk * XXX: this only works if they agree on the bouncebuf size. This 107131647Sphk * XXX: is typically the case since they are multiple instances of 108131647Sphk * XXX: the same driver. 109131647Sphk */ 110131647Sphk if (dma_bouncebuf[chan] != NULL) 111135262Sphk return (0); 112131647Sphk 11345720Speter#ifdef DIAGNOSTIC 11445720Speter if (chan & ~VALID_DMA_MASK) 115135262Sphk panic("isa_dma_init: channel out of range"); 11645720Speter#endif 11745720Speter 11845720Speter dma_bouncebufsize[chan] = bouncebufsize; 11945720Speter 12045720Speter /* Try malloc() first. It works better if it works. */ 121135262Sphk buf = malloc(bouncebufsize, M_DEVBUF, flag); 12245720Speter if (buf != NULL) { 12345720Speter if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 12445720Speter dma_bouncebuf[chan] = buf; 125135262Sphk return (0); 12645720Speter } 12745720Speter free(buf, M_DEVBUF); 12845720Speter } 129135262Sphk buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful, 13045720Speter 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 13145720Speter if (buf == NULL) 132135262Sphk return (ENOMEM); 133135262Sphk dma_bouncebuf[chan] = buf; 134135262Sphk return (0); 13545720Speter} 13645720Speter 13745720Speter/* 13845720Speter * Register a DMA channel's usage. Usually called from a device driver 13945720Speter * in open() or during its initialization. 14045720Speter */ 14145720Speterint 14245720Speterisa_dma_acquire(chan) 14345720Speter int chan; 14445720Speter{ 14545720Speter#ifdef DIAGNOSTIC 14645720Speter if (chan & ~VALID_DMA_MASK) 14745720Speter panic("isa_dma_acquire: channel out of range"); 14845720Speter#endif 14945720Speter 15045720Speter if (dma_inuse & (1 << chan)) { 15145720Speter printf("isa_dma_acquire: channel %d already in use\n", chan); 15245720Speter return (EBUSY); 15345720Speter } 15445720Speter dma_inuse |= (1 << chan); 15545720Speter dma_auto_mode &= ~(1 << chan); 15645720Speter 15745720Speter return (0); 15845720Speter} 15945720Speter 16045720Speter/* 16145720Speter * Unregister a DMA channel's usage. Usually called from a device driver 16245720Speter * during close() or during its shutdown. 16345720Speter */ 16445720Spetervoid 16545720Speterisa_dma_release(chan) 16645720Speter int chan; 16745720Speter{ 16845720Speter#ifdef DIAGNOSTIC 16945720Speter if (chan & ~VALID_DMA_MASK) 17045720Speter panic("isa_dma_release: channel out of range"); 17145720Speter 17245720Speter if ((dma_inuse & (1 << chan)) == 0) 17345720Speter printf("isa_dma_release: channel %d not in use\n", chan); 17445720Speter#endif 17545720Speter 17645720Speter if (dma_busy & (1 << chan)) { 17745720Speter dma_busy &= ~(1 << chan); 17845720Speter /* 17945720Speter * XXX We should also do "dma_bounced &= (1 << chan);" 18045720Speter * because we are acting on behalf of isa_dmadone() which 18145720Speter * was not called to end the last DMA operation. This does 18245720Speter * not matter now, but it may in the future. 18345720Speter */ 18445720Speter } 18545720Speter 18645720Speter dma_inuse &= ~(1 << chan); 18745720Speter dma_auto_mode &= ~(1 << chan); 18845720Speter} 18945720Speter 19045720Speter/* 19145720Speter * isa_dmacascade(): program 8237 DMA controller channel to accept 19245720Speter * external dma control by a board. 19345720Speter */ 19445720Spetervoid 19545720Speterisa_dmacascade(chan) 19645720Speter int chan; 19745720Speter{ 19845720Speter#ifdef DIAGNOSTIC 19945720Speter if (chan & ~VALID_DMA_MASK) 20045720Speter panic("isa_dmacascade: channel out of range"); 20145720Speter#endif 20245720Speter 20345720Speter /* set dma channel mode, and set dma channel mode */ 20445720Speter if ((chan & 4) == 0) { 20545720Speter outb(DMA1_MODE, DMA37MD_CASCADE | chan); 20645720Speter outb(DMA1_SMSK, chan); 20745720Speter } else { 20845720Speter outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 20945720Speter outb(DMA2_SMSK, chan & 3); 21045720Speter } 21145720Speter} 21245720Speter 21345720Speter/* 21445720Speter * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 21545720Speter * problems by using a bounce buffer. 21645720Speter */ 21745720Spetervoid 21845720Speterisa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 21945720Speter{ 220112569Sjake vm_paddr_t phys; 22145720Speter int waport; 22245720Speter caddr_t newaddr; 22345720Speter 22479224Sdillon GIANT_REQUIRED; 22579224Sdillon 22645720Speter#ifdef DIAGNOSTIC 22745720Speter if (chan & ~VALID_DMA_MASK) 22845720Speter panic("isa_dmastart: channel out of range"); 22945720Speter 23045720Speter if ((chan < 4 && nbytes > (1<<16)) 23145720Speter || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 23245720Speter panic("isa_dmastart: impossible request"); 23345720Speter 23445720Speter if ((dma_inuse & (1 << chan)) == 0) 23545720Speter printf("isa_dmastart: channel %d not acquired\n", chan); 23645720Speter#endif 23745720Speter 23845720Speter#if 0 23945720Speter /* 24045720Speter * XXX This should be checked, but drivers like ad1848 only call 24145720Speter * isa_dmastart() once because they use Auto DMA mode. If we 24245720Speter * leave this in, drivers that do this will print this continuously. 24345720Speter */ 24445720Speter if (dma_busy & (1 << chan)) 24545720Speter printf("isa_dmastart: channel %d busy\n", chan); 24645720Speter#endif 24745720Speter 24845720Speter dma_busy |= (1 << chan); 24945720Speter 25045720Speter if (isa_dmarangecheck(addr, nbytes, chan)) { 25145720Speter if (dma_bouncebuf[chan] == NULL 25245720Speter || dma_bouncebufsize[chan] < nbytes) 25345720Speter panic("isa_dmastart: bad bounce buffer"); 25445720Speter dma_bounced |= (1 << chan); 25545720Speter newaddr = dma_bouncebuf[chan]; 25645720Speter 25745720Speter /* copy bounce buffer on write */ 25857973Sphk if (!(flags & ISADMA_READ)) 25945720Speter bcopy(addr, newaddr, nbytes); 26045720Speter addr = newaddr; 26145720Speter } 26245720Speter 26345720Speter /* translate to physical */ 26495710Speter phys = pmap_extract(kernel_pmap, (vm_offset_t)addr); 26545720Speter 26657973Sphk if (flags & ISADMA_RAW) { 26745720Speter dma_auto_mode |= (1 << chan); 26845720Speter } else { 26945720Speter dma_auto_mode &= ~(1 << chan); 27045720Speter } 27145720Speter 27245720Speter if ((chan & 4) == 0) { 27345720Speter /* 27445720Speter * Program one of DMA channels 0..3. These are 27545720Speter * byte mode channels. 27645720Speter */ 27745720Speter /* set dma channel mode, and reset address ff */ 27845720Speter 27957973Sphk /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 28057973Sphk if (flags & ISADMA_RAW) { 28157973Sphk if (flags & ISADMA_READ) 28245720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 28345720Speter else 28445720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 28545720Speter } 28645720Speter else 28757973Sphk if (flags & ISADMA_READ) 28845720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 28945720Speter else 29045720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 29145720Speter outb(DMA1_FFC, 0); 29245720Speter 29345720Speter /* send start address */ 29445720Speter waport = DMA1_CHN(chan); 29545720Speter outb(waport, phys); 29645720Speter outb(waport, phys>>8); 29745720Speter outb(dmapageport[chan], phys>>16); 29845720Speter 29945720Speter /* send count */ 30045720Speter outb(waport + 1, --nbytes); 30145720Speter outb(waport + 1, nbytes>>8); 30245720Speter 30345720Speter /* unmask channel */ 30445720Speter outb(DMA1_SMSK, chan); 30545720Speter } else { 30645720Speter /* 30745720Speter * Program one of DMA channels 4..7. These are 30845720Speter * word mode channels. 30945720Speter */ 31045720Speter /* set dma channel mode, and reset address ff */ 31145720Speter 31257973Sphk /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 31357973Sphk if (flags & ISADMA_RAW) { 31457973Sphk if (flags & ISADMA_READ) 31545720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 31645720Speter else 31745720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 31845720Speter } 31945720Speter else 32057973Sphk if (flags & ISADMA_READ) 32145720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 32245720Speter else 32345720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 32445720Speter outb(DMA2_FFC, 0); 32545720Speter 32645720Speter /* send start address */ 32745720Speter waport = DMA2_CHN(chan - 4); 32845720Speter outb(waport, phys>>1); 32945720Speter outb(waport, phys>>9); 33045720Speter outb(dmapageport[chan], phys>>16); 33145720Speter 33245720Speter /* send count */ 33345720Speter nbytes >>= 1; 33445720Speter outb(waport + 2, --nbytes); 33545720Speter outb(waport + 2, nbytes>>8); 33645720Speter 33745720Speter /* unmask channel */ 33845720Speter outb(DMA2_SMSK, chan & 3); 33945720Speter } 34045720Speter} 34145720Speter 34245720Spetervoid 34345720Speterisa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 34445720Speter{ 34545720Speter#ifdef DIAGNOSTIC 34645720Speter if (chan & ~VALID_DMA_MASK) 34745720Speter panic("isa_dmadone: channel out of range"); 34845720Speter 34945720Speter if ((dma_inuse & (1 << chan)) == 0) 35045720Speter printf("isa_dmadone: channel %d not acquired\n", chan); 35145720Speter#endif 35245720Speter 35345720Speter if (((dma_busy & (1 << chan)) == 0) && 35445720Speter (dma_auto_mode & (1 << chan)) == 0 ) 35545720Speter printf("isa_dmadone: channel %d not busy\n", chan); 35645720Speter 35745720Speter if ((dma_auto_mode & (1 << chan)) == 0) 35845720Speter outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 35945720Speter 36045720Speter if (dma_bounced & (1 << chan)) { 36145720Speter /* copy bounce buffer on read */ 36257973Sphk if (flags & ISADMA_READ) 36345720Speter bcopy(dma_bouncebuf[chan], addr, nbytes); 36445720Speter 36545720Speter dma_bounced &= ~(1 << chan); 36645720Speter } 36745720Speter dma_busy &= ~(1 << chan); 36845720Speter} 36945720Speter 37045720Speter/* 37145720Speter * Check for problems with the address range of a DMA transfer 37245720Speter * (non-contiguous physical pages, outside of bus address space, 37345720Speter * crossing DMA page boundaries). 37445720Speter * Return true if special handling needed. 37545720Speter */ 37645720Speter 37745720Speterstatic int 37845720Speterisa_dmarangecheck(caddr_t va, u_int length, int chan) 37945720Speter{ 380112569Sjake vm_paddr_t phys, priorpage = 0; 381112569Sjake vm_offset_t endva; 38245720Speter u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 38345720Speter 38479224Sdillon GIANT_REQUIRED; 38579224Sdillon 38645720Speter endva = (vm_offset_t)round_page((vm_offset_t)va + length); 38745720Speter for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 38895710Speter phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va)); 38945720Speter#define ISARAM_END RAM_END 39045720Speter if (phys == 0) 39145720Speter panic("isa_dmacheck: no physical page present"); 39245720Speter if (phys >= ISARAM_END) 39345720Speter return (1); 39445720Speter if (priorpage) { 39545720Speter if (priorpage + PAGE_SIZE != phys) 39645720Speter return (1); 39745720Speter /* check if crossing a DMA page boundary */ 39845720Speter if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 39945720Speter return (1); 40045720Speter } 40145720Speter priorpage = phys; 40245720Speter } 40345720Speter return (0); 40445720Speter} 40545720Speter 40645720Speter/* 40745720Speter * Query the progress of a transfer on a DMA channel. 40845720Speter * 40945720Speter * To avoid having to interrupt a transfer in progress, we sample 41045720Speter * each of the high and low databytes twice, and apply the following 41145720Speter * logic to determine the correct count. 41245720Speter * 41345720Speter * Reads are performed with interrupts disabled, thus it is to be 41445720Speter * expected that the time between reads is very small. At most 41545720Speter * one rollover in the low count byte can be expected within the 41645720Speter * four reads that are performed. 41745720Speter * 41845720Speter * There are three gaps in which a rollover can occur : 41945720Speter * 42045720Speter * - read low1 42145720Speter * gap1 42245720Speter * - read high1 42345720Speter * gap2 42445720Speter * - read low2 42545720Speter * gap3 42645720Speter * - read high2 42745720Speter * 42845720Speter * If a rollover occurs in gap1 or gap2, the low2 value will be 42945720Speter * greater than the low1 value. In this case, low2 and high2 are a 43045720Speter * corresponding pair. 43145720Speter * 43245720Speter * In any other case, low1 and high1 can be considered to be correct. 43345720Speter * 43445720Speter * The function returns the number of bytes remaining in the transfer, 43545720Speter * or -1 if the channel requested is not active. 43645720Speter * 43745720Speter */ 43845720Speterint 43945720Speterisa_dmastatus(int chan) 44045720Speter{ 44145720Speter u_long cnt = 0; 44245720Speter int ffport, waport; 44345720Speter u_long low1, high1, low2, high2; 44445720Speter 44545720Speter /* channel active? */ 44645720Speter if ((dma_inuse & (1 << chan)) == 0) { 44745720Speter printf("isa_dmastatus: channel %d not active\n", chan); 44845720Speter return(-1); 44945720Speter } 45045720Speter /* channel busy? */ 45145720Speter 45245720Speter if (((dma_busy & (1 << chan)) == 0) && 45345720Speter (dma_auto_mode & (1 << chan)) == 0 ) { 45445720Speter printf("chan %d not busy\n", chan); 45545720Speter return -2 ; 45645720Speter } 45745720Speter if (chan < 4) { /* low DMA controller */ 45845720Speter ffport = DMA1_FFC; 45945720Speter waport = DMA1_CHN(chan) + 1; 46045720Speter } else { /* high DMA controller */ 46145720Speter ffport = DMA2_FFC; 46245720Speter waport = DMA2_CHN(chan - 4) + 2; 46345720Speter } 46445720Speter 46545720Speter disable_intr(); /* no interrupts Mr Jones! */ 46645720Speter outb(ffport, 0); /* clear register LSB flipflop */ 46745720Speter low1 = inb(waport); 46845720Speter high1 = inb(waport); 46945720Speter outb(ffport, 0); /* clear again */ 47045720Speter low2 = inb(waport); 47145720Speter high2 = inb(waport); 47245720Speter enable_intr(); /* enable interrupts again */ 47345720Speter 47445720Speter /* 47545720Speter * Now decide if a wrap has tried to skew our results. 47645720Speter * Note that after TC, the count will read 0xffff, while we want 47745720Speter * to return zero, so we add and then mask to compensate. 47845720Speter */ 47945720Speter if (low1 >= low2) { 48045720Speter cnt = (low1 + (high1 << 8) + 1) & 0xffff; 48145720Speter } else { 48245720Speter cnt = (low2 + (high2 << 8) + 1) & 0xffff; 48345720Speter } 48445720Speter 48545720Speter if (chan >= 4) /* high channels move words */ 48645720Speter cnt *= 2; 48745720Speter return(cnt); 48845720Speter} 48945720Speter 49045720Speter/* 49145720Speter * Stop a DMA transfer currently in progress. 49245720Speter */ 49345720Speterint 49445720Speterisa_dmastop(int chan) 49545720Speter{ 49645720Speter if ((dma_inuse & (1 << chan)) == 0) 49745720Speter printf("isa_dmastop: channel %d not acquired\n", chan); 49845720Speter 49945720Speter if (((dma_busy & (1 << chan)) == 0) && 50045720Speter ((dma_auto_mode & (1 << chan)) == 0)) { 50145720Speter printf("chan %d not busy\n", chan); 50245720Speter return -2 ; 50345720Speter } 50445720Speter 50545720Speter if ((chan & 4) == 0) { 50645720Speter outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 50745720Speter } else { 50845720Speter outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 50945720Speter } 51045720Speter return(isa_dmastatus(chan)); 51145720Speter} 51261994Smsmith 51361994Smsmith/* 51461994Smsmith * Attach to the ISA PnP descriptor for the AT DMA controller 51561994Smsmith */ 51661994Smsmithstatic struct isa_pnp_id atdma_ids[] = { 51761994Smsmith { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 51861994Smsmith { 0 } 51961994Smsmith}; 52061994Smsmith 52161994Smsmithstatic int 52261994Smsmithatdma_probe(device_t dev) 52361994Smsmith{ 52461994Smsmith int result; 52561994Smsmith 52661994Smsmith if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 52761994Smsmith device_quiet(dev); 52861994Smsmith return(result); 52961994Smsmith} 53061994Smsmith 53161994Smsmithstatic int 53261994Smsmithatdma_attach(device_t dev) 53361994Smsmith{ 53461994Smsmith return(0); 53561994Smsmith} 53661994Smsmith 53761994Smsmithstatic device_method_t atdma_methods[] = { 53861994Smsmith /* Device interface */ 53961994Smsmith DEVMETHOD(device_probe, atdma_probe), 54061994Smsmith DEVMETHOD(device_attach, atdma_attach), 54161994Smsmith DEVMETHOD(device_detach, bus_generic_detach), 54261994Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 54361994Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 54461994Smsmith DEVMETHOD(device_resume, bus_generic_resume), 54561994Smsmith { 0, 0 } 54661994Smsmith}; 54761994Smsmith 54861994Smsmithstatic driver_t atdma_driver = { 54961994Smsmith "atdma", 55061994Smsmith atdma_methods, 55161994Smsmith 1, /* no softc */ 55261994Smsmith}; 55361994Smsmith 55461994Smsmithstatic devclass_t atdma_devclass; 55561994Smsmith 55661994SmsmithDRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 55782555SmsmithDRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0); 558