isa_dma.c revision 131647
145720Speter/*- 245720Speter * Copyright (c) 1991 The Regents of the University of California. 345720Speter * All rights reserved. 445720Speter * 545720Speter * This code is derived from software contributed to Berkeley by 645720Speter * William Jolitz. 745720Speter * 845720Speter * Redistribution and use in source and binary forms, with or without 945720Speter * modification, are permitted provided that the following conditions 1045720Speter * are met: 1145720Speter * 1. Redistributions of source code must retain the above copyright 1245720Speter * notice, this list of conditions and the following disclaimer. 1345720Speter * 2. Redistributions in binary form must reproduce the above copyright 1445720Speter * notice, this list of conditions and the following disclaimer in the 1545720Speter * documentation and/or other materials provided with the distribution. 1645720Speter * 4. Neither the name of the University nor the names of its contributors 1745720Speter * may be used to endorse or promote products derived from this software 1845720Speter * without specific prior written permission. 1945720Speter * 2045720Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2145720Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2245720Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2345720Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2445720Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2545720Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2645720Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2745720Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2845720Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2945720Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3045720Speter * SUCH DAMAGE. 3145720Speter * 3245720Speter * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 3345720Speter */ 3445720Speter 35115703Sobrien#include <sys/cdefs.h> 36115703Sobrien__FBSDID("$FreeBSD: head/sys/i386/isa/isa_dma.c 131647 2004-07-05 20:37:42Z phk $"); 37115703Sobrien 3845720Speter/* 3945720Speter * code to manage AT bus 4045720Speter * 4145720Speter * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 4245720Speter * Fixed uninitialized variable problem and added code to deal 4345720Speter * with DMA page boundaries in isa_dmarangecheck(). Fixed word 4445720Speter * mode DMA count compution and reorganized DMA setup code in 4545720Speter * isa_dmastart() 4645720Speter */ 4745720Speter 4845720Speter#include <sys/param.h> 4945720Speter#include <sys/systm.h> 5061994Smsmith#include <sys/bus.h> 5161994Smsmith#include <sys/kernel.h> 5245720Speter#include <sys/malloc.h> 5377081Salfred#include <sys/lock.h> 5479224Sdillon#include <sys/proc.h> 5577081Salfred#include <sys/mutex.h> 5661994Smsmith#include <sys/module.h> 5745720Speter#include <vm/vm.h> 5845720Speter#include <vm/vm_param.h> 5945720Speter#include <vm/pmap.h> 6045720Speter#include <i386/isa/isa.h> 6179008Simp#include <dev/ic/i8237.h> 6261994Smsmith#include <isa/isavar.h> 6345720Speter 6445720Speter/* 6545720Speter** Register definitions for DMA controller 1 (channels 0..3): 6645720Speter*/ 6745720Speter#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 6845720Speter#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 6945720Speter#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 7045720Speter#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 7145720Speter 7245720Speter/* 7345720Speter** Register definitions for DMA controller 2 (channels 4..7): 7445720Speter*/ 7545720Speter#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 7645720Speter#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 7745720Speter#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 7845720Speter#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 7945720Speter 8092765Salfredstatic int isa_dmarangecheck(caddr_t va, u_int length, int chan); 8145720Speter 8245720Speterstatic caddr_t dma_bouncebuf[8]; 8345720Speterstatic u_int dma_bouncebufsize[8]; 8445720Speterstatic u_int8_t dma_bounced = 0; 8545720Speterstatic u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 8645720Speterstatic u_int8_t dma_inuse = 0; /* User for acquire/release */ 8745720Speterstatic u_int8_t dma_auto_mode = 0; 8845720Speter 8945720Speter#define VALID_DMA_MASK (7) 9045720Speter 9145720Speter/* high byte of address is stored in this port for i-th dma channel */ 9245720Speterstatic int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 9345720Speter 9445720Speter/* 9545720Speter * Setup a DMA channel's bounce buffer. 9645720Speter */ 9745720Spetervoid 9845720Speterisa_dmainit(chan, bouncebufsize) 9945720Speter int chan; 10045720Speter u_int bouncebufsize; 10145720Speter{ 10245720Speter void *buf; 10345720Speter 104131647Sphk /* 105131647Sphk * If a DMA channel is shared, both drivers have to call isa_dmainit 106131647Sphk * since they don't know that the other driver will do it. 107131647Sphk * Just return if we're already set up good. 108131647Sphk * XXX: this only works if they agree on the bouncebuf size. This 109131647Sphk * XXX: is typically the case since they are multiple instances of 110131647Sphk * XXX: the same driver. 111131647Sphk */ 112131647Sphk if (dma_bouncebuf[chan] != NULL) 113131647Sphk return; 114131647Sphk 11545720Speter#ifdef DIAGNOSTIC 11645720Speter if (chan & ~VALID_DMA_MASK) 11745720Speter panic("isa_dmainit: channel out of range"); 11845720Speter#endif 11945720Speter 12045720Speter dma_bouncebufsize[chan] = bouncebufsize; 12145720Speter 12245720Speter /* Try malloc() first. It works better if it works. */ 12345720Speter buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 12445720Speter if (buf != NULL) { 12545720Speter if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 12645720Speter dma_bouncebuf[chan] = buf; 12745720Speter return; 12845720Speter } 12945720Speter free(buf, M_DEVBUF); 13045720Speter } 13145720Speter buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 13245720Speter 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 13345720Speter if (buf == NULL) 13445720Speter printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 13545720Speter else 13645720Speter dma_bouncebuf[chan] = buf; 13745720Speter} 13845720Speter 13945720Speter/* 14045720Speter * Register a DMA channel's usage. Usually called from a device driver 14145720Speter * in open() or during its initialization. 14245720Speter */ 14345720Speterint 14445720Speterisa_dma_acquire(chan) 14545720Speter int chan; 14645720Speter{ 14745720Speter#ifdef DIAGNOSTIC 14845720Speter if (chan & ~VALID_DMA_MASK) 14945720Speter panic("isa_dma_acquire: channel out of range"); 15045720Speter#endif 15145720Speter 15245720Speter if (dma_inuse & (1 << chan)) { 15345720Speter printf("isa_dma_acquire: channel %d already in use\n", chan); 15445720Speter return (EBUSY); 15545720Speter } 15645720Speter dma_inuse |= (1 << chan); 15745720Speter dma_auto_mode &= ~(1 << chan); 15845720Speter 15945720Speter return (0); 16045720Speter} 16145720Speter 16245720Speter/* 16345720Speter * Unregister a DMA channel's usage. Usually called from a device driver 16445720Speter * during close() or during its shutdown. 16545720Speter */ 16645720Spetervoid 16745720Speterisa_dma_release(chan) 16845720Speter int chan; 16945720Speter{ 17045720Speter#ifdef DIAGNOSTIC 17145720Speter if (chan & ~VALID_DMA_MASK) 17245720Speter panic("isa_dma_release: channel out of range"); 17345720Speter 17445720Speter if ((dma_inuse & (1 << chan)) == 0) 17545720Speter printf("isa_dma_release: channel %d not in use\n", chan); 17645720Speter#endif 17745720Speter 17845720Speter if (dma_busy & (1 << chan)) { 17945720Speter dma_busy &= ~(1 << chan); 18045720Speter /* 18145720Speter * XXX We should also do "dma_bounced &= (1 << chan);" 18245720Speter * because we are acting on behalf of isa_dmadone() which 18345720Speter * was not called to end the last DMA operation. This does 18445720Speter * not matter now, but it may in the future. 18545720Speter */ 18645720Speter } 18745720Speter 18845720Speter dma_inuse &= ~(1 << chan); 18945720Speter dma_auto_mode &= ~(1 << chan); 19045720Speter} 19145720Speter 19245720Speter/* 19345720Speter * isa_dmacascade(): program 8237 DMA controller channel to accept 19445720Speter * external dma control by a board. 19545720Speter */ 19645720Spetervoid 19745720Speterisa_dmacascade(chan) 19845720Speter int chan; 19945720Speter{ 20045720Speter#ifdef DIAGNOSTIC 20145720Speter if (chan & ~VALID_DMA_MASK) 20245720Speter panic("isa_dmacascade: channel out of range"); 20345720Speter#endif 20445720Speter 20545720Speter /* set dma channel mode, and set dma channel mode */ 20645720Speter if ((chan & 4) == 0) { 20745720Speter outb(DMA1_MODE, DMA37MD_CASCADE | chan); 20845720Speter outb(DMA1_SMSK, chan); 20945720Speter } else { 21045720Speter outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 21145720Speter outb(DMA2_SMSK, chan & 3); 21245720Speter } 21345720Speter} 21445720Speter 21545720Speter/* 21645720Speter * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 21745720Speter * problems by using a bounce buffer. 21845720Speter */ 21945720Spetervoid 22045720Speterisa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 22145720Speter{ 222112569Sjake vm_paddr_t phys; 22345720Speter int waport; 22445720Speter caddr_t newaddr; 22545720Speter 22679224Sdillon GIANT_REQUIRED; 22779224Sdillon 22845720Speter#ifdef DIAGNOSTIC 22945720Speter if (chan & ~VALID_DMA_MASK) 23045720Speter panic("isa_dmastart: channel out of range"); 23145720Speter 23245720Speter if ((chan < 4 && nbytes > (1<<16)) 23345720Speter || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 23445720Speter panic("isa_dmastart: impossible request"); 23545720Speter 23645720Speter if ((dma_inuse & (1 << chan)) == 0) 23745720Speter printf("isa_dmastart: channel %d not acquired\n", chan); 23845720Speter#endif 23945720Speter 24045720Speter#if 0 24145720Speter /* 24245720Speter * XXX This should be checked, but drivers like ad1848 only call 24345720Speter * isa_dmastart() once because they use Auto DMA mode. If we 24445720Speter * leave this in, drivers that do this will print this continuously. 24545720Speter */ 24645720Speter if (dma_busy & (1 << chan)) 24745720Speter printf("isa_dmastart: channel %d busy\n", chan); 24845720Speter#endif 24945720Speter 25045720Speter dma_busy |= (1 << chan); 25145720Speter 25245720Speter if (isa_dmarangecheck(addr, nbytes, chan)) { 25345720Speter if (dma_bouncebuf[chan] == NULL 25445720Speter || dma_bouncebufsize[chan] < nbytes) 25545720Speter panic("isa_dmastart: bad bounce buffer"); 25645720Speter dma_bounced |= (1 << chan); 25745720Speter newaddr = dma_bouncebuf[chan]; 25845720Speter 25945720Speter /* copy bounce buffer on write */ 26057973Sphk if (!(flags & ISADMA_READ)) 26145720Speter bcopy(addr, newaddr, nbytes); 26245720Speter addr = newaddr; 26345720Speter } 26445720Speter 26545720Speter /* translate to physical */ 26695710Speter phys = pmap_extract(kernel_pmap, (vm_offset_t)addr); 26745720Speter 26857973Sphk if (flags & ISADMA_RAW) { 26945720Speter dma_auto_mode |= (1 << chan); 27045720Speter } else { 27145720Speter dma_auto_mode &= ~(1 << chan); 27245720Speter } 27345720Speter 27445720Speter if ((chan & 4) == 0) { 27545720Speter /* 27645720Speter * Program one of DMA channels 0..3. These are 27745720Speter * byte mode channels. 27845720Speter */ 27945720Speter /* set dma channel mode, and reset address ff */ 28045720Speter 28157973Sphk /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 28257973Sphk if (flags & ISADMA_RAW) { 28357973Sphk if (flags & ISADMA_READ) 28445720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 28545720Speter else 28645720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 28745720Speter } 28845720Speter else 28957973Sphk if (flags & ISADMA_READ) 29045720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 29145720Speter else 29245720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 29345720Speter outb(DMA1_FFC, 0); 29445720Speter 29545720Speter /* send start address */ 29645720Speter waport = DMA1_CHN(chan); 29745720Speter outb(waport, phys); 29845720Speter outb(waport, phys>>8); 29945720Speter outb(dmapageport[chan], phys>>16); 30045720Speter 30145720Speter /* send count */ 30245720Speter outb(waport + 1, --nbytes); 30345720Speter outb(waport + 1, nbytes>>8); 30445720Speter 30545720Speter /* unmask channel */ 30645720Speter outb(DMA1_SMSK, chan); 30745720Speter } else { 30845720Speter /* 30945720Speter * Program one of DMA channels 4..7. These are 31045720Speter * word mode channels. 31145720Speter */ 31245720Speter /* set dma channel mode, and reset address ff */ 31345720Speter 31457973Sphk /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 31557973Sphk if (flags & ISADMA_RAW) { 31657973Sphk if (flags & ISADMA_READ) 31745720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 31845720Speter else 31945720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 32045720Speter } 32145720Speter else 32257973Sphk if (flags & ISADMA_READ) 32345720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 32445720Speter else 32545720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 32645720Speter outb(DMA2_FFC, 0); 32745720Speter 32845720Speter /* send start address */ 32945720Speter waport = DMA2_CHN(chan - 4); 33045720Speter outb(waport, phys>>1); 33145720Speter outb(waport, phys>>9); 33245720Speter outb(dmapageport[chan], phys>>16); 33345720Speter 33445720Speter /* send count */ 33545720Speter nbytes >>= 1; 33645720Speter outb(waport + 2, --nbytes); 33745720Speter outb(waport + 2, nbytes>>8); 33845720Speter 33945720Speter /* unmask channel */ 34045720Speter outb(DMA2_SMSK, chan & 3); 34145720Speter } 34245720Speter} 34345720Speter 34445720Spetervoid 34545720Speterisa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 34645720Speter{ 34745720Speter#ifdef DIAGNOSTIC 34845720Speter if (chan & ~VALID_DMA_MASK) 34945720Speter panic("isa_dmadone: channel out of range"); 35045720Speter 35145720Speter if ((dma_inuse & (1 << chan)) == 0) 35245720Speter printf("isa_dmadone: channel %d not acquired\n", chan); 35345720Speter#endif 35445720Speter 35545720Speter if (((dma_busy & (1 << chan)) == 0) && 35645720Speter (dma_auto_mode & (1 << chan)) == 0 ) 35745720Speter printf("isa_dmadone: channel %d not busy\n", chan); 35845720Speter 35945720Speter if ((dma_auto_mode & (1 << chan)) == 0) 36045720Speter outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 36145720Speter 36245720Speter if (dma_bounced & (1 << chan)) { 36345720Speter /* copy bounce buffer on read */ 36457973Sphk if (flags & ISADMA_READ) 36545720Speter bcopy(dma_bouncebuf[chan], addr, nbytes); 36645720Speter 36745720Speter dma_bounced &= ~(1 << chan); 36845720Speter } 36945720Speter dma_busy &= ~(1 << chan); 37045720Speter} 37145720Speter 37245720Speter/* 37345720Speter * Check for problems with the address range of a DMA transfer 37445720Speter * (non-contiguous physical pages, outside of bus address space, 37545720Speter * crossing DMA page boundaries). 37645720Speter * Return true if special handling needed. 37745720Speter */ 37845720Speter 37945720Speterstatic int 38045720Speterisa_dmarangecheck(caddr_t va, u_int length, int chan) 38145720Speter{ 382112569Sjake vm_paddr_t phys, priorpage = 0; 383112569Sjake vm_offset_t endva; 38445720Speter u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 38545720Speter 38679224Sdillon GIANT_REQUIRED; 38779224Sdillon 38845720Speter endva = (vm_offset_t)round_page((vm_offset_t)va + length); 38945720Speter for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 39095710Speter phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va)); 39145720Speter#define ISARAM_END RAM_END 39245720Speter if (phys == 0) 39345720Speter panic("isa_dmacheck: no physical page present"); 39445720Speter if (phys >= ISARAM_END) 39545720Speter return (1); 39645720Speter if (priorpage) { 39745720Speter if (priorpage + PAGE_SIZE != phys) 39845720Speter return (1); 39945720Speter /* check if crossing a DMA page boundary */ 40045720Speter if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 40145720Speter return (1); 40245720Speter } 40345720Speter priorpage = phys; 40445720Speter } 40545720Speter return (0); 40645720Speter} 40745720Speter 40845720Speter/* 40945720Speter * Query the progress of a transfer on a DMA channel. 41045720Speter * 41145720Speter * To avoid having to interrupt a transfer in progress, we sample 41245720Speter * each of the high and low databytes twice, and apply the following 41345720Speter * logic to determine the correct count. 41445720Speter * 41545720Speter * Reads are performed with interrupts disabled, thus it is to be 41645720Speter * expected that the time between reads is very small. At most 41745720Speter * one rollover in the low count byte can be expected within the 41845720Speter * four reads that are performed. 41945720Speter * 42045720Speter * There are three gaps in which a rollover can occur : 42145720Speter * 42245720Speter * - read low1 42345720Speter * gap1 42445720Speter * - read high1 42545720Speter * gap2 42645720Speter * - read low2 42745720Speter * gap3 42845720Speter * - read high2 42945720Speter * 43045720Speter * If a rollover occurs in gap1 or gap2, the low2 value will be 43145720Speter * greater than the low1 value. In this case, low2 and high2 are a 43245720Speter * corresponding pair. 43345720Speter * 43445720Speter * In any other case, low1 and high1 can be considered to be correct. 43545720Speter * 43645720Speter * The function returns the number of bytes remaining in the transfer, 43745720Speter * or -1 if the channel requested is not active. 43845720Speter * 43945720Speter */ 44045720Speterint 44145720Speterisa_dmastatus(int chan) 44245720Speter{ 44345720Speter u_long cnt = 0; 44445720Speter int ffport, waport; 44545720Speter u_long low1, high1, low2, high2; 44645720Speter 44745720Speter /* channel active? */ 44845720Speter if ((dma_inuse & (1 << chan)) == 0) { 44945720Speter printf("isa_dmastatus: channel %d not active\n", chan); 45045720Speter return(-1); 45145720Speter } 45245720Speter /* channel busy? */ 45345720Speter 45445720Speter if (((dma_busy & (1 << chan)) == 0) && 45545720Speter (dma_auto_mode & (1 << chan)) == 0 ) { 45645720Speter printf("chan %d not busy\n", chan); 45745720Speter return -2 ; 45845720Speter } 45945720Speter if (chan < 4) { /* low DMA controller */ 46045720Speter ffport = DMA1_FFC; 46145720Speter waport = DMA1_CHN(chan) + 1; 46245720Speter } else { /* high DMA controller */ 46345720Speter ffport = DMA2_FFC; 46445720Speter waport = DMA2_CHN(chan - 4) + 2; 46545720Speter } 46645720Speter 46745720Speter disable_intr(); /* no interrupts Mr Jones! */ 46845720Speter outb(ffport, 0); /* clear register LSB flipflop */ 46945720Speter low1 = inb(waport); 47045720Speter high1 = inb(waport); 47145720Speter outb(ffport, 0); /* clear again */ 47245720Speter low2 = inb(waport); 47345720Speter high2 = inb(waport); 47445720Speter enable_intr(); /* enable interrupts again */ 47545720Speter 47645720Speter /* 47745720Speter * Now decide if a wrap has tried to skew our results. 47845720Speter * Note that after TC, the count will read 0xffff, while we want 47945720Speter * to return zero, so we add and then mask to compensate. 48045720Speter */ 48145720Speter if (low1 >= low2) { 48245720Speter cnt = (low1 + (high1 << 8) + 1) & 0xffff; 48345720Speter } else { 48445720Speter cnt = (low2 + (high2 << 8) + 1) & 0xffff; 48545720Speter } 48645720Speter 48745720Speter if (chan >= 4) /* high channels move words */ 48845720Speter cnt *= 2; 48945720Speter return(cnt); 49045720Speter} 49145720Speter 49245720Speter/* 49345720Speter * Stop a DMA transfer currently in progress. 49445720Speter */ 49545720Speterint 49645720Speterisa_dmastop(int chan) 49745720Speter{ 49845720Speter if ((dma_inuse & (1 << chan)) == 0) 49945720Speter printf("isa_dmastop: channel %d not acquired\n", chan); 50045720Speter 50145720Speter if (((dma_busy & (1 << chan)) == 0) && 50245720Speter ((dma_auto_mode & (1 << chan)) == 0)) { 50345720Speter printf("chan %d not busy\n", chan); 50445720Speter return -2 ; 50545720Speter } 50645720Speter 50745720Speter if ((chan & 4) == 0) { 50845720Speter outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 50945720Speter } else { 51045720Speter outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 51145720Speter } 51245720Speter return(isa_dmastatus(chan)); 51345720Speter} 51461994Smsmith 51561994Smsmith/* 51661994Smsmith * Attach to the ISA PnP descriptor for the AT DMA controller 51761994Smsmith */ 51861994Smsmithstatic struct isa_pnp_id atdma_ids[] = { 51961994Smsmith { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 52061994Smsmith { 0 } 52161994Smsmith}; 52261994Smsmith 52361994Smsmithstatic int 52461994Smsmithatdma_probe(device_t dev) 52561994Smsmith{ 52661994Smsmith int result; 52761994Smsmith 52861994Smsmith if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 52961994Smsmith device_quiet(dev); 53061994Smsmith return(result); 53161994Smsmith} 53261994Smsmith 53361994Smsmithstatic int 53461994Smsmithatdma_attach(device_t dev) 53561994Smsmith{ 53661994Smsmith return(0); 53761994Smsmith} 53861994Smsmith 53961994Smsmithstatic device_method_t atdma_methods[] = { 54061994Smsmith /* Device interface */ 54161994Smsmith DEVMETHOD(device_probe, atdma_probe), 54261994Smsmith DEVMETHOD(device_attach, atdma_attach), 54361994Smsmith DEVMETHOD(device_detach, bus_generic_detach), 54461994Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 54561994Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 54661994Smsmith DEVMETHOD(device_resume, bus_generic_resume), 54761994Smsmith { 0, 0 } 54861994Smsmith}; 54961994Smsmith 55061994Smsmithstatic driver_t atdma_driver = { 55161994Smsmith "atdma", 55261994Smsmith atdma_methods, 55361994Smsmith 1, /* no softc */ 55461994Smsmith}; 55561994Smsmith 55661994Smsmithstatic devclass_t atdma_devclass; 55761994Smsmith 55861994SmsmithDRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 55982555SmsmithDRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0); 560