isa_dma.c revision 115703
145720Speter/*- 245720Speter * Copyright (c) 1991 The Regents of the University of California. 345720Speter * All rights reserved. 445720Speter * 545720Speter * This code is derived from software contributed to Berkeley by 645720Speter * William Jolitz. 745720Speter * 845720Speter * Redistribution and use in source and binary forms, with or without 945720Speter * modification, are permitted provided that the following conditions 1045720Speter * are met: 1145720Speter * 1. Redistributions of source code must retain the above copyright 1245720Speter * notice, this list of conditions and the following disclaimer. 1345720Speter * 2. Redistributions in binary form must reproduce the above copyright 1445720Speter * notice, this list of conditions and the following disclaimer in the 1545720Speter * documentation and/or other materials provided with the distribution. 1645720Speter * 3. All advertising materials mentioning features or use of this software 1745720Speter * must display the following acknowledgement: 1845720Speter * This product includes software developed by the University of 1945720Speter * California, Berkeley and its contributors. 2045720Speter * 4. Neither the name of the University nor the names of its contributors 2145720Speter * may be used to endorse or promote products derived from this software 2245720Speter * without specific prior written permission. 2345720Speter * 2445720Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2545720Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2645720Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2745720Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2845720Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2945720Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3045720Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3145720Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3245720Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3345720Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3445720Speter * SUCH DAMAGE. 3545720Speter * 3645720Speter * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 3745720Speter */ 3845720Speter 39115703Sobrien#include <sys/cdefs.h> 40115703Sobrien__FBSDID("$FreeBSD: head/sys/i386/isa/isa_dma.c 115703 2003-06-02 16:32:55Z obrien $"); 41115703Sobrien 4245720Speter/* 4345720Speter * code to manage AT bus 4445720Speter * 4545720Speter * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 4645720Speter * Fixed uninitialized variable problem and added code to deal 4745720Speter * with DMA page boundaries in isa_dmarangecheck(). Fixed word 4845720Speter * mode DMA count compution and reorganized DMA setup code in 4945720Speter * isa_dmastart() 5045720Speter */ 5145720Speter 5245720Speter#include <sys/param.h> 5345720Speter#include <sys/systm.h> 5461994Smsmith#include <sys/bus.h> 5561994Smsmith#include <sys/kernel.h> 5645720Speter#include <sys/malloc.h> 5777081Salfred#include <sys/lock.h> 5879224Sdillon#include <sys/proc.h> 5977081Salfred#include <sys/mutex.h> 6061994Smsmith#include <sys/module.h> 6145720Speter#include <vm/vm.h> 6245720Speter#include <vm/vm_param.h> 6345720Speter#include <vm/pmap.h> 6445720Speter#include <i386/isa/isa.h> 6579008Simp#include <dev/ic/i8237.h> 6661994Smsmith#include <isa/isavar.h> 6745720Speter 6845720Speter/* 6945720Speter** Register definitions for DMA controller 1 (channels 0..3): 7045720Speter*/ 7145720Speter#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 7245720Speter#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 7345720Speter#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 7445720Speter#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 7545720Speter 7645720Speter/* 7745720Speter** Register definitions for DMA controller 2 (channels 4..7): 7845720Speter*/ 7945720Speter#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 8045720Speter#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 8145720Speter#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 8245720Speter#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 8345720Speter 8492765Salfredstatic int isa_dmarangecheck(caddr_t va, u_int length, int chan); 8545720Speter 8645720Speterstatic caddr_t dma_bouncebuf[8]; 8745720Speterstatic u_int dma_bouncebufsize[8]; 8845720Speterstatic u_int8_t dma_bounced = 0; 8945720Speterstatic u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 9045720Speterstatic u_int8_t dma_inuse = 0; /* User for acquire/release */ 9145720Speterstatic u_int8_t dma_auto_mode = 0; 9245720Speter 9345720Speter#define VALID_DMA_MASK (7) 9445720Speter 9545720Speter/* high byte of address is stored in this port for i-th dma channel */ 9645720Speterstatic int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 9745720Speter 9845720Speter/* 9945720Speter * Setup a DMA channel's bounce buffer. 10045720Speter */ 10145720Spetervoid 10245720Speterisa_dmainit(chan, bouncebufsize) 10345720Speter int chan; 10445720Speter u_int bouncebufsize; 10545720Speter{ 10645720Speter void *buf; 10745720Speter 10845720Speter#ifdef DIAGNOSTIC 10945720Speter if (chan & ~VALID_DMA_MASK) 11045720Speter panic("isa_dmainit: channel out of range"); 11145720Speter 11245720Speter if (dma_bouncebuf[chan] != NULL) 11345720Speter panic("isa_dmainit: impossible request"); 11445720Speter#endif 11545720Speter 11645720Speter dma_bouncebufsize[chan] = bouncebufsize; 11745720Speter 11845720Speter /* Try malloc() first. It works better if it works. */ 11945720Speter buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 12045720Speter if (buf != NULL) { 12145720Speter if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 12245720Speter dma_bouncebuf[chan] = buf; 12345720Speter return; 12445720Speter } 12545720Speter free(buf, M_DEVBUF); 12645720Speter } 12745720Speter buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 12845720Speter 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 12945720Speter if (buf == NULL) 13045720Speter printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 13145720Speter else 13245720Speter dma_bouncebuf[chan] = buf; 13345720Speter} 13445720Speter 13545720Speter/* 13645720Speter * Register a DMA channel's usage. Usually called from a device driver 13745720Speter * in open() or during its initialization. 13845720Speter */ 13945720Speterint 14045720Speterisa_dma_acquire(chan) 14145720Speter int chan; 14245720Speter{ 14345720Speter#ifdef DIAGNOSTIC 14445720Speter if (chan & ~VALID_DMA_MASK) 14545720Speter panic("isa_dma_acquire: channel out of range"); 14645720Speter#endif 14745720Speter 14845720Speter if (dma_inuse & (1 << chan)) { 14945720Speter printf("isa_dma_acquire: channel %d already in use\n", chan); 15045720Speter return (EBUSY); 15145720Speter } 15245720Speter dma_inuse |= (1 << chan); 15345720Speter dma_auto_mode &= ~(1 << chan); 15445720Speter 15545720Speter return (0); 15645720Speter} 15745720Speter 15845720Speter/* 15945720Speter * Unregister a DMA channel's usage. Usually called from a device driver 16045720Speter * during close() or during its shutdown. 16145720Speter */ 16245720Spetervoid 16345720Speterisa_dma_release(chan) 16445720Speter int chan; 16545720Speter{ 16645720Speter#ifdef DIAGNOSTIC 16745720Speter if (chan & ~VALID_DMA_MASK) 16845720Speter panic("isa_dma_release: channel out of range"); 16945720Speter 17045720Speter if ((dma_inuse & (1 << chan)) == 0) 17145720Speter printf("isa_dma_release: channel %d not in use\n", chan); 17245720Speter#endif 17345720Speter 17445720Speter if (dma_busy & (1 << chan)) { 17545720Speter dma_busy &= ~(1 << chan); 17645720Speter /* 17745720Speter * XXX We should also do "dma_bounced &= (1 << chan);" 17845720Speter * because we are acting on behalf of isa_dmadone() which 17945720Speter * was not called to end the last DMA operation. This does 18045720Speter * not matter now, but it may in the future. 18145720Speter */ 18245720Speter } 18345720Speter 18445720Speter dma_inuse &= ~(1 << chan); 18545720Speter dma_auto_mode &= ~(1 << chan); 18645720Speter} 18745720Speter 18845720Speter/* 18945720Speter * isa_dmacascade(): program 8237 DMA controller channel to accept 19045720Speter * external dma control by a board. 19145720Speter */ 19245720Spetervoid 19345720Speterisa_dmacascade(chan) 19445720Speter int chan; 19545720Speter{ 19645720Speter#ifdef DIAGNOSTIC 19745720Speter if (chan & ~VALID_DMA_MASK) 19845720Speter panic("isa_dmacascade: channel out of range"); 19945720Speter#endif 20045720Speter 20145720Speter /* set dma channel mode, and set dma channel mode */ 20245720Speter if ((chan & 4) == 0) { 20345720Speter outb(DMA1_MODE, DMA37MD_CASCADE | chan); 20445720Speter outb(DMA1_SMSK, chan); 20545720Speter } else { 20645720Speter outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 20745720Speter outb(DMA2_SMSK, chan & 3); 20845720Speter } 20945720Speter} 21045720Speter 21145720Speter/* 21245720Speter * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 21345720Speter * problems by using a bounce buffer. 21445720Speter */ 21545720Spetervoid 21645720Speterisa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 21745720Speter{ 218112569Sjake vm_paddr_t phys; 21945720Speter int waport; 22045720Speter caddr_t newaddr; 22145720Speter 22279224Sdillon GIANT_REQUIRED; 22379224Sdillon 22445720Speter#ifdef DIAGNOSTIC 22545720Speter if (chan & ~VALID_DMA_MASK) 22645720Speter panic("isa_dmastart: channel out of range"); 22745720Speter 22845720Speter if ((chan < 4 && nbytes > (1<<16)) 22945720Speter || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 23045720Speter panic("isa_dmastart: impossible request"); 23145720Speter 23245720Speter if ((dma_inuse & (1 << chan)) == 0) 23345720Speter printf("isa_dmastart: channel %d not acquired\n", chan); 23445720Speter#endif 23545720Speter 23645720Speter#if 0 23745720Speter /* 23845720Speter * XXX This should be checked, but drivers like ad1848 only call 23945720Speter * isa_dmastart() once because they use Auto DMA mode. If we 24045720Speter * leave this in, drivers that do this will print this continuously. 24145720Speter */ 24245720Speter if (dma_busy & (1 << chan)) 24345720Speter printf("isa_dmastart: channel %d busy\n", chan); 24445720Speter#endif 24545720Speter 24645720Speter dma_busy |= (1 << chan); 24745720Speter 24845720Speter if (isa_dmarangecheck(addr, nbytes, chan)) { 24945720Speter if (dma_bouncebuf[chan] == NULL 25045720Speter || dma_bouncebufsize[chan] < nbytes) 25145720Speter panic("isa_dmastart: bad bounce buffer"); 25245720Speter dma_bounced |= (1 << chan); 25345720Speter newaddr = dma_bouncebuf[chan]; 25445720Speter 25545720Speter /* copy bounce buffer on write */ 25657973Sphk if (!(flags & ISADMA_READ)) 25745720Speter bcopy(addr, newaddr, nbytes); 25845720Speter addr = newaddr; 25945720Speter } 26045720Speter 26145720Speter /* translate to physical */ 26295710Speter phys = pmap_extract(kernel_pmap, (vm_offset_t)addr); 26345720Speter 26457973Sphk if (flags & ISADMA_RAW) { 26545720Speter dma_auto_mode |= (1 << chan); 26645720Speter } else { 26745720Speter dma_auto_mode &= ~(1 << chan); 26845720Speter } 26945720Speter 27045720Speter if ((chan & 4) == 0) { 27145720Speter /* 27245720Speter * Program one of DMA channels 0..3. These are 27345720Speter * byte mode channels. 27445720Speter */ 27545720Speter /* set dma channel mode, and reset address ff */ 27645720Speter 27757973Sphk /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 27857973Sphk if (flags & ISADMA_RAW) { 27957973Sphk if (flags & ISADMA_READ) 28045720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 28145720Speter else 28245720Speter outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 28345720Speter } 28445720Speter else 28557973Sphk if (flags & ISADMA_READ) 28645720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 28745720Speter else 28845720Speter outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 28945720Speter outb(DMA1_FFC, 0); 29045720Speter 29145720Speter /* send start address */ 29245720Speter waport = DMA1_CHN(chan); 29345720Speter outb(waport, phys); 29445720Speter outb(waport, phys>>8); 29545720Speter outb(dmapageport[chan], phys>>16); 29645720Speter 29745720Speter /* send count */ 29845720Speter outb(waport + 1, --nbytes); 29945720Speter outb(waport + 1, nbytes>>8); 30045720Speter 30145720Speter /* unmask channel */ 30245720Speter outb(DMA1_SMSK, chan); 30345720Speter } else { 30445720Speter /* 30545720Speter * Program one of DMA channels 4..7. These are 30645720Speter * word mode channels. 30745720Speter */ 30845720Speter /* set dma channel mode, and reset address ff */ 30945720Speter 31057973Sphk /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 31157973Sphk if (flags & ISADMA_RAW) { 31257973Sphk if (flags & ISADMA_READ) 31345720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 31445720Speter else 31545720Speter outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 31645720Speter } 31745720Speter else 31857973Sphk if (flags & ISADMA_READ) 31945720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 32045720Speter else 32145720Speter outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 32245720Speter outb(DMA2_FFC, 0); 32345720Speter 32445720Speter /* send start address */ 32545720Speter waport = DMA2_CHN(chan - 4); 32645720Speter outb(waport, phys>>1); 32745720Speter outb(waport, phys>>9); 32845720Speter outb(dmapageport[chan], phys>>16); 32945720Speter 33045720Speter /* send count */ 33145720Speter nbytes >>= 1; 33245720Speter outb(waport + 2, --nbytes); 33345720Speter outb(waport + 2, nbytes>>8); 33445720Speter 33545720Speter /* unmask channel */ 33645720Speter outb(DMA2_SMSK, chan & 3); 33745720Speter } 33845720Speter} 33945720Speter 34045720Spetervoid 34145720Speterisa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 34245720Speter{ 34345720Speter#ifdef DIAGNOSTIC 34445720Speter if (chan & ~VALID_DMA_MASK) 34545720Speter panic("isa_dmadone: channel out of range"); 34645720Speter 34745720Speter if ((dma_inuse & (1 << chan)) == 0) 34845720Speter printf("isa_dmadone: channel %d not acquired\n", chan); 34945720Speter#endif 35045720Speter 35145720Speter if (((dma_busy & (1 << chan)) == 0) && 35245720Speter (dma_auto_mode & (1 << chan)) == 0 ) 35345720Speter printf("isa_dmadone: channel %d not busy\n", chan); 35445720Speter 35545720Speter if ((dma_auto_mode & (1 << chan)) == 0) 35645720Speter outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 35745720Speter 35845720Speter if (dma_bounced & (1 << chan)) { 35945720Speter /* copy bounce buffer on read */ 36057973Sphk if (flags & ISADMA_READ) 36145720Speter bcopy(dma_bouncebuf[chan], addr, nbytes); 36245720Speter 36345720Speter dma_bounced &= ~(1 << chan); 36445720Speter } 36545720Speter dma_busy &= ~(1 << chan); 36645720Speter} 36745720Speter 36845720Speter/* 36945720Speter * Check for problems with the address range of a DMA transfer 37045720Speter * (non-contiguous physical pages, outside of bus address space, 37145720Speter * crossing DMA page boundaries). 37245720Speter * Return true if special handling needed. 37345720Speter */ 37445720Speter 37545720Speterstatic int 37645720Speterisa_dmarangecheck(caddr_t va, u_int length, int chan) 37745720Speter{ 378112569Sjake vm_paddr_t phys, priorpage = 0; 379112569Sjake vm_offset_t endva; 38045720Speter u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 38145720Speter 38279224Sdillon GIANT_REQUIRED; 38379224Sdillon 38445720Speter endva = (vm_offset_t)round_page((vm_offset_t)va + length); 38545720Speter for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 38695710Speter phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va)); 38745720Speter#define ISARAM_END RAM_END 38845720Speter if (phys == 0) 38945720Speter panic("isa_dmacheck: no physical page present"); 39045720Speter if (phys >= ISARAM_END) 39145720Speter return (1); 39245720Speter if (priorpage) { 39345720Speter if (priorpage + PAGE_SIZE != phys) 39445720Speter return (1); 39545720Speter /* check if crossing a DMA page boundary */ 39645720Speter if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 39745720Speter return (1); 39845720Speter } 39945720Speter priorpage = phys; 40045720Speter } 40145720Speter return (0); 40245720Speter} 40345720Speter 40445720Speter/* 40545720Speter * Query the progress of a transfer on a DMA channel. 40645720Speter * 40745720Speter * To avoid having to interrupt a transfer in progress, we sample 40845720Speter * each of the high and low databytes twice, and apply the following 40945720Speter * logic to determine the correct count. 41045720Speter * 41145720Speter * Reads are performed with interrupts disabled, thus it is to be 41245720Speter * expected that the time between reads is very small. At most 41345720Speter * one rollover in the low count byte can be expected within the 41445720Speter * four reads that are performed. 41545720Speter * 41645720Speter * There are three gaps in which a rollover can occur : 41745720Speter * 41845720Speter * - read low1 41945720Speter * gap1 42045720Speter * - read high1 42145720Speter * gap2 42245720Speter * - read low2 42345720Speter * gap3 42445720Speter * - read high2 42545720Speter * 42645720Speter * If a rollover occurs in gap1 or gap2, the low2 value will be 42745720Speter * greater than the low1 value. In this case, low2 and high2 are a 42845720Speter * corresponding pair. 42945720Speter * 43045720Speter * In any other case, low1 and high1 can be considered to be correct. 43145720Speter * 43245720Speter * The function returns the number of bytes remaining in the transfer, 43345720Speter * or -1 if the channel requested is not active. 43445720Speter * 43545720Speter */ 43645720Speterint 43745720Speterisa_dmastatus(int chan) 43845720Speter{ 43945720Speter u_long cnt = 0; 44045720Speter int ffport, waport; 44145720Speter u_long low1, high1, low2, high2; 44245720Speter 44345720Speter /* channel active? */ 44445720Speter if ((dma_inuse & (1 << chan)) == 0) { 44545720Speter printf("isa_dmastatus: channel %d not active\n", chan); 44645720Speter return(-1); 44745720Speter } 44845720Speter /* channel busy? */ 44945720Speter 45045720Speter if (((dma_busy & (1 << chan)) == 0) && 45145720Speter (dma_auto_mode & (1 << chan)) == 0 ) { 45245720Speter printf("chan %d not busy\n", chan); 45345720Speter return -2 ; 45445720Speter } 45545720Speter if (chan < 4) { /* low DMA controller */ 45645720Speter ffport = DMA1_FFC; 45745720Speter waport = DMA1_CHN(chan) + 1; 45845720Speter } else { /* high DMA controller */ 45945720Speter ffport = DMA2_FFC; 46045720Speter waport = DMA2_CHN(chan - 4) + 2; 46145720Speter } 46245720Speter 46345720Speter disable_intr(); /* no interrupts Mr Jones! */ 46445720Speter outb(ffport, 0); /* clear register LSB flipflop */ 46545720Speter low1 = inb(waport); 46645720Speter high1 = inb(waport); 46745720Speter outb(ffport, 0); /* clear again */ 46845720Speter low2 = inb(waport); 46945720Speter high2 = inb(waport); 47045720Speter enable_intr(); /* enable interrupts again */ 47145720Speter 47245720Speter /* 47345720Speter * Now decide if a wrap has tried to skew our results. 47445720Speter * Note that after TC, the count will read 0xffff, while we want 47545720Speter * to return zero, so we add and then mask to compensate. 47645720Speter */ 47745720Speter if (low1 >= low2) { 47845720Speter cnt = (low1 + (high1 << 8) + 1) & 0xffff; 47945720Speter } else { 48045720Speter cnt = (low2 + (high2 << 8) + 1) & 0xffff; 48145720Speter } 48245720Speter 48345720Speter if (chan >= 4) /* high channels move words */ 48445720Speter cnt *= 2; 48545720Speter return(cnt); 48645720Speter} 48745720Speter 48845720Speter/* 48945720Speter * Stop a DMA transfer currently in progress. 49045720Speter */ 49145720Speterint 49245720Speterisa_dmastop(int chan) 49345720Speter{ 49445720Speter if ((dma_inuse & (1 << chan)) == 0) 49545720Speter printf("isa_dmastop: channel %d not acquired\n", chan); 49645720Speter 49745720Speter if (((dma_busy & (1 << chan)) == 0) && 49845720Speter ((dma_auto_mode & (1 << chan)) == 0)) { 49945720Speter printf("chan %d not busy\n", chan); 50045720Speter return -2 ; 50145720Speter } 50245720Speter 50345720Speter if ((chan & 4) == 0) { 50445720Speter outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 50545720Speter } else { 50645720Speter outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 50745720Speter } 50845720Speter return(isa_dmastatus(chan)); 50945720Speter} 51061994Smsmith 51161994Smsmith/* 51261994Smsmith * Attach to the ISA PnP descriptor for the AT DMA controller 51361994Smsmith */ 51461994Smsmithstatic struct isa_pnp_id atdma_ids[] = { 51561994Smsmith { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 51661994Smsmith { 0 } 51761994Smsmith}; 51861994Smsmith 51961994Smsmithstatic int 52061994Smsmithatdma_probe(device_t dev) 52161994Smsmith{ 52261994Smsmith int result; 52361994Smsmith 52461994Smsmith if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 52561994Smsmith device_quiet(dev); 52661994Smsmith return(result); 52761994Smsmith} 52861994Smsmith 52961994Smsmithstatic int 53061994Smsmithatdma_attach(device_t dev) 53161994Smsmith{ 53261994Smsmith return(0); 53361994Smsmith} 53461994Smsmith 53561994Smsmithstatic device_method_t atdma_methods[] = { 53661994Smsmith /* Device interface */ 53761994Smsmith DEVMETHOD(device_probe, atdma_probe), 53861994Smsmith DEVMETHOD(device_attach, atdma_attach), 53961994Smsmith DEVMETHOD(device_detach, bus_generic_detach), 54061994Smsmith DEVMETHOD(device_shutdown, bus_generic_shutdown), 54161994Smsmith DEVMETHOD(device_suspend, bus_generic_suspend), 54261994Smsmith DEVMETHOD(device_resume, bus_generic_resume), 54361994Smsmith { 0, 0 } 54461994Smsmith}; 54561994Smsmith 54661994Smsmithstatic driver_t atdma_driver = { 54761994Smsmith "atdma", 54861994Smsmith atdma_methods, 54961994Smsmith 1, /* no softc */ 55061994Smsmith}; 55161994Smsmith 55261994Smsmithstatic devclass_t atdma_devclass; 55361994Smsmith 55461994SmsmithDRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 55582555SmsmithDRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0); 556