icu.h revision 76645
14Srgrimes/*- 24Srgrimes * Copyright (c) 1990 The Regents of the University of California. 34Srgrimes * All rights reserved. 44Srgrimes * 54Srgrimes * This code is derived from software contributed to Berkeley by 64Srgrimes * William Jolitz. 74Srgrimes * 84Srgrimes * Redistribution and use in source and binary forms, with or without 94Srgrimes * modification, are permitted provided that the following conditions 104Srgrimes * are met: 114Srgrimes * 1. Redistributions of source code must retain the above copyright 124Srgrimes * notice, this list of conditions and the following disclaimer. 134Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 144Srgrimes * notice, this list of conditions and the following disclaimer in the 154Srgrimes * documentation and/or other materials provided with the distribution. 164Srgrimes * 3. All advertising materials mentioning features or use of this software 174Srgrimes * must display the following acknowledgement: 184Srgrimes * This product includes software developed by the University of 194Srgrimes * California, Berkeley and its contributors. 204Srgrimes * 4. Neither the name of the University nor the names of its contributors 214Srgrimes * may be used to endorse or promote products derived from this software 224Srgrimes * without specific prior written permission. 234Srgrimes * 244Srgrimes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 254Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 264Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 274Srgrimes * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 284Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 294Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 304Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 314Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 324Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 334Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 344Srgrimes * SUCH DAMAGE. 354Srgrimes * 36619Srgrimes * from: @(#)icu.h 5.6 (Berkeley) 5/9/91 3750477Speter * $FreeBSD: head/sys/i386/isa/icu.h 76645 2001-05-15 23:11:48Z jhb $ 384Srgrimes */ 394Srgrimes 404Srgrimes/* 414Srgrimes * AT/386 Interrupt Control constants 424Srgrimes * W. Jolitz 8/89 434Srgrimes */ 444Srgrimes 452873Sbde#ifndef _I386_ISA_ICU_H_ 462873Sbde#define _I386_ISA_ICU_H_ 474Srgrimes 484Srgrimes#ifndef LOCORE 494Srgrimes 504Srgrimes/* 5127616Sfsmp#define MP_SAFE 5227616Sfsmp * Note: 5327616Sfsmp * Most of the SMP equivilants of the icu macros are coded 5427616Sfsmp * elsewhere in an MP-safe fashion. 5527616Sfsmp * In particular note that the 'imen' variable is opaque. 5627616Sfsmp * DO NOT access imen directly, use INTREN()/INTRDIS(). 574Srgrimes */ 584Srgrimes 5932151Sbdevoid INTREN __P((u_int)); 6032151Sbdevoid INTRDIS __P((u_int)); 6125164Speter 6269578Speter#ifdef APIC_IO 6369578Speterextern unsigned apic_imen; /* APIC interrupt mask enable */ 6469578Speter#define APIC_IMEN_BITS 32 /* number of bits in apic_imen */ 6569578Speter#else 6627616Sfsmpextern unsigned imen; /* interrupt mask enable */ 6769578Speter#define IMEN_BITS 16 /* number of bits in imen */ 684Srgrimes#endif 694Srgrimes 702874Sbde#endif /* LOCORE */ 714Srgrimes 7227616Sfsmp 7327616Sfsmp#ifdef APIC_IO 744Srgrimes/* 7527616Sfsmp * Note: The APIC uses different values for IRQxxx. 7627616Sfsmp * Unfortunately many drivers use the 8259 values as indexes 7727616Sfsmp * into tables, etc. The APIC equivilants are kept as APIC_IRQxxx. 7827616Sfsmp * The 8259 versions have to be used in SMP for legacy operation 7927616Sfsmp * of the drivers. 8027616Sfsmp */ 8127616Sfsmp#endif /* APIC_IO */ 8227616Sfsmp 8327616Sfsmp/* 841321Sdg * Interrupt enable bits - in normal order of priority (which we change) 854Srgrimes */ 864Srgrimes#define IRQ0 0x0001 /* highest priority - timer */ 874Srgrimes#define IRQ1 0x0002 884Srgrimes#define IRQ_SLAVE 0x0004 894Srgrimes#define IRQ8 0x0100 904Srgrimes#define IRQ9 0x0200 914Srgrimes#define IRQ2 IRQ9 924Srgrimes#define IRQ10 0x0400 934Srgrimes#define IRQ11 0x0800 944Srgrimes#define IRQ12 0x1000 954Srgrimes#define IRQ13 0x2000 964Srgrimes#define IRQ14 0x4000 974Srgrimes#define IRQ15 0x8000 981321Sdg#define IRQ3 0x0008 /* this is highest after rotation */ 994Srgrimes#define IRQ4 0x0010 1004Srgrimes#define IRQ5 0x0020 1014Srgrimes#define IRQ6 0x0040 1024Srgrimes#define IRQ7 0x0080 /* lowest - parallel printer */ 1034Srgrimes 10418095Sasami#ifdef PC98 10518095Sasami#undef IRQ2 10618095Sasami#define IRQ2 0x0004 10718095Sasami#undef IRQ_SLAVE 10818095Sasami#define IRQ_SLAVE 0x0080 10918095Sasami#endif 11018095Sasami 11127616Sfsmp 1124Srgrimes/* 1134Srgrimes * Interrupt Control offset into Interrupt descriptor table (IDT) 1144Srgrimes */ 1154Srgrimes#define ICU_OFFSET 32 /* 0-31 are processor exceptions */ 11625164Speter 11727616Sfsmp#ifdef APIC_IO 11825164Speter 11971247Speter/* 32-47: ISA IRQ0-IRQ15, 48-55: IO APIC IRQ16-IRQ31 */ 12071247Speter#define ICU_LEN 32 12176645Sjhb#define HWI_MASK 0xffffffff /* bits for h/w interrupts */ 12225164Speter 12325164Speter#else 12425164Speter 1254Srgrimes#define ICU_LEN 16 /* 32-47 are ISA interrupts */ 12676645Sjhb#define HWI_MASK 0xffff /* bits for h/w interrupts */ 1274Srgrimes 12825164Speter#endif /* APIC_IO */ 12925164Speter 1302873Sbde#endif /* !_I386_ISA_ICU_H_ */ 131