ofw_pci_if.m revision 166092 
1#-
2# Copyright (c) 2001, 2003 by Thomas Moestl <tmm@FreeBSD.org>
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8# 1. Redistributions of source code must retain the above copyright
9#    notice, this list of conditions and the following disclaimer.
10# 2. Redistributions in binary form must reproduce the above copyright
11#    notice, this list of conditions and the following disclaimer in the
12#    documentation and/or other materials provided with the distribution.
13#
14# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17# IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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19# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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21# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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23# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24#
25# $FreeBSD: head/sys/sparc64/pci/ofw_pci_if.m 166092 2007-01-18 13:52:44Z marius $
26
27#include <sys/bus.h>
28
29#include <dev/ofw/openfirm.h>
30
31#include <sparc64/pci/ofw_pci.h>
32
33INTERFACE ofw_pci;
34
35CODE {
36	static ofw_pci_intr_pending_t ofw_pci_default_intr_pending;
37	static ofw_pci_adjust_busrange_t ofw_pci_default_adjust_busrange;
38
39	static int
40	ofw_pci_default_intr_pending(device_t dev, ofw_pci_intr_t intr)
41	{
42
43		return (OFW_PCI_INTR_PENDING(device_get_parent(dev), intr));
44	}
45
46	static void
47	ofw_pci_default_adjust_busrange(device_t dev, u_int busno)
48	{
49
50		return (OFW_PCI_ADJUST_BUSRANGE(device_get_parent(dev), busno));
51	}
52};
53
54# Return whether an interrupt request is pending for the INO intr.
55METHOD int intr_pending {
56	device_t dev;
57	ofw_pci_intr_t intr;
58} DEFAULT ofw_pci_default_intr_pending;
59
60# Make sure that all PCI bridges up in the hierarchy contain this bus in their
61# subordinate bus range. This is required because we reenumerate all PCI
62# buses.
63METHOD void adjust_busrange {
64	device_t dev;
65	u_int subbus;
66} DEFAULT ofw_pci_default_adjust_busrange;
67