fhc.c revision 190114
1/*- 2 * Copyright (c) 2003 Jake Burkholder. 3 * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD: head/sys/sparc64/fhc/fhc.c 190114 2009-03-19 21:14:45Z marius $"); 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34#include <sys/kernel.h> 35#include <sys/malloc.h> 36#include <sys/module.h> 37#include <sys/pcpu.h> 38 39#include <dev/led/led.h> 40#include <dev/ofw/ofw_bus.h> 41#include <dev/ofw/ofw_bus_subr.h> 42#include <dev/ofw/openfirm.h> 43 44#include <machine/bus.h> 45#include <machine/bus_common.h> 46#include <machine/resource.h> 47 48#include <sys/rman.h> 49 50#include <sparc64/fhc/fhcreg.h> 51#include <sparc64/sbus/ofw_sbus.h> 52 53struct fhc_devinfo { 54 struct ofw_bus_devinfo fdi_obdinfo; 55 struct resource_list fdi_rl; 56}; 57 58struct fhc_softc { 59 struct resource *sc_memres[FHC_NREG]; 60 int sc_nrange; 61 struct sbus_ranges *sc_ranges; 62 int sc_ign; 63 struct cdev *sc_led_dev; 64}; 65 66static device_probe_t fhc_probe; 67static device_attach_t fhc_attach; 68static bus_print_child_t fhc_print_child; 69static bus_probe_nomatch_t fhc_probe_nomatch; 70static bus_setup_intr_t fhc_setup_intr; 71static bus_alloc_resource_t fhc_alloc_resource; 72static bus_get_resource_list_t fhc_get_resource_list; 73static ofw_bus_get_devinfo_t fhc_get_devinfo; 74 75static void fhc_intr_enable(void *); 76static void fhc_intr_disable(void *); 77static void fhc_intr_assign(void *); 78static void fhc_intr_clear(void *); 79static void fhc_led_func(void *, int); 80static int fhc_print_res(struct fhc_devinfo *); 81 82static device_method_t fhc_methods[] = { 83 /* Device interface */ 84 DEVMETHOD(device_probe, fhc_probe), 85 DEVMETHOD(device_attach, fhc_attach), 86 DEVMETHOD(device_shutdown, bus_generic_shutdown), 87 DEVMETHOD(device_suspend, bus_generic_suspend), 88 DEVMETHOD(device_resume, bus_generic_resume), 89 90 /* Bus interface */ 91 DEVMETHOD(bus_print_child, fhc_print_child), 92 DEVMETHOD(bus_probe_nomatch, fhc_probe_nomatch), 93 DEVMETHOD(bus_alloc_resource, fhc_alloc_resource), 94 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 95 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 96 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 97 DEVMETHOD(bus_setup_intr, fhc_setup_intr), 98 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 99 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 100 DEVMETHOD(bus_get_resource_list, fhc_get_resource_list), 101 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 102 103 /* ofw_bus interface */ 104 DEVMETHOD(ofw_bus_get_devinfo, fhc_get_devinfo), 105 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 106 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 107 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 108 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 109 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 110 111 KOBJMETHOD_END 112}; 113 114static driver_t fhc_driver = { 115 "fhc", 116 fhc_methods, 117 sizeof(struct fhc_softc), 118}; 119 120static devclass_t fhc_devclass; 121 122DRIVER_MODULE(fhc, central, fhc_driver, fhc_devclass, 0, 0); 123DRIVER_MODULE(fhc, nexus, fhc_driver, fhc_devclass, 0, 0); 124MODULE_DEPEND(fhc, central, 1, 1, 1); 125MODULE_VERSION(fhc, 1); 126 127static const struct intr_controller fhc_ic = { 128 fhc_intr_enable, 129 fhc_intr_disable, 130 fhc_intr_assign, 131 fhc_intr_clear 132}; 133 134struct fhc_icarg { 135 struct fhc_softc *fica_sc; 136 struct resource *fica_memres; 137}; 138 139static int 140fhc_probe(device_t dev) 141{ 142 143 if (strcmp(ofw_bus_get_name(dev), "fhc") == 0) { 144 device_set_desc(dev, "fhc"); 145 return (0); 146 } 147 return (ENXIO); 148} 149 150static int 151fhc_attach(device_t dev) 152{ 153 char ledname[sizeof("boardXX")]; 154 struct fhc_devinfo *fdi; 155 struct fhc_icarg *fica; 156 struct fhc_softc *sc; 157 struct sbus_regs *reg; 158 phandle_t child; 159 phandle_t node; 160 device_t cdev; 161 uint32_t board; 162 uint32_t ctrl; 163 uint32_t *intr; 164 uint32_t iv; 165 char *name; 166 int central; 167 int error; 168 int i; 169 int j; 170 171 sc = device_get_softc(dev); 172 node = ofw_bus_get_node(dev); 173 174 central = 0; 175 if (strcmp(device_get_name(device_get_parent(dev)), "central") == 0) 176 central = 1; 177 178 for (i = 0; i < FHC_NREG; i++) { 179 j = i; 180 sc->sc_memres[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 181 &j, RF_ACTIVE); 182 if (sc->sc_memres[i] == NULL) { 183 device_printf(dev, "cannot allocate resource %d\n", i); 184 error = ENXIO; 185 goto fail_memres; 186 } 187 } 188 189 if (central != 0) { 190 board = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_BSR); 191 board = ((board >> 16) & 0x1) | ((board >> 12) & 0xe); 192 } else { 193 if (OF_getprop(node, "board#", &board, sizeof(board)) == -1) { 194 device_printf(dev, "cannot get board number\n"); 195 error = ENXIO; 196 goto fail_memres; 197 } 198 } 199 200 device_printf(dev, "board %d, ", board); 201 if (OF_getprop_alloc(node, "board-model", 1, (void **)&name) != -1) { 202 printf("model %s\n", name); 203 free(name, M_OFWPROP); 204 } else 205 printf("model unknown\n"); 206 207 for (i = FHC_FANFAIL; i <= FHC_TOD; i++) { 208 bus_write_4(sc->sc_memres[i], FHC_ICLR, 0x0); 209 (void)bus_read_4(sc->sc_memres[i], FHC_ICLR); 210 } 211 212 sc->sc_ign = board << 1; 213 bus_write_4(sc->sc_memres[FHC_IGN], 0x0, sc->sc_ign); 214 sc->sc_ign = bus_read_4(sc->sc_memres[FHC_IGN], 0x0); 215 216 ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL); 217 if (central == 0) 218 ctrl |= FHC_CTRL_IXIST; 219 ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE); 220 bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl); 221 (void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL); 222 223 sc->sc_nrange = OF_getprop_alloc(node, "ranges", 224 sizeof(*sc->sc_ranges), (void **)&sc->sc_ranges); 225 if (sc->sc_nrange == -1) { 226 device_printf(dev, "cannot get ranges\n"); 227 error = ENXIO; 228 goto fail_memres; 229 } 230 231 /* 232 * Apparently only the interrupt controller of boards hanging off 233 * of central(4) is indented to be used, otherwise we would have 234 * conflicts registering the interrupt controllers for all FHC 235 * boards as the board number and thus the IGN isn't unique. 236 */ 237 if (central == 1) { 238 /* 239 * Hunt through all the interrupt mapping regs and register 240 * our interrupt controller for the corresponding interrupt 241 * vectors. We do this early in order to be able to catch 242 * stray interrupts. 243 */ 244 for (i = FHC_FANFAIL; i <= FHC_TOD; i++) { 245 fica = malloc(sizeof(*fica), M_DEVBUF, M_NOWAIT); 246 if (fica == NULL) 247 panic("%s: could not allocate interrupt " 248 "controller argument", __func__); 249 fica->fica_sc = sc; 250 fica->fica_memres = sc->sc_memres[i]; 251#ifdef FHC_DEBUG 252 device_printf(dev, "intr map %d: %#lx, clr: %#lx\n", i, 253 (u_long)bus_read_4(fica->fica_memres, FHC_IMAP), 254 (u_long)bus_read_4(fica->fica_memres, FHC_ICLR)); 255#endif 256 /* 257 * XXX we only pick the INO rather than the INR 258 * from the IMR since the firmware may not provide 259 * the IGN and the IGN is constant for all devices 260 * on that FireHose controller. 261 */ 262 j = intr_controller_register(INTMAP_VEC(sc->sc_ign, 263 INTINO(bus_read_4(fica->fica_memres, FHC_IMAP))), 264 &fhc_ic, fica); 265 if (j != 0) 266 device_printf(dev, "could not register " 267 "interrupt controller for map %d (%d)\n", 268 i, j); 269 } 270 } else { 271 snprintf(ledname, sizeof(ledname), "board%d", board); 272 sc->sc_led_dev = led_create(fhc_led_func, sc, ledname); 273 } 274 275 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 276 fdi = malloc(sizeof(*fdi), M_DEVBUF, M_WAITOK | M_ZERO); 277 if (ofw_bus_gen_setup_devinfo(&fdi->fdi_obdinfo, child) != 0) { 278 free(fdi, M_DEVBUF); 279 continue; 280 } 281 i = OF_getprop_alloc(child, "reg", sizeof(*reg), 282 (void **)®); 283 if (i == -1) { 284 device_printf(dev, "<%s>: incomplete\n", 285 fdi->fdi_obdinfo.obd_name); 286 ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo); 287 free(fdi, M_DEVBUF); 288 continue; 289 } 290 resource_list_init(&fdi->fdi_rl); 291 for (j = 0; j < i; j++) 292 resource_list_add(&fdi->fdi_rl, SYS_RES_MEMORY, j, 293 reg[j].sbr_offset, reg[j].sbr_offset + 294 reg[j].sbr_size, reg[j].sbr_size); 295 free(reg, M_OFWPROP); 296 if (central == 1) { 297 i = OF_getprop_alloc(child, "interrupts", 298 sizeof(*intr), (void **)&intr); 299 if (i != -1) { 300 for (j = 0; j < i; j++) { 301 iv = INTMAP_VEC(sc->sc_ign, intr[j]); 302 resource_list_add(&fdi->fdi_rl, 303 SYS_RES_IRQ, j, iv, iv, 1); 304 } 305 free(intr, M_OFWPROP); 306 } 307 } 308 cdev = device_add_child(dev, NULL, -1); 309 if (cdev == NULL) { 310 device_printf(dev, "<%s>: device_add_child failed\n", 311 fdi->fdi_obdinfo.obd_name); 312 resource_list_free(&fdi->fdi_rl); 313 ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo); 314 free(fdi, M_DEVBUF); 315 continue; 316 } 317 device_set_ivars(cdev, fdi); 318 } 319 320 return (bus_generic_attach(dev)); 321 322 fail_memres: 323 for (i = 0; i < FHC_NREG; i++) 324 if (sc->sc_memres[i] != NULL) 325 bus_release_resource(dev, SYS_RES_MEMORY, 326 rman_get_rid(sc->sc_memres[i]), sc->sc_memres[i]); 327 return (error); 328} 329 330static int 331fhc_print_child(device_t dev, device_t child) 332{ 333 int rv; 334 335 rv = bus_print_child_header(dev, child); 336 rv += fhc_print_res(device_get_ivars(child)); 337 rv += bus_print_child_footer(dev, child); 338 return (rv); 339} 340 341static void 342fhc_probe_nomatch(device_t dev, device_t child) 343{ 344 const char *type; 345 346 device_printf(dev, "<%s>", ofw_bus_get_name(child)); 347 fhc_print_res(device_get_ivars(child)); 348 type = ofw_bus_get_type(child); 349 printf(" type %s (no driver attached)\n", 350 type != NULL ? type : "unknown"); 351} 352 353static void 354fhc_intr_enable(void *arg) 355{ 356 struct intr_vector *iv = arg; 357 struct fhc_icarg *fica = iv->iv_icarg; 358 359 bus_write_4(fica->fica_memres, FHC_IMAP, 360 INTMAP_ENABLE(iv->iv_vec, iv->iv_mid)); 361 (void)bus_read_4(fica->fica_memres, FHC_IMAP); 362} 363 364static void 365fhc_intr_disable(void *arg) 366{ 367 struct intr_vector *iv = arg; 368 struct fhc_icarg *fica = iv->iv_icarg; 369 370 bus_write_4(fica->fica_memres, FHC_IMAP, iv->iv_vec); 371 (void)bus_read_4(fica->fica_memres, FHC_IMAP); 372} 373 374static void 375fhc_intr_assign(void *arg) 376{ 377 struct intr_vector *iv = arg; 378 struct fhc_icarg *fica = iv->iv_icarg; 379 380 bus_write_4(fica->fica_memres, FHC_IMAP, INTMAP_TID( 381 bus_read_4(fica->fica_memres, FHC_IMAP), iv->iv_mid)); 382 (void)bus_read_4(fica->fica_memres, FHC_IMAP); 383} 384 385static void 386fhc_intr_clear(void *arg) 387{ 388 struct intr_vector *iv = arg; 389 struct fhc_icarg *fica = iv->iv_icarg; 390 391 bus_write_4(fica->fica_memres, FHC_ICLR, 0x0); 392 (void)bus_read_4(fica->fica_memres, FHC_ICLR); 393} 394 395static int 396fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags, 397 driver_filter_t *filt, driver_intr_t *func, void *arg, void **cookiep) 398{ 399 struct fhc_softc *sc; 400 u_long vec; 401 402 sc = device_get_softc(bus); 403 /* 404 * Make sure the vector is fully specified and we registered 405 * our interrupt controller for it. 406 */ 407 vec = rman_get_start(r); 408 if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &fhc_ic) { 409 device_printf(bus, "invalid interrupt vector 0x%lx\n", vec); 410 return (EINVAL); 411 } 412 return (bus_generic_setup_intr(bus, child, r, flags, filt, func, 413 arg, cookiep)); 414} 415 416static struct resource * 417fhc_alloc_resource(device_t bus, device_t child, int type, int *rid, 418 u_long start, u_long end, u_long count, u_int flags) 419{ 420 struct resource_list *rl; 421 struct resource_list_entry *rle; 422 struct fhc_softc *sc; 423 struct resource *res; 424 bus_addr_t coffset; 425 bus_addr_t cend; 426 bus_addr_t phys; 427 int isdefault; 428 int passthrough; 429 int i; 430 431 isdefault = (start == 0UL && end == ~0UL); 432 passthrough = (device_get_parent(child) != bus); 433 res = NULL; 434 rle = NULL; 435 rl = BUS_GET_RESOURCE_LIST(bus, child); 436 sc = device_get_softc(bus); 437 switch (type) { 438 case SYS_RES_IRQ: 439 return (resource_list_alloc(rl, bus, child, type, rid, start, 440 end, count, flags)); 441 case SYS_RES_MEMORY: 442 if (!passthrough) { 443 rle = resource_list_find(rl, type, *rid); 444 if (rle == NULL) 445 return (NULL); 446 if (rle->res != NULL) 447 panic("%s: resource entry is busy", __func__); 448 if (isdefault) { 449 start = rle->start; 450 count = ulmax(count, rle->count); 451 end = ulmax(rle->end, start + count - 1); 452 } 453 } 454 for (i = 0; i < sc->sc_nrange; i++) { 455 coffset = sc->sc_ranges[i].coffset; 456 cend = coffset + sc->sc_ranges[i].size - 1; 457 if (start >= coffset && end <= cend) { 458 start -= coffset; 459 end -= coffset; 460 phys = sc->sc_ranges[i].poffset | 461 ((bus_addr_t)sc->sc_ranges[i].pspace << 32); 462 res = bus_generic_alloc_resource(bus, child, 463 type, rid, phys + start, phys + end, 464 count, flags); 465 if (!passthrough) 466 rle->res = res; 467 break; 468 } 469 } 470 break; 471 } 472 return (res); 473} 474 475static struct resource_list * 476fhc_get_resource_list(device_t bus, device_t child) 477{ 478 struct fhc_devinfo *fdi; 479 480 fdi = device_get_ivars(child); 481 return (&fdi->fdi_rl); 482} 483 484static const struct ofw_bus_devinfo * 485fhc_get_devinfo(device_t bus, device_t child) 486{ 487 struct fhc_devinfo *fdi; 488 489 fdi = device_get_ivars(child); 490 return (&fdi->fdi_obdinfo); 491} 492 493static void 494fhc_led_func(void *arg, int onoff) 495{ 496 struct fhc_softc *sc; 497 uint32_t ctrl; 498 499 sc = (struct fhc_softc *)arg; 500 501 ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL); 502 if (onoff) 503 ctrl |= FHC_CTRL_RLED; 504 else 505 ctrl &= ~FHC_CTRL_RLED; 506 ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE); 507 bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl); 508 (void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL); 509} 510 511static int 512fhc_print_res(struct fhc_devinfo *fdi) 513{ 514 int rv; 515 516 rv = 0; 517 rv += resource_list_print_type(&fdi->fdi_rl, "mem", SYS_RES_MEMORY, 518 "%#lx"); 519 rv += resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld"); 520 return (rv); 521} 522