hid.h revision 191375
117680Spst/*- 239300Sfenner * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 317680Spst * 417680Spst * Redistribution and use in source and binary forms, with or without 517680Spst * modification, are permitted provided that the following conditions 617680Spst * are met: 717680Spst * 1. Redistributions of source code must retain the above copyright 817680Spst * notice, this list of conditions and the following disclaimer. 917680Spst * 2. Redistributions in binary form must reproduce the above copyright 1017680Spst * notice, this list of conditions and the following disclaimer in the 1117680Spst * documentation and/or other materials provided with the distribution. 1217680Spst * 3. The name of the author may not be used to endorse or promote products 1317680Spst * derived from this software without specific prior written permission. 1417680Spst * 1517680Spst * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1617680Spst * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1717680Spst * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1817680Spst * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1917680Spst * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2017680Spst * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2117680Spst * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2217680Spst * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2317680Spst * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2417680Spst * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2517680Spst * 2617680Spst * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $ 2726183Sfenner * $FreeBSD: head/sys/powerpc/include/hid.h 191375 2009-04-22 13:11:38Z raj $ 2817680Spst */ 2917680Spst 3017680Spst#ifndef _POWERPC_HID_H_ 3117680Spst#define _POWERPC_HID_H_ 3239300Sfenner 3317680Spst/* Hardware Implementation Dependent registers for the PowerPC */ 3418976Sdfr 35#define HID0_EMCP 0x80000000 /* Enable machine check pin */ 36#define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */ 37#define HID0_EBA 0x20000000 /* Enable 60x bus address parity checking */ 38#define HID0_EBD 0x10000000 /* Enable 60x bus data parity checking */ 39#define HID0_BCLK 0x08000000 /* CLK_OUT clock type selection */ 40#define HID0_EICE 0x04000000 /* Enable ICE output */ 41#define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */ 42#define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */ 43#define HID0_STEN 0x01000000 /* Software table search enable (7450) */ 44#define HID0_HBATEN 0x00800000 /* High BAT enable (74[45][578]) */ 45#define HID0_DOZE 0x00800000 /* Enable doze mode */ 46#define HID0_NAP 0x00400000 /* Enable nap mode */ 47#define HID0_SLEEP 0x00200000 /* Enable sleep mode */ 48#define HID0_DPM 0x00100000 /* Enable Dynamic power management */ 49#define HID0_RISEG 0x00080000 /* Read I-SEG */ 50#define HID0_TG 0x00040000 /* Timebase Granularity (OEA64) */ 51#define HID0_BHTCLR 0x00040000 /* Clear branch history table (7450) */ 52#define HID0_EIEC 0x00040000 /* Enable internal error checking */ 53#define HID0_XAEN 0x00020000 /* Enable eXtended Addressing (7450) */ 54#define HID0_NHR 0x00010000 /* Not hard reset */ 55#define HID0_ICE 0x00008000 /* Enable i-cache */ 56#define HID0_DCE 0x00004000 /* Enable d-cache */ 57#define HID0_ILOCK 0x00002000 /* i-cache lock */ 58#define HID0_DLOCK 0x00001000 /* d-cache lock */ 59#define HID0_ICFI 0x00000800 /* i-cache flush invalidate */ 60#define HID0_DCFI 0x00000400 /* d-cache flush invalidate */ 61#define HID0_SPD 0x00000200 /* Disable speculative cache access */ 62#define HID0_XBSEN 0x00000100 /* Extended BAT block-size enable (7457) */ 63#define HID0_IFEM 0x00000100 /* Enable M-bit for I-fetch */ 64#define HID0_XBSEN 0x00000100 /* Extended BAT block size enable (7455+)*/ 65#define HID0_SGE 0x00000080 /* Enable store gathering */ 66#define HID0_DCFA 0x00000040 /* Data cache flush assist */ 67#define HID0_BTIC 0x00000020 /* Enable BTIC */ 68#define HID0_LRSTK 0x00000010 /* Link register stack enable (7450) */ 69#define HID0_ABE 0x00000008 /* Enable address broadcast */ 70#define HID0_FOLD 0x00000008 /* Branch folding enable (7450) */ 71#define HID0_BHT 0x00000004 /* Enable branch history table */ 72#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ 73 74#define HID0_AIM_TBEN 0x04000000 /* Time base enable (7450) */ 75 76#define HID0_E500_TBEN 0x00004000 /* Time Base and decr. enable */ 77#define HID0_E500_SEL_TBCLK 0x00002000 /* Select Time Base clock */ 78#define HID0_E500_MAS7UPDEN 0x00000080 /* Enable MAS7 update (e500v2) */ 79 80#define HID0_BITMASK \ 81 "\20" \ 82 "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ 83 "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ 84 "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ 85 "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" 86 87#define HID0_7450_BITMASK \ 88 "\20" \ 89 "\040EMCP\037b1\036b2\035b3\034b4\033TBEN\032b6\031STEN" \ 90 "\030HBATEN\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR" \ 91 "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011XBSEN" \ 92 "\010SGE\007b25\006BTIC\005LRSTK\004FOLD\003BHT\002NOPDST\001NOPTI" 93 94#define HID0_E500_BITMASK \ 95 "\20" \ 96 "\040EMCP\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \ 97 "\030DOZE\027NAP\026SLEEP\025b11\024b12\023b13\022b14\021b15" \ 98 "\020b16\017TBEN\016SEL_TBCLK\015b19\014b20\013b21\012b22\011b23" \ 99 "\010EN_MAS7_UPDATE\007DCFA\006b26\005b27\004b28\003b29\002b30\001NOPTI" 100 101/* 102 * HID0 bit definitions per cpu model 103 * 104 * bit 603 604 750 7400 7410 7450 7457 e500 105 * 0 EMCP EMCP EMCP EMCP EMCP - - EMCP 106 * 1 - ECP DBP - - - - - 107 * 2 EBA EBA EBA EBA EDA - - - 108 * 3 EBD EBD EBD EBD EBD - - - 109 * 4 SBCLK - BCLK BCKL BCLK - - - 110 * 5 EICE - - - - TBEN TBEN - 111 * 6 ECLK - ECLK ECLK ECLK - - - 112 * 7 PAR PAR PAR PAR PAR STEN STEN - 113 * 8 DOZE - DOZE DOZE DOZE - HBATEN DOZE 114 * 9 NAP - NAP NAP NAP NAP NAP NAP 115 * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP SLEEP SLEEP 116 * 11 DPM - DPM DPM DPM DPM DPM - 117 * 12 RISEG - - RISEG - - - - 118 * 13 - - - EIEC EIEC BHTCLR BHTCLR - 119 * 14 - - - - - XAEN XAEN - 120 * 15 - NHR NHR NHR NHR NHR NHR - 121 * 16 ICE ICE ICE ICE ICE ICE ICE - 122 * 17 DCE DCE DCE DCE DCE DCE DCE TBEN 123 * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK SEL_TBCLK 124 * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK - 125 * 20 ICFI ICFI ICFI ICFI ICFI ICFI ICFI - 126 * 21 DCFI DCFI DCFI DCFI DCFI DCFI DCFI - 127 * 22 - - SPD SPD SPG SPD SPD - 128 * 23 - - IFEM IFTT IFTT - XBSEN - 129 * 24 - SIE SGE SGE SGE SGE SGE EN_MAS7_UPDATE 130 * 25 - - DCFA DCFA DCFA - - DCFA 131 * 26 - - BTIC BTIC BTIC BTIC BTIC - 132 * 27 FBIOB - - - - LRSTK LRSTK - 133 * 28 - - ABE - - FOLD FOLD - 134 * 29 - BHT BHT BHT BHT BHT BHT - 135 * 30 - - - NOPDST NOPDST NOPDST NOPDST - 136 * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI NOPTI 137 * 138 * 604: ECP = Enable cache parity checking 139 * 604: SIE = Serial instruction execution disable 140 * 7450: TBEN = Time Base Enable 141 * 7450: STEN = Software table lookup enable 142 * 7450: BHTCLR = Branch history clear 143 * 7450: XAEN = Extended Addressing Enabled 144 * 7450: LRSTK = Link Register Stack Enable 145 * 7450: FOLD = Branch folding enable 146 * 7457: HBATEN = High BAT Enable 147 * 7457: XBSEN = Extended BAT Block Size Enable 148 */ 149 150#define HID1_E500_ABE 0x00001000 /* Address broadcast enable */ 151#define HID1_E500_ASTME 0x00002000 /* Address bus streaming mode enable */ 152#define HID1_E500_RFXE 0x00020000 /* Read fault exception enable */ 153 154#define HID0_E500_DEFAULT_SET (HID0_EMCP | HID0_E500_TBEN) 155#define HID1_E500_DEFAULT_SET (HID1_E500_ABE | HID1_E500_ASTME) 156 157#define HID5_970_DCBZ_SIZE_HI 0x01000000 /* dcbz does a 32-byte store */ 158 159#endif /* _POWERPC_HID_H_ */ 160