uart_bus_sbusart.c revision 178173
1213496Scognet/*- 2213496Scognet * Copyright (c) 2007 Bruce M. Simpson. 3213496Scognet * All rights reserved. 4213496Scognet * 5213496Scognet * Redistribution and use in source and binary forms, with or without 6213496Scognet * modification, are permitted provided that the following conditions 7213496Scognet * are met: 8213496Scognet * 1. Redistributions of source code must retain the above copyright 9213496Scognet * notice, this list of conditions and the following disclaimer. 10237881Simp * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * $Id$ 25 */ 26/* 27 * Skeleton of this file was based on respective code for ARM 28 * code written by Olivier Houchard. 29 */ 30 31/* 32 * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is 33 * experimental and was written for MIPS32 port. 34 */ 35#include "opt_uart.h" 36 37#include <sys/cdefs.h> 38__FBSDID("$FreeBSD: head/sys/mips/mips32/sentry5/uart_bus_sbusart.c 178173 2008-04-13 07:44:55Z imp $"); 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/bus.h> 43#include <sys/conf.h> 44#include <sys/kernel.h> 45#include <sys/module.h> 46#include <machine/bus.h> 47#include <sys/rman.h> 48#include <machine/resource.h> 49 50#include <dev/pci/pcivar.h> 51 52#include <dev/uart/uart.h> 53#include <dev/uart/uart_bus.h> 54#include <dev/uart/uart_cpu.h> 55 56#include <mips/mips32/sentry5/sentry5reg.h> 57 58#include "uart_if.h" 59 60static int uart_malta_probe(device_t dev); 61 62extern struct uart_class malta_uart_class; 63 64static device_method_t uart_malta_methods[] = { 65 /* Device interface */ 66 DEVMETHOD(device_probe, uart_malta_probe), 67 DEVMETHOD(device_attach, uart_bus_attach), 68 DEVMETHOD(device_detach, uart_bus_detach), 69 { 0, 0 } 70}; 71 72static driver_t uart_malta_driver = { 73 uart_driver_name, 74 uart_malta_methods, 75 sizeof(struct uart_softc), 76}; 77 78extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; 79static int 80uart_malta_probe(device_t dev) 81{ 82 struct uart_softc *sc; 83 84 sc = device_get_softc(dev); 85 sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs); 86 sc->sc_class = &uart_ns8250_class; 87 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); 88 sc->sc_sysdev->bas.bst = 0; 89 sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR); 90 sc->sc_bas.bst = 0; 91 sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR); 92 return(uart_bus_probe(dev, 0, 0, 0, 0)); 93} 94 95DRIVER_MODULE(uart, obio, uart_malta_driver, uart_devclass, 0, 0); 96