s5_machdep.c revision 216320
1/*- 2 * Copyright (c) 2007 Bruce M. Simpson. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/mips/sentry5/s5_machdep.c 216320 2010-12-09 07:47:40Z gonzo $"); 29 30#include <sys/param.h> 31#include <machine/cpuregs.h> 32 33#include <mips/sentry5/s5reg.h> 34 35#include "opt_ddb.h" 36 37#include <sys/param.h> 38#include <sys/conf.h> 39#include <sys/kernel.h> 40#include <sys/systm.h> 41#include <sys/imgact.h> 42#include <sys/bio.h> 43#include <sys/buf.h> 44#include <sys/bus.h> 45#include <sys/cpu.h> 46#include <sys/cons.h> 47#include <sys/exec.h> 48#include <sys/ucontext.h> 49#include <sys/proc.h> 50#include <sys/kdb.h> 51#include <sys/ptrace.h> 52#include <sys/reboot.h> 53#include <sys/signalvar.h> 54#include <sys/sysent.h> 55#include <sys/sysproto.h> 56#include <sys/user.h> 57 58#include <vm/vm.h> 59#include <vm/vm_object.h> 60#include <vm/vm_page.h> 61#include <vm/vm_pager.h> 62 63#include <machine/cache.h> 64#include <machine/clock.h> 65#include <machine/cpu.h> 66#include <machine/cpuinfo.h> 67#include <machine/cpufunc.h> 68#include <machine/cpuregs.h> 69#include <machine/hwfunc.h> 70#include <machine/intr_machdep.h> 71#include <machine/locore.h> 72#include <machine/md_var.h> 73#include <machine/pte.h> 74#include <machine/sigframe.h> 75#include <machine/trap.h> 76#include <machine/vmparam.h> 77 78#ifdef CFE 79#include <dev/cfe/cfe_api.h> 80#endif 81 82extern int *edata; 83extern int *end; 84 85void 86platform_cpu_init() 87{ 88 /* Nothing special */ 89} 90 91static void 92mips_init(void) 93{ 94 int i, j; 95 96 printf("entry: mips_init()\n"); 97 98#ifdef CFE 99 /* 100 * Query DRAM memory map from CFE. 101 */ 102 physmem = 0; 103 for (i = 0; i < 10; i += 2) { 104 int result; 105 uint64_t addr, len, type; 106 107 result = cfe_enummem(i, 0, &addr, &len, &type); 108 if (result < 0) { 109 phys_avail[i] = phys_avail[i + 1] = 0; 110 break; 111 } 112 if (type != CFE_MI_AVAILABLE) 113 continue; 114 115 phys_avail[i] = addr; 116 if (i == 0 && addr == 0) { 117 /* 118 * If this is the first physical memory segment probed 119 * from CFE, omit the region at the start of physical 120 * memory where the kernel has been loaded. 121 */ 122 phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); 123 } 124 phys_avail[i + 1] = addr + len; 125 physmem += len; 126 } 127 128 realmem = btoc(physmem); 129#endif 130 131 for (j = 0; j < i; j++) 132 dump_avail[j] = phys_avail[j]; 133 134 physmem = realmem; 135 136 init_param1(); 137 init_param2(physmem); 138 mips_cpu_init(); 139 pmap_bootstrap(); 140 mips_proc0_init(); 141 mutex_init(); 142 kdb_init(); 143#ifdef KDB 144 if (boothowto & RB_KDB) 145 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 146#endif 147} 148 149void 150platform_halt(void) 151{ 152 153} 154 155 156void 157platform_identify(void) 158{ 159 160} 161 162void 163platform_reset(void) 164{ 165 166#if defined(CFE) 167 cfe_exit(0, 0); 168#else 169 *((volatile uint8_t *)MIPS_PHYS_TO_KSEG1(SENTRY5_EXTIFADR)) = 0x80; 170#endif 171} 172 173void 174platform_trap_enter(void) 175{ 176 177} 178 179void 180platform_trap_exit(void) 181{ 182 183} 184 185void 186platform_start(__register_t a0, __register_t a1, __register_t a2, 187 __register_t a3) 188{ 189 vm_offset_t kernend; 190 uint64_t platform_counter_freq; 191 192 /* clear the BSS and SBSS segments */ 193 kernend = (vm_offset_t)&end; 194 memset(&edata, 0, kernend - (vm_offset_t)(&edata)); 195 196 mips_postboot_fixup(); 197 198 /* Initialize pcpu stuff */ 199 mips_pcpu0_init(); 200 201#ifdef CFE 202 /* 203 * Initialize CFE firmware trampolines before 204 * we initialize the low-level console. 205 * 206 * CFE passes the following values in registers: 207 * a0: firmware handle 208 * a2: firmware entry point 209 * a3: entry point seal 210 */ 211 if (a3 == CFE_EPTSEAL) 212 cfe_init(a0, a2); 213#endif 214 cninit(); 215 216 mips_init(); 217 218# if 0 219 /* 220 * Probe the Broadcom Sentry5's on-chip PLL clock registers 221 * and discover the CPU pipeline clock and bus clock 222 * multipliers from this. 223 * XXX: Wrong place. You have to ask the ChipCommon 224 * or External Interface cores on the SiBa. 225 */ 226 uint32_t busmult, cpumult, refclock, clkcfg1; 227#define S5_CLKCFG1_REFCLOCK_MASK 0x0000001F 228#define S5_CLKCFG1_BUSMULT_MASK 0x000003E0 229#define S5_CLKCFG1_BUSMULT_SHIFT 5 230#define S5_CLKCFG1_CPUMULT_MASK 0xFFFFFC00 231#define S5_CLKCFG1_CPUMULT_SHIFT 10 232 233 counter_freq = 100000000; /* XXX */ 234 235 clkcfg1 = s5_rd_clkcfg1(); 236 printf("clkcfg1 = 0x%08x\n", clkcfg1); 237 238 refclock = clkcfg1 & 0x1F; 239 busmult = ((clkcfg1 & 0x000003E0) >> 5) + 1; 240 cpumult = ((clkcfg1 & 0xFFFFFC00) >> 10) + 1; 241 242 printf("refclock = %u\n", refclock); 243 printf("busmult = %u\n", busmult); 244 printf("cpumult = %u\n", cpumult); 245 246 counter_freq = cpumult * refclock; 247# else 248 platform_counter_freq = 200 * 1000 * 1000; /* Sentry5 is 200MHz */ 249# endif 250 251 mips_timer_init_params(platform_counter_freq, 0); 252} 253