1220297Sadrian/*- 2220297Sadrian * Copyright (c) 2010 Aleksandr Rybalko. 3220297Sadrian * All rights reserved. 4220297Sadrian * 5220297Sadrian * Redistribution and use in source and binary forms, with or 6220297Sadrian * without modification, are permitted provided that the following 7220297Sadrian * conditions are met: 8220297Sadrian * 1. Redistributions of source code must retain the above copyright 9220297Sadrian * notice, this list of conditions and the following disclaimer. 10220297Sadrian * 2. Redistributions in binary form must reproduce the above 11220297Sadrian * copyright notice, this list of conditions and the following 12220297Sadrian * disclaimer in the documentation and/or other materials provided 13220297Sadrian * with the distribution. 14220297Sadrian * 3. The names of the authors may not be used to endorse or promote 15220297Sadrian * products derived from this software without specific prior 16220297Sadrian * written permission. 17220297Sadrian * 18220297Sadrian * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY 19220297Sadrian * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 20220297Sadrian * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 21220297Sadrian * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS 22220297Sadrian * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 23220297Sadrian * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 24220297Sadrian * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 25220297Sadrian * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26220297Sadrian * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 27220297Sadrian * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 28220297Sadrian * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 29220297Sadrian * OF SUCH DAMAGE. 30220297Sadrian * 31220297Sadrian * $FreeBSD: releng/10.2/sys/mips/rt305x/uart_dev_rt305x.h 220297 2011-04-03 14:39:55Z adrian $ 32220297Sadrian */ 33220297Sadrian#ifndef _RT305XUART_H 34220297Sadrian#define _RT305XUART_H 35220297Sadrian 36220297Sadrian#undef uart_getreg 37220297Sadrian#undef uart_setreg 38220297Sadrian#define uart_getreg(bas, reg) \ 39220297Sadrian bus_space_read_4((bas)->bst, (bas)->bsh, reg) 40220297Sadrian#define uart_setreg(bas, reg, value) \ 41220297Sadrian bus_space_write_4((bas)->bst, (bas)->bsh, reg, value) 42220297Sadrian 43220297Sadrian/* UART registers */ 44220297Sadrian#define UART_RX_REG 0x00 45220297Sadrian#define UART_TX_REG 0x04 46220297Sadrian 47220297Sadrian#define UART_IER_REG 0x08 48220297Sadrian#define UART_IER_EDSSI (1<<3) /* Only full UART */ 49220297Sadrian#define UART_IER_ELSI (1<<2) 50220297Sadrian#define UART_IER_ETBEI (1<<1) 51220297Sadrian#define UART_IER_ERBFI (1<<0) 52220297Sadrian 53220297Sadrian#define UART_IIR_REG 0x0c 54220297Sadrian#define UART_IIR_RXFIFO (1<<7) 55220297Sadrian#define UART_IIR_TXFIFO (1<<6) 56220297Sadrian#define UART_IIR_ID_MST 0 57220297Sadrian#define UART_IIR_ID_THRE 1 58220297Sadrian#define UART_IIR_ID_DR 2 59220297Sadrian#define UART_IIR_ID_LINESTATUS 3 60220297Sadrian#define UART_IIR_ID_DR2 6 61220297Sadrian#define UART_IIR_ID_SHIFT 1 62220297Sadrian#define UART_IIR_ID_MASK 0x0000000e 63220297Sadrian#define UART_IIR_INTP (1<<0) 64220297Sadrian 65220297Sadrian#define UART_FCR_REG 0x10 66220297Sadrian#define UART_FCR_RXTGR_1 (0<<6) 67220297Sadrian#define UART_FCR_RXTGR_4 (1<<6) 68220297Sadrian#define UART_FCR_RXTGR_8 (2<<6) 69220297Sadrian#define UART_FCR_RXTGR_12 (3<<6) 70220297Sadrian#define UART_FCR_TXTGR_1 (0<<4) 71220297Sadrian#define UART_FCR_TXTGR_4 (1<<4) 72220297Sadrian#define UART_FCR_TXTGR_8 (2<<4) 73220297Sadrian#define UART_FCR_TXTGR_12 (3<<4) 74220297Sadrian#define UART_FCR_DMA (1<<3) 75220297Sadrian#define UART_FCR_TXRST (1<<2) 76220297Sadrian#define UART_FCR_RXRST (1<<1) 77220297Sadrian#define UART_FCR_FIFOEN (1<<0) 78220297Sadrian 79220297Sadrian#define UART_LCR_REG 0x14 80220297Sadrian#define UART_LCR_DLAB (1<<7) 81220297Sadrian#define UART_LCR_BRK (1<<6) 82220297Sadrian#define UART_LCR_FPAR (1<<5) 83220297Sadrian#define UART_LCR_EVEN (1<<4) 84220297Sadrian#define UART_LCR_PEN (1<<3) 85220297Sadrian#define UART_LCR_STB_15 (1<<2) 86220297Sadrian#define UART_LCR_5B 0 87220297Sadrian#define UART_LCR_6B 1 88220297Sadrian#define UART_LCR_7B 2 89220297Sadrian#define UART_LCR_8B 3 90220297Sadrian 91220297Sadrian#define UART_MCR_REG 0x18 92220297Sadrian#define UART_MCR_LOOP (1<<4) 93220297Sadrian#define UART_MCR_OUT2_L (1<<3) /* Only full UART */ 94220297Sadrian#define UART_MCR_OUT1_L (1<<2) /* Only full UART */ 95220297Sadrian#define UART_MCR_RTS_L (1<<1) /* Only full UART */ 96220297Sadrian#define UART_MCR_DTR_L (1<<0) /* Only full UART */ 97220297Sadrian 98220297Sadrian#define UART_LSR_REG 0x1c 99220297Sadrian#define UART_LSR_ERINF (1<<7) 100220297Sadrian#define UART_LSR_TEMT (1<<6) 101220297Sadrian#define UART_LSR_THRE (1<<5) 102220297Sadrian#define UART_LSR_BI (1<<4) 103220297Sadrian#define UART_LSR_FE (1<<3) 104220297Sadrian#define UART_LSR_PE (1<<2) 105220297Sadrian#define UART_LSR_OE (1<<1) 106220297Sadrian#define UART_LSR_DR (1<<0) 107220297Sadrian 108220297Sadrian#define UART_MSR_REG 0x20 /* Only full UART */ 109220297Sadrian#define UART_MSR_DCD (1<<7) /* Only full UART */ 110220297Sadrian#define UART_MSR_RI (1<<6) /* Only full UART */ 111220297Sadrian#define UART_MSR_DSR (1<<5) /* Only full UART */ 112220297Sadrian#define UART_MSR_CTS (1<<4) /* Only full UART */ 113220297Sadrian#define UART_MSR_DDCD (1<<3) /* Only full UART */ 114220297Sadrian#define UART_MSR_TERI (1<<2) /* Only full UART */ 115220297Sadrian#define UART_MSR_DDSR (1<<1) /* Only full UART */ 116220297Sadrian#define UART_MSR_DCTS (1<<0) /* Only full UART */ 117220297Sadrian 118220297Sadrian#define UART_CDDL_REG 0x28 119220297Sadrian#define UART_CDDLL_REG 0x2c 120220297Sadrian#define UART_CDDLH_REG 0x30 121220297Sadrian 122220297Sadrian#define UART_IFCTL_REG 0x34 123220297Sadrian#define UART_IFCTL_IFCTL (1<<0) 124220297Sadrian 125220297Sadrianint uart_cnattach(void); 126220297Sadrian#endif /* _RT305XUART_H */ 127