rmilib.h revision 198157 
1/*-
2 * Copyright (c) 2003-2009 RMI Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of RMI Corporation, nor the names of its contributors,
14 *    may be used to endorse or promote products derived from this software
15 *    without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * RMI_BSD */
30
31#ifndef _RMILIB_H_
32#define _RMILIB_H_
33
34#include <dev/rmi/sec/desc.h>
35#include <mips/xlr/iomap.h>
36
37/*#define XLR_SEC_CMD_DEBUG*/
38
39#ifdef XLR_SEC_CMD_DEBUG
40#define DPRINT  printf
41#define XLR_SEC_CMD_DIAG(fmt, args...) { \
42                DPRINT(fmt, ##args); \
43        }
44#define XLR_SEC_CMD_DIAG_SYM_DESC(desc, vec) { \
45                decode_symkey_desc ((desc), (vec)); \
46        }
47#else
48#define DPRINT(fmt, args...)
49#define XLR_SEC_CMD_DIAG(fmt, args...)
50#define XLR_SEC_CMD_DIAG_SYM_DESC(desc, vec)
51#endif
52
53
54
55
56
57
58/*
59#include <mips/include/pmap.h>
60
61#define OS_ALLOC_KERNEL(size) kmalloc((size), GFP_KERNEL)
62#define virt_to_phys(x)  vtophys((vm_offset_t)(x))
63*/
64/*
65 * Cryptographic parameter definitions
66 */
67#define XLR_SEC_DES_KEY_LENGTH        8  /* Bytes */
68#define XLR_SEC_3DES_KEY_LENGTH       24 /* Bytes */
69#define XLR_SEC_AES128_KEY_LENGTH     16 /* Bytes */
70#define XLR_SEC_AES192_KEY_LENGTH     24 /* Bytes */
71#define XLR_SEC_AES256_KEY_LENGTH     32 /* Bytes */
72#define XLR_SEC_AES128F8_KEY_LENGTH   32 /* Bytes */
73#define XLR_SEC_AES192F8_KEY_LENGTH   48 /* Bytes */
74#define XLR_SEC_AES256F8_KEY_LENGTH   64 /* Bytes */
75#define XLR_SEC_KASUMI_F8_KEY_LENGTH  16 /* Bytes */
76#define XLR_SEC_MAX_CRYPT_KEY_LENGTH  XLR_SEC_AES256F8_KEY_LENGTH
77
78
79#define XLR_SEC_DES_IV_LENGTH         8  /* Bytes */
80#define XLR_SEC_AES_IV_LENGTH         16 /* Bytes */
81#define XLR_SEC_ARC4_IV_LENGTH        0  /* Bytes */
82#define XLR_SEC_KASUMI_F8_IV_LENGTH   16 /* Bytes */
83#define XLR_SEC_MAX_IV_LENGTH         16 /* Bytes */
84#define XLR_SEC_IV_LENGTH_BYTES       8  /* Bytes */
85
86#define XLR_SEC_AES_BLOCK_SIZE        16 /* Bytes */
87#define XLR_SEC_DES_BLOCK_SIZE        8  /* Bytes */
88#define XLR_SEC_3DES_BLOCK_SIZE       8  /* Bytes */
89
90#define XLR_SEC_MD5_BLOCK_SIZE        64 /* Bytes */
91#define XLR_SEC_SHA1_BLOCK_SIZE       64 /* Bytes */
92#define XLR_SEC_SHA256_BLOCK_SIZE     64 /* Bytes */
93#define XLR_SEC_SHA384_BLOCK_SIZE     128/* Bytes */
94#define XLR_SEC_SHA512_BLOCK_SIZE     128/* Bytes */
95#define XLR_SEC_GCM_BLOCK_SIZE        16 /* XXX: Bytes */
96#define XLR_SEC_KASUMI_F9_BLOCK_SIZE  16 /* XXX: Bytes */
97#define XLR_SEC_MAX_BLOCK_SIZE        64 /* Max of MD5/SHA */
98#define XLR_SEC_MD5_LENGTH            16 /* Bytes */
99#define XLR_SEC_SHA1_LENGTH           20 /* Bytes */
100#define XLR_SEC_SHA256_LENGTH         32 /* Bytes */
101#define XLR_SEC_SHA384_LENGTH         64 /* Bytes */
102#define XLR_SEC_SHA512_LENGTH         64 /* Bytes */
103#define XLR_SEC_GCM_LENGTH            16 /* Bytes */
104#define XLR_SEC_KASUMI_F9_LENGTH      16 /* Bytes */
105#define XLR_SEC_KASUMI_F9_RESULT_LENGTH 4 /* Bytes */
106#define XLR_SEC_HMAC_LENGTH           64 /* Max of MD5/SHA/SHA256 */
107#define XLR_SEC_MAX_AUTH_KEY_LENGTH   XLR_SEC_SHA512_BLOCK_SIZE
108#define XLR_SEC_MAX_RC4_STATE_SIZE    264 /* char s[256], int i, int j */
109
110/* Status code is used by the SRL to indicate status */
111typedef unsigned int xlr_sec_status_t;
112
113/*
114 * Status codes
115 */
116#define XLR_SEC_STATUS_SUCCESS              0
117#define XLR_SEC_STATUS_NO_DEVICE           -1
118#define XLR_SEC_STATUS_TIMEOUT             -2
119#define XLR_SEC_STATUS_INVALID_PARAMETER   -3
120#define XLR_SEC_STATUS_DEVICE_FAILED       -4
121#define XLR_SEC_STATUS_DEVICE_BUSY         -5
122#define XLR_SEC_STATUS_NO_RESOURCE         -6
123#define XLR_SEC_STATUS_CANCELLED           -7
124
125/*
126 * Flags
127 */
128#define XLR_SEC_FLAGS_HIGH_PRIORITY         1
129
130/* Error code is used to indicate any errors */
131typedef int xlr_sec_error_t;
132
133/*
134 */
135#define XLR_SEC_ERR_NONE                    0
136#define XLR_SEC_ERR_CIPHER_OP              -1
137#define XLR_SEC_ERR_CIPHER_TYPE            -2
138#define XLR_SEC_ERR_CIPHER_MODE            -3
139#define XLR_SEC_ERR_CIPHER_INIT            -4
140#define XLR_SEC_ERR_DIGEST_TYPE            -5
141#define XLR_SEC_ERR_DIGEST_INIT            -6
142#define XLR_SEC_ERR_DIGEST_SRC             -7
143#define XLR_SEC_ERR_CKSUM_TYPE             -8
144#define XLR_SEC_ERR_CKSUM_SRC              -9
145#define XLR_SEC_ERR_ALLOC                  -10
146#define XLR_SEC_ERR_CONTROL_VECTOR         -11
147#define XLR_SEC_ERR_LOADHMACKEY_MODE       -12
148#define XLR_SEC_ERR_PADHASH_MODE           -13
149#define XLR_SEC_ERR_HASHBYTES_MODE         -14
150#define XLR_SEC_ERR_NEXT_MODE              -15
151#define XLR_SEC_ERR_PKT_IV_MODE            -16
152#define XLR_SEC_ERR_LASTWORD_MODE          -17
153#define XLR_SEC_ERR_PUBKEY_OP              -18
154#define XLR_SEC_ERR_SYMKEY_MSGSND          -19
155#define XLR_SEC_ERR_PUBKEY_MSGSND          -20
156#define XLR_SEC_ERR_SYMKEY_GETSEM          -21
157#define XLR_SEC_ERR_PUBKEY_GETSEM          -22
158
159/*
160 * Descriptor Vector quantities
161 *  (helps to identify descriptor type per operation)
162 */
163#define XLR_SEC_VECTOR_CIPHER_DES             0x0001
164#define XLR_SEC_VECTOR_CIPHER_3DES            0x0002
165#define XLR_SEC_VECTOR_CIPHER_AES128          0x0004
166#define XLR_SEC_VECTOR_CIPHER_AES192          0x0008
167#define XLR_SEC_VECTOR_CIPHER_AES256          0x0010
168#define XLR_SEC_VECTOR_CIPHER_ARC4            0x0020
169#define XLR_SEC_VECTOR_CIPHER_AES             (XLR_SEC_VECTOR_CIPHER_AES128 | \
170                                           XLR_SEC_VECTOR_CIPHER_AES192 | \
171                                           XLR_SEC_VECTOR_CIPHER_AES256)
172#define XLR_SEC_VECTOR_CIPHER                 (XLR_SEC_VECTOR_CIPHER_DES | \
173                                           XLR_SEC_VECTOR_CIPHER_3DES | \
174                                           XLR_SEC_VECTOR_CIPHER_AES128 | \
175                                           XLR_SEC_VECTOR_CIPHER_AES192 | \
176                                           XLR_SEC_VECTOR_CIPHER_AES256 | \
177                                           XLR_SEC_VECTOR_CIPHER_ARC4)
178
179#define XLR_SEC_VECTOR_HMAC                   0x0040
180#define XLR_SEC_VECTOR_MAC                    0x0080
181#define XLR_SEC_VECTOR_MODE_CTR_CFB           0x0100
182#define XLR_SEC_VECTOR_MODE_ECB_CBC_OFB       0x0200
183#define XLR_SEC_VECTOR_MODE_ECB_CBC           0x0400
184#define XLR_SEC_VECTOR_STATE                  0x0800
185#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8       0x01000
186#define XLR_SEC_VECTOR_HMAC2                  0x02000
187#define XLR_SEC_VECTOR_GCM                    0x04000
188#define XLR_SEC_VECTOR_F9                     0x08000
189#define XLR_SEC_VECTOR_MODE_F8                0x10000
190
191#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC  \
192(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC)
193#define XLR_SEC_VECTOR_CIPHER_ARC4__STATE  \
194(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_STATE)
195#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE  \
196(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_STATE)
197
198#define XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC \
199(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC)
200
201#define XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC \
202(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_MODE_ECB_CBC)
203
204#define XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC \
205(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC)
206
207#define XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC \
208(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_MODE_ECB_CBC)
209
210#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB \
211(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
212
213#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB \
214(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_CTR_CFB)
215
216#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB \
217(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
218
219#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB \
220(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
221
222#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB \
223(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
224
225#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB \
226(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_CTR_CFB)
227
228#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB \
229(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
230
231#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB \
232(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
233
234#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB \
235(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
236
237#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB \
238(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_CTR_CFB)
239
240#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB \
241(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
242
243#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB \
244(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
245
246#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8 \
247(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
248
249#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8 \
250(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_F8)
251
252#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8 \
253(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
254
255#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8 \
256(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_F8)
257
258#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8 \
259(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
260
261#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8 \
262(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_F8)
263
264#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9  \
265(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_F9)
266
267#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC  \
268(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_HMAC)
269
270#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2  \
271(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_HMAC2)
272
273#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM  \
274(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_GCM)
275
276#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2  \
277(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC2)
278
279#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE  \
280(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_STATE)
281
282#define XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC \
283(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC)
284
285#define XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC \
286(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC)
287
288#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB \
289(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
290
291#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB \
292(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
293
294#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB \
295(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
296
297#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB \
298(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
299
300#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB \
301(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
302
303#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB \
304(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
305
306#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8 \
307(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
308
309#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8 \
310(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
311
312#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8 \
313(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
314
315#define XLR_SEC_VECTOR_CIPHER_ARC4__GCM  \
316(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_GCM)
317
318#define XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE  \
319(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_STATE)
320
321#define XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC \
322(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC)
323
324#define XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC \
325(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC)
326
327#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB \
328(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
329
330#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB \
331(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
332
333#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB \
334(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
335
336#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB \
337(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
338
339#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB \
340(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
341
342#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB \
343(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
344
345#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8 \
346(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
347
348#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8 \
349(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
350
351#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8 \
352(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
353
354#define XLR_SEC_VECTOR_CIPHER_ARC4__F9  \
355(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_F9)
356
357#define XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE  \
358(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_STATE)
359
360#define XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC \
361(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC)
362
363#define XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC \
364(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC)
365
366#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB \
367(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
368
369#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB \
370(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
371
372#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB \
373(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
374
375#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB \
376(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
377
378#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB \
379(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
380
381#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB \
382(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
383
384#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8 \
385(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
386
387#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8 \
388(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
389
390#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8 \
391(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
392
393/*
394 * Cipher Modes
395 */
396typedef enum {
397  XLR_SEC_CIPHER_MODE_NONE = 0,
398    XLR_SEC_CIPHER_MODE_PASS = 1,
399    XLR_SEC_CIPHER_MODE_ECB,
400    XLR_SEC_CIPHER_MODE_CBC,
401    XLR_SEC_CIPHER_MODE_OFB,
402    XLR_SEC_CIPHER_MODE_CTR,
403    XLR_SEC_CIPHER_MODE_CFB,
404    XLR_SEC_CIPHER_MODE_F8
405} XLR_SEC_CIPHER_MODE;
406
407typedef enum {
408  XLR_SEC_CIPHER_OP_NONE = 0,
409    XLR_SEC_CIPHER_OP_ENCRYPT = 1,
410    XLR_SEC_CIPHER_OP_DECRYPT
411} XLR_SEC_CIPHER_OP;
412
413typedef enum {
414    XLR_SEC_CIPHER_TYPE_UNSUPPORTED = -1,
415    XLR_SEC_CIPHER_TYPE_NONE = 0,
416    XLR_SEC_CIPHER_TYPE_DES,
417    XLR_SEC_CIPHER_TYPE_3DES,
418    XLR_SEC_CIPHER_TYPE_AES128,
419    XLR_SEC_CIPHER_TYPE_AES192,
420    XLR_SEC_CIPHER_TYPE_AES256,
421    XLR_SEC_CIPHER_TYPE_ARC4,
422    XLR_SEC_CIPHER_TYPE_KASUMI_F8
423} XLR_SEC_CIPHER_TYPE;
424
425typedef enum {
426    XLR_SEC_CIPHER_INIT_OK = 1,   /* Preserve old Keys */
427    XLR_SEC_CIPHER_INIT_NK        /*Load new Keys */
428} XLR_SEC_CIPHER_INIT;
429
430
431/*
432 *  Hash Modes
433 */
434typedef enum {
435    XLR_SEC_DIGEST_TYPE_UNSUPPORTED = -1,
436    XLR_SEC_DIGEST_TYPE_NONE = 0,
437    XLR_SEC_DIGEST_TYPE_MD5,
438    XLR_SEC_DIGEST_TYPE_SHA1,
439    XLR_SEC_DIGEST_TYPE_SHA256,
440    XLR_SEC_DIGEST_TYPE_SHA384,
441    XLR_SEC_DIGEST_TYPE_SHA512,
442    XLR_SEC_DIGEST_TYPE_GCM,
443    XLR_SEC_DIGEST_TYPE_KASUMI_F9,
444    XLR_SEC_DIGEST_TYPE_HMAC_MD5,
445    XLR_SEC_DIGEST_TYPE_HMAC_SHA1,
446    XLR_SEC_DIGEST_TYPE_HMAC_SHA256,
447    XLR_SEC_DIGEST_TYPE_HMAC_SHA384,
448    XLR_SEC_DIGEST_TYPE_HMAC_SHA512,
449    XLR_SEC_DIGEST_TYPE_HMAC_AES_CBC,
450    XLR_SEC_DIGEST_TYPE_HMAC_AES_XCBC
451} XLR_SEC_DIGEST_TYPE;
452
453typedef enum {
454    XLR_SEC_DIGEST_INIT_OLDKEY = 1, /* Preserve old key HMAC key stored in ID registers (moot if HASH.HMAC == 0) */
455    XLR_SEC_DIGEST_INIT_NEWKEY      /*Load new HMAC key from memory ctrl section to ID registers */
456} XLR_SEC_DIGEST_INIT;
457
458typedef enum {
459    XLR_SEC_DIGEST_SRC_DMA = 1, /* DMA channel */
460    XLR_SEC_DIGEST_SRC_CPHR     /*Cipher if word count exceeded Cipher_Offset; else DMA */
461} XLR_SEC_DIGEST_SRC;
462
463/*
464 *  Checksum Modes
465 */
466typedef enum {
467    XLR_SEC_CKSUM_TYPE_NOP = 1,
468    XLR_SEC_CKSUM_TYPE_IP
469} XLR_SEC_CKSUM_TYPE;
470
471typedef enum {
472    XLR_SEC_CKSUM_SRC_DMA    = 1,
473    XLR_SEC_CKSUM_SRC_CIPHER
474} XLR_SEC_CKSUM_SRC;
475
476/*
477 *  Packet Modes
478 */
479typedef enum {
480    XLR_SEC_LOADHMACKEY_MODE_OLD = 1,
481    XLR_SEC_LOADHMACKEY_MODE_LOAD
482} XLR_SEC_LOADHMACKEY_MODE;
483
484typedef enum {
485    XLR_SEC_PADHASH_PADDED = 1,
486    XLR_SEC_PADHASH_PAD
487} XLR_SEC_PADHASH_MODE;
488
489typedef enum {
490    XLR_SEC_HASHBYTES_ALL8 = 1,
491    XLR_SEC_HASHBYTES_MSB,
492    XLR_SEC_HASHBYTES_MSW
493} XLR_SEC_HASHBYTES_MODE;
494
495typedef enum {
496    XLR_SEC_NEXT_FINISH = 1,
497    XLR_SEC_NEXT_DO
498} XLR_SEC_NEXT_MODE;
499
500typedef enum {
501    XLR_SEC_PKT_IV_OLD = 1,
502    XLR_SEC_PKT_IV_NEW
503} XLR_SEC_PKT_IV_MODE;
504
505typedef enum {
506    XLR_SEC_LASTWORD_128 = 1,
507    XLR_SEC_LASTWORD_96MASK,
508    XLR_SEC_LASTWORD_64MASK,
509    XLR_SEC_LASTWORD_32MASK
510} XLR_SEC_LASTWORD_MODE;
511
512typedef enum {
513    XLR_SEC_CFB_MASK_REGULAR_CTR = 0,
514    XLR_SEC_CFB_MASK_CCMP,
515    XLR_SEC_CFB_MASK_GCM_WITH_SCI,
516    XLR_SEC_CFB_MASK_GCM_WITHOUT_SCI
517} XLR_SEC_CFB_MASK_MODE;
518
519/*
520 *  Public Key
521 */
522typedef enum {
523    RMIPK_BLKWIDTH_512 = 1,
524    RMIPK_BLKWIDTH_1024
525} RMIPK_BLKWIDTH_MODE;
526
527typedef enum {
528    RMIPK_LDCONST_OLD = 1,
529    RMIPK_LDCONST_NEW
530} RMIPK_LDCONST_MODE;
531
532
533typedef struct xlr_sec_io_s {
534    unsigned int          command;
535    unsigned int          result_status;
536    unsigned int          flags;
537    unsigned int          session_num;
538    unsigned int          use_callback;
539    unsigned int         time_us;
540    unsigned int         user_context[2];/*usable for anything by caller*/
541    unsigned int         command_context; /* Context (ID) of this command). */
542    unsigned char         initial_vector[XLR_SEC_MAX_IV_LENGTH];
543    unsigned char         crypt_key[XLR_SEC_MAX_CRYPT_KEY_LENGTH];
544    unsigned char         mac_key[XLR_SEC_MAX_AUTH_KEY_LENGTH];
545
546    XLR_SEC_CIPHER_OP         cipher_op;
547    XLR_SEC_CIPHER_MODE       cipher_mode;
548    XLR_SEC_CIPHER_TYPE       cipher_type;
549    XLR_SEC_CIPHER_INIT       cipher_init;
550    unsigned int          cipher_offset;
551
552    XLR_SEC_DIGEST_TYPE       digest_type;
553    XLR_SEC_DIGEST_INIT       digest_init;
554    XLR_SEC_DIGEST_SRC        digest_src;
555    unsigned int          digest_offset;
556
557    XLR_SEC_CKSUM_TYPE        cksum_type;
558    XLR_SEC_CKSUM_SRC         cksum_src;
559    unsigned int          cksum_offset;
560
561    XLR_SEC_LOADHMACKEY_MODE  pkt_hmac;
562    XLR_SEC_PADHASH_MODE      pkt_hash;
563    XLR_SEC_HASHBYTES_MODE    pkt_hashbytes;
564    XLR_SEC_NEXT_MODE         pkt_next;
565    XLR_SEC_PKT_IV_MODE       pkt_iv;
566    XLR_SEC_LASTWORD_MODE     pkt_lastword;
567
568    unsigned int         nonce;
569    unsigned int          cfb_mask;
570
571    unsigned int          iv_offset;
572    unsigned short        pad_type;
573    unsigned short        rc4_key_len;
574
575    unsigned int          num_packets;
576    unsigned int          num_fragments;
577
578    uint64_t        source_buf;
579    unsigned int        source_buf_size;
580    uint64_t        dest_buf;
581    unsigned int          dest_buf_size;
582
583    uint64_t        auth_dest;
584    uint64_t        cksum_dest;
585
586    unsigned short        rc4_loadstate;
587    unsigned short        rc4_savestate;
588    uint64_t              rc4_state;
589
590} xlr_sec_io_t, *xlr_sec_io_pt;
591
592
593#define XLR_SEC_SESSION(sid)   ((sid) & 0x000007ff)
594#define XLR_SEC_SID(crd,ses)   (((crd) << 28) | ((ses) & 0x7ff))
595
596/*
597 *  Length values for cryptography
598 */
599/*
600#define XLR_SEC_DES_KEY_LENGTH     8
601#define XLR_SEC_3DES_KEY_LENGTH        24
602#define XLR_SEC_MAX_CRYPT_KEY_LENGTH   XLR_SEC_3DES_KEY_LENGTH
603#define XLR_SEC_IV_LENGTH          8
604#define XLR_SEC_AES_IV_LENGTH      16
605#define XLR_SEC_MAX_IV_LENGTH      XLR_SEC_AES_IV_LENGTH
606*/
607
608#define SEC_MAX_FRAG_LEN 16000
609
610struct xlr_sec_command {
611    uint16_t session_num;
612    struct cryptop *crp;
613    struct cryptodesc *enccrd, *maccrd;
614
615    xlr_sec_io_t op;
616};
617struct xlr_sec_session{
618    uint32_t    sessionid;
619    int hs_used;
620    int hs_mlen;
621    struct xlr_sec_command  cmd;
622    void*    desc_ptr;
623    uint8_t     multi_frag_flag;
624};
625
626/*
627 * Holds data specific to rmi security accelerators
628 */
629struct xlr_sec_softc {
630    device_t        sc_dev;     /* device backpointer */
631    struct mtx      sc_mtx;     /* per-instance lock */
632
633    int32_t         sc_cid;
634    struct xlr_sec_session *sc_sessions;
635    int             sc_nsessions;
636    xlr_reg_t*      mmio;
637};
638
639
640/*
641
642union xlr_sec_operand_t {
643        struct mbuf *m;
644        struct uio *io;
645        void *buf;
646}xlr_sec_operand;
647*/
648
649
650
651
652
653/* this is passed to packet setup to optimize */
654#define XLR_SEC_SETUP_OP_CIPHER              0x00000001
655#define XLR_SEC_SETUP_OP_HMAC                0x00000002
656#define XLR_SEC_SETUP_OP_CIPHER_HMAC         (XLR_SEC_SETUP_OP_CIPHER | XLR_SEC_SETUP_OP_HMAC)
657/* this is passed to control_setup to update w/preserving existing keys */
658#define XLR_SEC_SETUP_OP_PRESERVE_HMAC_KEY    0x80000000
659#define XLR_SEC_SETUP_OP_PRESERVE_CIPHER_KEY  0x40000000
660#define XLR_SEC_SETUP_OP_UPDATE_KEYS          0x00000010
661#define XLR_SEC_SETUP_OP_FLIP_3DES_KEY        0x00000020
662
663
664
665
666
667/*
668 *   Message Ring Specifics
669 */
670
671#define SEC_MSGRING_WORDSIZE      2
672
673
674/*
675 *
676 *
677 * rwR      31  30 29     27 26    24 23      21 20     18
678 *         |  NA  | RSA0Out | Rsa0In | Pipe3Out | Pipe3In | ...
679 *
680 *          17       15 14     12 11      9 8       6 5        3 2       0
681 *         |  Pipe2Out | Pipe2In | Pipe1In | Pipe1In | Pipe0Out | Pipe0In |
682 *
683 * DMA CREDIT REG -
684 *   NUMBER OF CREDITS PER PIPE
685 */
686
687#define SEC_DMA_CREDIT_RSA0_OUT_FOUR   0x20000000
688#define SEC_DMA_CREDIT_RSA0_OUT_TWO    0x10000000
689#define SEC_DMA_CREDIT_RSA0_OUT_ONE    0x08000000
690
691#define SEC_DMA_CREDIT_RSA0_IN_FOUR    0x04000000
692#define SEC_DMA_CREDIT_RSA0_IN_TWO     0x02000000
693#define SEC_DMA_CREDIT_RSA0_IN_ONE     0x01000000
694
695#define SEC_DMA_CREDIT_PIPE3_OUT_FOUR  0x00800000
696#define SEC_DMA_CREDIT_PIPE3_OUT_TWO   0x00400000
697#define SEC_DMA_CREDIT_PIPE3_OUT_ONE   0x00200000
698
699#define SEC_DMA_CREDIT_PIPE3_IN_FOUR   0x00100000
700#define SEC_DMA_CREDIT_PIPE3_IN_TWO    0x00080000
701#define SEC_DMA_CREDIT_PIPE3_IN_ONE    0x00040000
702
703#define SEC_DMA_CREDIT_PIPE2_OUT_FOUR  0x00020000
704#define SEC_DMA_CREDIT_PIPE2_OUT_TWO   0x00010000
705#define SEC_DMA_CREDIT_PIPE2_OUT_ONE   0x00008000
706
707#define SEC_DMA_CREDIT_PIPE2_IN_FOUR   0x00004000
708#define SEC_DMA_CREDIT_PIPE2_IN_TWO    0x00002000
709#define SEC_DMA_CREDIT_PIPE2_IN_ONE    0x00001000
710
711#define SEC_DMA_CREDIT_PIPE1_OUT_FOUR  0x00000800
712#define SEC_DMA_CREDIT_PIPE1_OUT_TWO   0x00000400
713#define SEC_DMA_CREDIT_PIPE1_OUT_ONE   0x00000200
714
715#define SEC_DMA_CREDIT_PIPE1_IN_FOUR   0x00000100
716#define SEC_DMA_CREDIT_PIPE1_IN_TWO    0x00000080
717#define SEC_DMA_CREDIT_PIPE1_IN_ONE    0x00000040
718
719#define SEC_DMA_CREDIT_PIPE0_OUT_FOUR  0x00000020
720#define SEC_DMA_CREDIT_PIPE0_OUT_TWO   0x00000010
721#define SEC_DMA_CREDIT_PIPE0_OUT_ONE   0x00000008
722
723#define SEC_DMA_CREDIT_PIPE0_IN_FOUR   0x00000004
724#define SEC_DMA_CREDIT_PIPE0_IN_TWO    0x00000002
725#define SEC_DMA_CREDIT_PIPE0_IN_ONE    0x00000001
726
727
728/*
729 *  Currently, FOUR credits per PIPE
730 *  0x24924924
731 */
732#define SEC_DMA_CREDIT_CONFIG          SEC_DMA_CREDIT_RSA0_OUT_FOUR | \
733                                       SEC_DMA_CREDIT_RSA0_IN_FOUR | \
734                                       SEC_DMA_CREDIT_PIPE3_OUT_FOUR | \
735                                       SEC_DMA_CREDIT_PIPE3_IN_FOUR | \
736                                       SEC_DMA_CREDIT_PIPE2_OUT_FOUR | \
737                                       SEC_DMA_CREDIT_PIPE2_IN_FOUR | \
738                                       SEC_DMA_CREDIT_PIPE1_OUT_FOUR | \
739                                       SEC_DMA_CREDIT_PIPE1_IN_FOUR | \
740                                       SEC_DMA_CREDIT_PIPE0_OUT_FOUR | \
741                                       SEC_DMA_CREDIT_PIPE0_IN_FOUR
742
743
744
745
746/*
747 * CONFIG2
748 *    31   5         4                   3
749 *   |  NA  | PIPE3_DEF_DBL_ISS | PIPE2_DEF_DBL_ISS | ...
750 *
751 *                 2                   1                   0
752 *   ... | PIPE1_DEF_DBL_ISS | PIPE0_DEF_DBL_ISS | ROUND_ROBIN_MODE |
753 *
754 *  DBL_ISS - mode for SECENG and DMA controller which slows down transfers
755 *             (to be conservativei; 0=Disable,1=Enable).
756 *  ROUND_ROBIN - mode where SECENG dispatches operations to PIPE0-PIPE3
757 *                and all messages are sent to PIPE0.
758 *
759 */
760
761#define SEC_CFG2_PIPE3_DBL_ISS_ON      0x00000010
762#define SEC_CFG2_PIPE3_DBL_ISS_OFF     0x00000000
763#define SEC_CFG2_PIPE2_DBL_ISS_ON      0x00000008
764#define SEC_CFG2_PIPE2_DBL_ISS_OFF     0x00000000
765#define SEC_CFG2_PIPE1_DBL_ISS_ON      0x00000004
766#define SEC_CFG2_PIPE1_DBL_ISS_OFF     0x00000000
767#define SEC_CFG2_PIPE0_DBL_ISS_ON      0x00000002
768#define SEC_CFG2_PIPE0_DBL_ISS_OFF     0x00000000
769#define SEC_CFG2_ROUND_ROBIN_ON        0x00000001
770#define SEC_CFG2_ROUND_ROBIN_OFF       0x00000000
771
772
773enum sec_pipe_config {
774
775  SEC_PIPE_CIPHER_KEY0_L0            = 0x00,
776  SEC_PIPE_CIPHER_KEY0_HI,
777  SEC_PIPE_CIPHER_KEY1_LO,
778  SEC_PIPE_CIPHER_KEY1_HI,
779  SEC_PIPE_CIPHER_KEY2_LO,
780  SEC_PIPE_CIPHER_KEY2_HI,
781  SEC_PIPE_CIPHER_KEY3_LO,
782  SEC_PIPE_CIPHER_KEY3_HI,
783  SEC_PIPE_HMAC_KEY0_LO,
784  SEC_PIPE_HMAC_KEY0_HI,
785  SEC_PIPE_HMAC_KEY1_LO,
786  SEC_PIPE_HMAC_KEY1_HI,
787  SEC_PIPE_HMAC_KEY2_LO,
788  SEC_PIPE_HMAC_KEY2_HI,
789  SEC_PIPE_HMAC_KEY3_LO,
790  SEC_PIPE_HMAC_KEY3_HI,
791  SEC_PIPE_HMAC_KEY4_LO,
792  SEC_PIPE_HMAC_KEY4_HI,
793  SEC_PIPE_HMAC_KEY5_LO,
794  SEC_PIPE_HMAC_KEY5_HI,
795  SEC_PIPE_HMAC_KEY6_LO,
796  SEC_PIPE_HMAC_KEY6_HI,
797  SEC_PIPE_HMAC_KEY7_LO,
798  SEC_PIPE_HMAC_KEY7_HI,
799  SEC_PIPE_NCFBM_LO,
800  SEC_PIPE_NCFBM_HI,
801  SEC_PIPE_INSTR_LO,
802  SEC_PIPE_INSTR_HI,
803  SEC_PIPE_RSVD0,
804  SEC_PIPE_RSVD1,
805  SEC_PIPE_RSVD2,
806  SEC_PIPE_RSVD3,
807
808  SEC_PIPE_DF_PTRS0,
809  SEC_PIPE_DF_PTRS1,
810  SEC_PIPE_DF_PTRS2,
811  SEC_PIPE_DF_PTRS3,
812  SEC_PIPE_DF_PTRS4,
813  SEC_PIPE_DF_PTRS5,
814  SEC_PIPE_DF_PTRS6,
815  SEC_PIPE_DF_PTRS7,
816
817  SEC_PIPE_DU_DATA_IN_LO,
818  SEC_PIPE_DU_DATA_IN_HI,
819  SEC_PIPE_DU_DATA_IN_CTRL,
820  SEC_PIPE_DU_DATA_OUT_LO,
821  SEC_PIPE_DU_DATA_OUT_HI,
822  SEC_PIPE_DU_DATA_OUT_CTRL,
823
824  SEC_PIPE_STATE0,
825  SEC_PIPE_STATE1,
826  SEC_PIPE_STATE2,
827  SEC_PIPE_STATE3,
828  SEC_PIPE_STATE4,
829  SEC_PIPE_INCLUDE_MASK0,
830  SEC_PIPE_INCLUDE_MASK1,
831  SEC_PIPE_INCLUDE_MASK2,
832  SEC_PIPE_INCLUDE_MASK3,
833  SEC_PIPE_INCLUDE_MASK4,
834  SEC_PIPE_EXCLUDE_MASK0,
835  SEC_PIPE_EXCLUDE_MASK1,
836  SEC_PIPE_EXCLUDE_MASK2,
837  SEC_PIPE_EXCLUDE_MASK3,
838  SEC_PIPE_EXCLUDE_MASK4,
839};
840
841
842enum sec_pipe_base_config {
843
844  SEC_PIPE0_BASE = 0x00,
845  SEC_PIPE1_BASE = 0x40,
846  SEC_PIPE2_BASE = 0x80,
847  SEC_PIPE3_BASE = 0xc0
848
849};
850
851enum sec_rsa_config {
852
853  SEC_RSA_PIPE0_DU_DATA_IN_LO = 0x100,
854  SEC_RSA_PIPE0_DU_DATA_IN_HI,
855  SEC_RSA_PIPE0_DU_DATA_IN_CTRL,
856  SEC_RSA_PIPE0_DU_DATA_OUT_LO,
857  SEC_RSA_PIPE0_DU_DATA_OUT_HI,
858  SEC_RSA_PIPE0_DU_DATA_OUT_CTRL,
859  SEC_RSA_RSVD0,
860  SEC_RSA_RSVD1,
861
862  SEC_RSA_PIPE0_STATE0,
863  SEC_RSA_PIPE0_STATE1,
864  SEC_RSA_PIPE0_STATE2,
865  SEC_RSA_PIPE0_INCLUDE_MASK0,
866  SEC_RSA_PIPE0_INCLUDE_MASK1,
867  SEC_RSA_PIPE0_INCLUDE_MASK2,
868  SEC_RSA_PIPE0_EXCLUDE_MASK0,
869  SEC_RSA_PIPE0_EXCLUDE_MASK1,
870  SEC_RSA_PIPE0_EXCLUDE_MASK2,
871  SEC_RSA_PIPE0_EVENT_CTR
872
873};
874
875
876
877
878enum sec_config {
879
880  SEC_DMA_CREDIT = 0x140,
881  SEC_CONFIG1,
882  SEC_CONFIG2,
883  SEC_CONFIG3,
884
885};
886
887
888
889enum sec_debug_config {
890
891  SEC_DW0_DESCRIPTOR0_LO  = 0x180,
892  SEC_DW0_DESCRIPTOR0_HI,
893  SEC_DW0_DESCRIPTOR1_LO,
894  SEC_DW0_DESCRIPTOR1_HI,
895  SEC_DW1_DESCRIPTOR0_LO,
896  SEC_DW1_DESCRIPTOR0_HI,
897  SEC_DW1_DESCRIPTOR1_LO,
898  SEC_DW1_DESCRIPTOR1_HI,
899  SEC_DW2_DESCRIPTOR0_LO,
900  SEC_DW2_DESCRIPTOR0_HI,
901  SEC_DW2_DESCRIPTOR1_LO,
902  SEC_DW2_DESCRIPTOR1_HI,
903  SEC_DW3_DESCRIPTOR0_LO,
904  SEC_DW3_DESCRIPTOR0_HI,
905  SEC_DW3_DESCRIPTOR1_LO,
906  SEC_DW3_DESCRIPTOR1_HI,
907
908  SEC_STATE0,
909  SEC_STATE1,
910  SEC_STATE2,
911  SEC_INCLUDE_MASK0,
912  SEC_INCLUDE_MASK1,
913  SEC_INCLUDE_MASK2,
914  SEC_EXCLUDE_MASK0,
915  SEC_EXCLUDE_MASK1,
916  SEC_EXCLUDE_MASK2,
917  SEC_EVENT_CTR
918
919};
920
921
922enum sec_msgring_bucket_config {
923
924  SEC_BIU_CREDITS = 0x308,
925
926  SEC_MSG_BUCKET0_SIZE = 0x320,
927  SEC_MSG_BUCKET1_SIZE,
928  SEC_MSG_BUCKET2_SIZE,
929  SEC_MSG_BUCKET3_SIZE,
930  SEC_MSG_BUCKET4_SIZE,
931  SEC_MSG_BUCKET5_SIZE,
932  SEC_MSG_BUCKET6_SIZE,
933  SEC_MSG_BUCKET7_SIZE,
934};
935
936enum sec_msgring_credit_config {
937
938  SEC_CC_CPU0_0                        = 0x380,
939  SEC_CC_CPU1_0                        = 0x388,
940  SEC_CC_CPU2_0                        = 0x390,
941  SEC_CC_CPU3_0                        = 0x398,
942  SEC_CC_CPU4_0                        = 0x3a0,
943  SEC_CC_CPU5_0                        = 0x3a8,
944  SEC_CC_CPU6_0                        = 0x3b0,
945  SEC_CC_CPU7_0                        = 0x3b8
946
947};
948
949enum sec_engine_id {
950  SEC_PIPE0,
951  SEC_PIPE1,
952  SEC_PIPE2,
953  SEC_PIPE3,
954  SEC_RSA
955};
956
957enum sec_cipher {
958  SEC_AES256_MODE_HMAC,
959  SEC_AES256_MODE,
960  SEC_AES256_HMAC,
961  SEC_AES256,
962  SEC_AES192_MODE_HMAC,
963  SEC_AES192_MODE,
964  SEC_AES192_HMAC,
965  SEC_AES192,
966  SEC_AES128_MODE_HMAC,
967  SEC_AES128_MODE,
968  SEC_AES128_HMAC,
969  SEC_AES128,
970  SEC_DES_HMAC,
971  SEC_DES,
972  SEC_3DES,
973  SEC_3DES_HMAC,
974  SEC_HMAC
975};
976
977enum sec_msgrng_msg_ctrl_config {
978  SEC_EOP=5,
979  SEC_SOP=6,
980};
981
982
983
984void xlr_sec_init( struct xlr_sec_softc *sc) ;
985
986int xlr_sec_setup(struct xlr_sec_session* ses,
987    struct xlr_sec_command  *cmd, symkey_desc_pt desc);
988
989symkey_desc_pt xlr_sec_allocate_desc(void*);
990
991#endif
992