malta_machdep.c revision 182901
1/*- 2 * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/mips/malta/malta_machdep.c 182901 2008-09-10 03:49:08Z gonzo $ 27 */ 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD: head/sys/mips/malta/malta_machdep.c 182901 2008-09-10 03:49:08Z gonzo $"); 30 31#include "opt_ddb.h" 32 33#include <sys/param.h> 34#include <sys/conf.h> 35#include <sys/kernel.h> 36#include <sys/systm.h> 37#include <sys/imgact.h> 38#include <sys/bio.h> 39#include <sys/buf.h> 40#include <sys/bus.h> 41#include <sys/cpu.h> 42#include <sys/cons.h> 43#include <sys/exec.h> 44#include <sys/ucontext.h> 45#include <sys/proc.h> 46#include <sys/kdb.h> 47#include <sys/ptrace.h> 48#include <sys/reboot.h> 49#include <sys/signalvar.h> 50#include <sys/sysent.h> 51#include <sys/sysproto.h> 52#include <sys/user.h> 53 54#include <vm/vm.h> 55#include <vm/vm_object.h> 56#include <vm/vm_page.h> 57#include <vm/vm_pager.h> 58 59#include <machine/clock.h> 60#include <machine/cpu.h> 61#include <machine/cpuregs.h> 62#include <machine/hwfunc.h> 63#include <machine/md_var.h> 64#include <machine/pmap.h> 65#include <machine/trap.h> 66 67#ifdef TICK_USE_YAMON_FREQ 68#include <mips/malta/yamon.h> 69#endif 70 71#ifdef TICK_USE_MALTA_RTC 72#include <mips/mips4k/malta/maltareg.h> 73#include <dev/mc146818/mc146818reg.h> 74#include <isa/rtc.h> 75#endif 76 77#include <mips/malta/maltareg.h> 78 79extern int *edata; 80extern int *end; 81 82void lcd_init(void); 83void lcd_puts(char *); 84void malta_reset(void); 85 86/* 87 * Offsets to MALTA LCD characters. 88 */ 89static int malta_lcd_offs[] = { 90 MALTA_ASCIIPOS0, 91 MALTA_ASCIIPOS1, 92 MALTA_ASCIIPOS2, 93 MALTA_ASCIIPOS3, 94 MALTA_ASCIIPOS4, 95 MALTA_ASCIIPOS5, 96 MALTA_ASCIIPOS6, 97 MALTA_ASCIIPOS7 98}; 99 100/* 101 * Put character to Malta LCD at given position. 102 */ 103static void 104malta_lcd_putc(int pos, char c) 105{ 106 void *addr; 107 char *ch; 108 109 if (pos < 0 || pos > 7) 110 return; 111 addr = (void *)(MALTA_ASCII_BASE + malta_lcd_offs[pos]); 112 ch = (char *)MIPS_PHYS_TO_KSEG0(addr); 113 *ch = c; 114} 115 116/* 117 * Print given string on LCD. 118 */ 119static void 120malta_lcd_print(char *str) 121{ 122 int i; 123 124 if (str == NULL) 125 return; 126 127 for (i = 0; *str != '\0'; i++, str++) 128 malta_lcd_putc(i, *str); 129} 130 131void 132lcd_init(void) 133{ 134 malta_lcd_print("FreeBSD_"); 135} 136 137void 138lcd_puts(char *s) 139{ 140 malta_lcd_print(s); 141} 142 143#ifdef TICK_USE_MALTA_RTC 144static __inline uint8_t 145rtcin(uint8_t addr) 146{ 147 148 *((volatile uint8_t *) 149 MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr; 150 return (*((volatile uint8_t *) 151 MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT)))); 152} 153 154static __inline void 155writertc(uint8_t addr, uint8_t val) 156{ 157 158 *((volatile uint8_t *) 159 MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr; 160 *((volatile uint8_t *) 161 MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))) = val; 162} 163#endif 164 165static void 166mips_init(void) 167{ 168 int i; 169 170 for (i = 0; i < 10; i++) { 171 phys_avail[i] = 0; 172 } 173 174 /* phys_avail regions are in bytes */ 175 phys_avail[0] = MIPS_KSEG0_TO_PHYS((vm_offset_t)&end); 176 phys_avail[1] = ctob(realmem); 177 178 physmem = realmem; 179 180 init_param1(); 181 init_param2(physmem); 182 mips_cpu_init(); 183 pmap_bootstrap(); 184 mips_proc0_init(); 185 mutex_init(); 186#ifdef DDB 187 kdb_init(); 188#endif 189} 190 191void 192platform_halt(void) 193{ 194 195} 196 197 198void 199platform_identify(void) 200{ 201 202} 203 204/* 205 * Perform a board-level soft-reset. 206 * Note that this is not emulated by gxemul. 207 */ 208void 209platform_reset(void) 210{ 211 char *c; 212 213 c = (char *)MIPS_PHYS_TO_KSEG0(MALTA_SOFTRES); 214 *c = MALTA_GORESET; 215} 216 217void 218platform_trap_enter(void) 219{ 220 221} 222 223void 224platform_trap_exit(void) 225{ 226 227} 228 229void 230platform_start(__register_t a0, __register_t a1, __register_t a2, 231 __register_t a3) 232{ 233 vm_offset_t kernend; 234 uint64_t platform_counter_freq; 235 int argc = a0; 236 char **argv = (char **)a1; 237 char **envp = (char **)a2; 238 unsigned int memsize = a3; 239 int i; 240 241 /* clear the BSS and SBSS segments */ 242 kernend = round_page((vm_offset_t)&end); 243 memset(&edata, 0, kernend - (vm_offset_t)(&edata)); 244 245 cninit(); 246 printf("entry: platform_start()\n"); 247 248 bootverbose = 1; 249 if (bootverbose) { 250 printf("cmd line: "); 251 for (i = 0; i < argc; i++) 252 printf("%s ", argv[i]); 253 printf("\n"); 254 255 printf("envp:\n"); 256 for (i = 0; envp[i]; i += 2) 257 printf("\t%s = %s\n", envp[i], envp[i+1]); 258 259 printf("memsize = %08x\n", memsize); 260 } 261 262 realmem = btoc(memsize); 263 mips_init(); 264 265 do { 266#if defined(TICK_USE_YAMON_FREQ) 267 /* 268 * If we are running on a board which uses YAMON firmware, 269 * then query CPU pipeline clock from the syscon object. 270 * If unsuccessful, use hard-coded default. 271 */ 272 platform_counter_freq = yamon_getcpufreq(); 273 if (platform_counter_freq == 0) 274 platform_counter_freq = MIPS_DEFAULT_HZ; 275 276#elif defined(TICK_USE_MALTA_RTC) 277 /* 278 * If we are running on a board with the MC146818 RTC, 279 * use it to determine CPU pipeline clock frequency. 280 */ 281 u_int64_t counterval[2]; 282 283 /* Set RTC to binary mode. */ 284 writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD)); 285 286 /* Busy-wait for falling edge of RTC update. */ 287 while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) 288 ; 289 while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) 290 ; 291 counterval[0] = mips_rd_count(); 292 293 /* Busy-wait for falling edge of RTC update. */ 294 while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) 295 ; 296 while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) 297 ; 298 counterval[1] = mips_rd_count(); 299 300 platform_counter_freq = counterval[1] - counterval[0]; 301#endif 302 } while(0); 303 304 mips_timer_init_params(platform_counter_freq, 0); 305} 306