trap.h revision 202031
1230557Sjimharris/* $OpenBSD: trap.h,v 1.3 1999/01/27 04:46:06 imp Exp $ */ 2230557Sjimharris 3230557Sjimharris/*- 4230557Sjimharris * Copyright (c) 1988 University of Utah. 5230557Sjimharris * Copyright (c) 1992, 1993 6230557Sjimharris * The Regents of the University of California. All rights reserved. 7230557Sjimharris * 8230557Sjimharris * This code is derived from software contributed to Berkeley by 9230557Sjimharris * the Systems Programming Group of the University of Utah Computer 10230557Sjimharris * Science Department and Ralph Campbell. 11230557Sjimharris * 12230557Sjimharris * Redistribution and use in source and binary forms, with or without 13230557Sjimharris * modification, are permitted provided that the following conditions 14230557Sjimharris * are met: 15230557Sjimharris * 1. Redistributions of source code must retain the above copyright 16230557Sjimharris * notice, this list of conditions and the following disclaimer. 17230557Sjimharris * 2. Redistributions in binary form must reproduce the above copyright 18230557Sjimharris * notice, this list of conditions and the following disclaimer in the 19230557Sjimharris * documentation and/or other materials provided with the distribution. 20230557Sjimharris * 4. Neither the name of the University nor the names of its contributors 21230557Sjimharris * may be used to endorse or promote products derived from this software 22230557Sjimharris * without specific prior written permission. 23230557Sjimharris * 24230557Sjimharris * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25230557Sjimharris * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26230557Sjimharris * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27230557Sjimharris * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28230557Sjimharris * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29230557Sjimharris * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30230557Sjimharris * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31230557Sjimharris * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32230557Sjimharris * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33230557Sjimharris * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34230557Sjimharris * SUCH DAMAGE. 35230557Sjimharris * 36230557Sjimharris * from: Utah Hdr: trap.h 1.1 90/07/09 37230557Sjimharris * from: @(#)trap.h 8.1 (Berkeley) 6/10/93 38230557Sjimharris * JNPR: trap.h,v 1.3 2006/12/02 09:53:41 katta 39230557Sjimharris * $FreeBSD: head/sys/mips/include/trap.h 202031 2010-01-10 19:50:24Z imp $ 40230557Sjimharris */ 41230557Sjimharris 42230557Sjimharris#ifndef _MACHINE_TRAP_H_ 43230557Sjimharris#define _MACHINE_TRAP_H_ 44230557Sjimharris 45230557Sjimharris/* 46230557Sjimharris * Trap codes also known in trap.c for name strings. 47230557Sjimharris * Used for indexing so modify with care. 48230557Sjimharris */ 49230557Sjimharris 50230557Sjimharris#define T_INT 0 /* Interrupt pending */ 51230557Sjimharris#define T_TLB_MOD 1 /* TLB modified fault */ 52230557Sjimharris#define T_TLB_LD_MISS 2 /* TLB miss on load or ifetch */ 53230557Sjimharris#define T_TLB_ST_MISS 3 /* TLB miss on a store */ 54230557Sjimharris#define T_ADDR_ERR_LD 4 /* Address error on a load or ifetch */ 55230557Sjimharris#define T_ADDR_ERR_ST 5 /* Address error on a store */ 56230557Sjimharris#define T_BUS_ERR_IFETCH 6 /* Bus error on an ifetch */ 57230557Sjimharris#define T_BUS_ERR_LD_ST 7 /* Bus error on a load or store */ 58230557Sjimharris#define T_SYSCALL 8 /* System call */ 59230557Sjimharris#define T_BREAK 9 /* Breakpoint */ 60230557Sjimharris#define T_RES_INST 10 /* Reserved instruction exception */ 61230557Sjimharris#define T_COP_UNUSABLE 11 /* Coprocessor unusable */ 62230557Sjimharris#define T_OVFLOW 12 /* Arithmetic overflow */ 63230557Sjimharris#define T_TRAP 13 /* Trap instruction */ 64230557Sjimharris#define T_VCEI 14 /* Virtual coherency instruction */ 65230557Sjimharris#define T_FPE 15 /* Floating point exception */ 66230557Sjimharris#define T_IWATCH 16 /* Inst. Watch address reference */ 67230557Sjimharris#define T_C2E 18 /* Exception from coprocessor 2 */ 68230557Sjimharris#define T_DWATCH 23 /* Data Watch address reference */ 69230557Sjimharris#define T_MCHECK 24 /* Received an MCHECK */ 70230557Sjimharris#define T_VCED 31 /* Virtual coherency data */ 71230557Sjimharris 72230557Sjimharris#define T_USER 0x20 /* user-mode flag or'ed with type */ 73230557Sjimharris 74230557Sjimharris#if !defined(SMP) && (defined(DDB) || defined(DEBUG)) 75230557Sjimharris 76230557Sjimharrisstruct trapdebug { /* trap history buffer for debugging */ 77230557Sjimharris u_int status; 78230557Sjimharris u_int cause; 79230557Sjimharris u_int vadr; 80230557Sjimharris u_int pc; 81230557Sjimharris u_int ra; 82230557Sjimharris u_int sp; 83230557Sjimharris u_int code; 84230557Sjimharris}; 85230557Sjimharris 86230557Sjimharris#define trapdebug_enter(x, cd) { \ 87230557Sjimharris intrmask_t s = disableintr(); \ 88230557Sjimharris trp->status = x->sr; \ 89230557Sjimharris trp->cause = x->cause; \ 90230557Sjimharris trp->vadr = x->badvaddr; \ 91230557Sjimharris trp->pc = x->pc; \ 92230557Sjimharris trp->sp = x->sp; \ 93230557Sjimharris trp->ra = x->ra; \ 94230557Sjimharris trp->code = cd; \ 95230557Sjimharris if (++trp == &trapdebug[TRAPSIZE]) \ 96230557Sjimharris trp = trapdebug; \ 97230557Sjimharris restoreintr(s); \ 98230557Sjimharris} 99230557Sjimharris 100230557Sjimharris#define TRAPSIZE 10 /* Trap log buffer length */ 101230557Sjimharrisextern struct trapdebug trapdebug[TRAPSIZE], *trp; 102230557Sjimharris 103230557Sjimharrisvoid trapDump(char *msg); 104230557Sjimharris 105230557Sjimharris#else 106230557Sjimharris 107230557Sjimharris#define trapdebug_enter(x, cd) 108230557Sjimharris 109230557Sjimharris#endif 110230557Sjimharris 111230557Sjimharrisvoid MipsFPTrap(u_int, u_int, u_int); 112230557Sjimharrisvoid MipsKernGenException(void); 113230557Sjimharrisvoid MipsKernIntr(void); 114230557Sjimharrisvoid MipsKernTLBInvalidException(void); 115230557Sjimharrisvoid MipsTLBInvalidException(void); 116230557Sjimharrisvoid MipsTLBMissException(void); 117230557Sjimharrisvoid MipsUserGenException(void); 118230557Sjimharrisvoid MipsUserIntr(void); 119230557Sjimharrisvoid MipsUserTLBInvalidException(void); 120230557Sjimharris 121230557Sjimharrisu_int trap(struct trapframe *); 122230557Sjimharris 123230557Sjimharris#ifndef LOCORE /* XXX */ 124230557Sjimharrisint check_address(void *); 125230557Sjimharrisvoid platform_trap_enter(void); 126230557Sjimharrisvoid platform_trap_exit(void); 127230557Sjimharris#endif 128230557Sjimharris 129230557Sjimharris#endif /* !_MACHINE_TRAP_H_ */ 130230557Sjimharris