ar71xx_setup.c revision 211502
1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_setup.c 211502 2010-08-19 11:40:10Z adrian $"); 29 30#include <sys/param.h> 31#include <machine/cpuregs.h> 32 33#include <mips/sentry5/s5reg.h> 34 35#include "opt_ddb.h" 36 37#include <sys/param.h> 38#include <sys/conf.h> 39#include <sys/kernel.h> 40#include <sys/systm.h> 41#include <sys/bus.h> 42#include <sys/cons.h> 43#include <sys/kdb.h> 44#include <sys/reboot.h> 45 46#include <vm/vm.h> 47#include <vm/vm_page.h> 48 49#include <net/ethernet.h> 50 51#include <machine/clock.h> 52#include <machine/cpu.h> 53#include <machine/hwfunc.h> 54#include <machine/md_var.h> 55#include <machine/trap.h> 56#include <machine/vmparam.h> 57 58#include <mips/atheros/ar71xxreg.h> 59#include <mips/atheros/ar71xx_setup.h> 60 61#include <mips/atheros/ar71xx_cpudef.h> 62 63#include <mips/atheros/ar71xx_chip.h> 64#include <mips/atheros/ar91xx_chip.h> 65 66#define AR71XX_SYS_TYPE_LEN 128 67 68static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN]; 69enum ar71xx_soc_type ar71xx_soc; 70struct ar71xx_cpu_def * ar71xx_cpu_ops = NULL; 71 72void 73ar71xx_detect_sys_type(void) 74{ 75 char *chip = "????"; 76 uint32_t id; 77 uint32_t major; 78 uint32_t minor; 79 uint32_t rev = 0; 80 81 id = ATH_READ_REG(AR71XX_RST_RESET_REG_REV_ID); 82 major = id & REV_ID_MAJOR_MASK; 83 84 switch (major) { 85 case REV_ID_MAJOR_AR71XX: 86 minor = id & AR71XX_REV_ID_MINOR_MASK; 87 rev = id >> AR71XX_REV_ID_REVISION_SHIFT; 88 rev &= AR71XX_REV_ID_REVISION_MASK; 89 ar71xx_cpu_ops = &ar71xx_chip_def; 90 switch (minor) { 91 case AR71XX_REV_ID_MINOR_AR7130: 92 ar71xx_soc = AR71XX_SOC_AR7130; 93 chip = "7130"; 94 break; 95 96 case AR71XX_REV_ID_MINOR_AR7141: 97 ar71xx_soc = AR71XX_SOC_AR7141; 98 chip = "7141"; 99 break; 100 101 case AR71XX_REV_ID_MINOR_AR7161: 102 ar71xx_soc = AR71XX_SOC_AR7161; 103 chip = "7161"; 104 break; 105 } 106 break; 107 108 case REV_ID_MAJOR_AR913X: 109 minor = id & AR91XX_REV_ID_MINOR_MASK; 110 rev = id >> AR91XX_REV_ID_REVISION_SHIFT; 111 rev &= AR91XX_REV_ID_REVISION_MASK; 112 ar71xx_cpu_ops = &ar91xx_chip_def; 113 switch (minor) { 114 case AR91XX_REV_ID_MINOR_AR9130: 115 ar71xx_soc = AR71XX_SOC_AR9130; 116 chip = "9130"; 117 break; 118 119 case AR91XX_REV_ID_MINOR_AR9132: 120 ar71xx_soc = AR71XX_SOC_AR9132; 121 chip = "9132"; 122 break; 123 } 124 break; 125 126 127 default: 128 panic("ar71xx: unknown chip id:0x%08x\n", id); 129 } 130 131 sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev); 132} 133 134const char * 135ar71xx_get_system_type(void) 136{ 137 return ar71xx_sys_type; 138} 139 140