cpufunc.h revision 96912 
1/*-
2 * Copyright (c) 1998 Doug Rabson
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/ia64/include/cpufunc.h 96912 2002-05-19 04:42:19Z marcel $
27 */
28
29#ifndef _MACHINE_CPUFUNC_H_
30#define _MACHINE_CPUFUNC_H_
31
32#ifdef _KERNEL
33
34#include <sys/types.h>
35#include <machine/ia64_cpu.h>
36#include <machine/vmparam.h>
37
38struct thread;
39
40#ifdef __GNUC__
41
42static __inline void
43breakpoint(void)
44{
45	__asm __volatile("break 0x80100"); /* XXX use linux value */
46}
47
48#endif
49
50extern u_int64_t	ia64_port_base;
51
52static __inline volatile void *
53ia64_port_address(u_int port)
54{
55    return (volatile void *)(ia64_port_base
56			     | ((port >> 2) << 12)
57			     | (port & ((1 << 12) - 1)));
58}
59
60static __inline volatile void *
61ia64_memory_address(u_int64_t addr)
62{
63	return (volatile void *) IA64_PHYS_TO_RR6(addr);
64}
65
66static __inline u_int8_t
67inb(u_int port)
68{
69	volatile u_int8_t *p = ia64_port_address(port);
70	u_int8_t v = *p;
71	ia64_mf_a();
72	ia64_mf();
73	return v;
74}
75
76static __inline u_int16_t
77inw(u_int port)
78{
79	volatile u_int16_t *p = ia64_port_address(port);
80	u_int16_t v = *p;
81	ia64_mf_a();
82	ia64_mf();
83	return v;
84}
85
86static __inline u_int32_t
87inl(u_int port)
88{
89	volatile u_int32_t *p = ia64_port_address(port);
90	u_int32_t v = *p;
91	ia64_mf_a();
92	ia64_mf();
93	return v;
94}
95
96static __inline void
97insb(u_int port, void *addr, size_t count)
98{
99	u_int8_t *p = addr;
100	while (count--)
101		*p++ = inb(port);
102}
103
104static __inline void
105insw(u_int port, void *addr, size_t count)
106{
107	u_int16_t *p = addr;
108	while (count--)
109		*p++ = inw(port);
110}
111
112static __inline void
113insl(u_int port, void *addr, size_t count)
114{
115	u_int32_t *p = addr;
116	while (count--)
117		*p++ = inl(port);
118}
119
120static __inline void
121outb(u_int port, u_int8_t data)
122{
123	volatile u_int8_t *p = ia64_port_address(port);
124	*p = data;
125	ia64_mf_a();
126	ia64_mf();
127}
128
129static __inline void
130outw(u_int port, u_int16_t data)
131{
132	volatile u_int16_t *p = ia64_port_address(port);
133	*p = data;
134	ia64_mf_a();
135	ia64_mf();
136}
137
138static __inline void
139outl(u_int port, u_int32_t data)
140{
141	volatile u_int32_t *p = ia64_port_address(port);
142	*p = data;
143	ia64_mf_a();
144	ia64_mf();
145}
146
147static __inline void
148outsb(u_int port, const void *addr, size_t count)
149{
150	const u_int8_t *p = addr;
151	while (count--)
152		outb(port, *p++);
153}
154
155static __inline void
156outsw(u_int port, const void *addr, size_t count)
157{
158	const u_int16_t *p = addr;
159	while (count--)
160		outw(port, *p++);
161}
162
163static __inline void
164outsl(u_int port, const void *addr, size_t count)
165{
166	const u_int32_t *p = addr;
167	while (count--)
168		outl(port, *p++);
169}
170
171static __inline u_int8_t
172readb(u_int addr)
173{
174	volatile u_int8_t *p = ia64_memory_address(addr);
175	u_int8_t v = *p;
176	ia64_mf_a();
177	ia64_mf();
178	return v;
179}
180
181static __inline u_int16_t
182readw(u_int addr)
183{
184	volatile u_int16_t *p = ia64_memory_address(addr);
185	u_int16_t v = *p;
186	ia64_mf_a();
187	ia64_mf();
188	return v;
189}
190
191static __inline u_int32_t
192readl(u_int addr)
193{
194	volatile u_int32_t *p = ia64_memory_address(addr);
195	u_int32_t v = *p;
196	ia64_mf_a();
197	ia64_mf();
198	return v;
199}
200
201static __inline void
202writeb(u_int addr, u_int8_t data)
203{
204	volatile u_int8_t *p = ia64_memory_address(addr);
205	*p = data;
206	ia64_mf_a();
207	ia64_mf();
208}
209
210static __inline void
211writew(u_int addr, u_int16_t data)
212{
213	volatile u_int16_t *p = ia64_memory_address(addr);
214	*p = data;
215	ia64_mf_a();
216	ia64_mf();
217}
218
219static __inline void
220writel(u_int addr, u_int32_t data)
221{
222	volatile u_int32_t *p = ia64_memory_address(addr);
223	*p = data;
224	ia64_mf_a();
225	ia64_mf();
226}
227
228static __inline void
229memcpy_fromio(u_int8_t *addr, size_t ofs, size_t count)
230{
231	volatile u_int8_t *p = ia64_memory_address(ofs);
232	while (count--)
233		*addr++ = *p++;
234}
235
236static __inline void
237memcpy_io(size_t dst, size_t src, size_t count)
238{
239	volatile u_int8_t *dp = ia64_memory_address(dst);
240	volatile u_int8_t *sp = ia64_memory_address(src);
241	while (count--)
242		*dp++ = *sp++;
243}
244
245static __inline void
246memcpy_toio(size_t ofs, u_int8_t *addr, size_t count)
247{
248	volatile u_int8_t *p = ia64_memory_address(ofs);
249	while (count--)
250		*p++ = *addr++;
251}
252
253static __inline void
254memset_io(size_t ofs, u_int8_t value, size_t count)
255{
256	volatile u_int8_t *p = ia64_memory_address(ofs);
257	while (count--)
258		*p++ = value;
259}
260
261static __inline void
262memsetw(u_int16_t *addr, int val, size_t size)
263{
264	while (size--)
265		*addr++ = val;
266}
267
268static __inline void
269memsetw_io(size_t ofs, u_int16_t value, size_t count)
270{
271	volatile u_int16_t *p = ia64_memory_address(ofs);
272	while (count--)
273		*p++ = value;
274}
275
276static __inline void
277disable_intr(void)
278{
279	__asm __volatile ("rsm psr.i;;");
280}
281
282static __inline void
283enable_intr(void)
284{
285	__asm __volatile (";; ssm psr.i;; srlz.d");
286}
287
288static __inline register_t
289intr_disable(void)
290{
291	register_t psr;
292
293	__asm __volatile ("mov %0=psr;;" : "=r" (psr));
294	disable_intr();
295	return (psr);
296}
297
298static __inline void
299intr_restore(critical_t psr)
300{
301	__asm __volatile ("mov psr.l=%0;; srlz.d" :: "r" (psr));
302}
303
304#endif /* _KERNEL */
305
306#endif /* !_MACHINE_CPUFUNC_H_ */
307