cpufunc.h revision 92781 
1/*-
2 * Copyright (c) 1998 Doug Rabson
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/ia64/include/cpufunc.h 92781 2002-03-20 10:00:05Z dfr $
27 */
28
29#ifndef _MACHINE_CPUFUNC_H_
30#define _MACHINE_CPUFUNC_H_
31
32#ifdef _KERNEL
33
34#include <sys/types.h>
35#include <machine/ia64_cpu.h>
36
37#define	CRITICAL_FORK	(ia64_get_psr() | IA64_PSR_I)
38
39#ifdef __GNUC__
40
41static __inline void
42breakpoint(void)
43{
44	__asm __volatile("break 0x80100"); /* XXX use linux value */
45}
46
47#endif
48
49extern u_int64_t	ia64_port_base;
50
51static __inline volatile void *
52ia64_port_address(u_int port)
53{
54    return (volatile void *)(ia64_port_base
55			     | ((port >> 2) << 12)
56			     | (port & ((1 << 12) - 1)));
57}
58
59static __inline volatile void *
60ia64_memory_address(u_int64_t addr)
61{
62	return (volatile void *) IA64_PHYS_TO_RR6(addr);
63}
64
65static __inline u_int8_t
66inb(u_int port)
67{
68	volatile u_int8_t *p = ia64_port_address(port);
69	u_int8_t v = *p;
70	ia64_mf_a();
71	ia64_mf();
72	return v;
73}
74
75static __inline u_int16_t
76inw(u_int port)
77{
78	volatile u_int16_t *p = ia64_port_address(port);
79	u_int16_t v = *p;
80	ia64_mf_a();
81	ia64_mf();
82	return v;
83}
84
85static __inline u_int32_t
86inl(u_int port)
87{
88	volatile u_int32_t *p = ia64_port_address(port);
89	u_int32_t v = *p;
90	ia64_mf_a();
91	ia64_mf();
92	return v;
93}
94
95static __inline void
96insb(u_int port, void *addr, size_t count)
97{
98	u_int8_t *p = addr;
99	while (count--)
100		*p++ = inb(port);
101}
102
103static __inline void
104insw(u_int port, void *addr, size_t count)
105{
106	u_int16_t *p = addr;
107	while (count--)
108		*p++ = inw(port);
109}
110
111static __inline void
112insl(u_int port, void *addr, size_t count)
113{
114	u_int32_t *p = addr;
115	while (count--)
116		*p++ = inl(port);
117}
118
119static __inline void
120outb(u_int port, u_int8_t data)
121{
122	volatile u_int8_t *p = ia64_port_address(port);
123	*p = data;
124	ia64_mf_a();
125	ia64_mf();
126}
127
128static __inline void
129outw(u_int port, u_int16_t data)
130{
131	volatile u_int16_t *p = ia64_port_address(port);
132	*p = data;
133	ia64_mf_a();
134	ia64_mf();
135}
136
137static __inline void
138outl(u_int port, u_int32_t data)
139{
140	volatile u_int32_t *p = ia64_port_address(port);
141	*p = data;
142	ia64_mf_a();
143	ia64_mf();
144}
145
146static __inline void
147outsb(u_int port, const void *addr, size_t count)
148{
149	const u_int8_t *p = addr;
150	while (count--)
151		outb(port, *p++);
152}
153
154static __inline void
155outsw(u_int port, const void *addr, size_t count)
156{
157	const u_int16_t *p = addr;
158	while (count--)
159		outw(port, *p++);
160}
161
162static __inline void
163outsl(u_int port, const void *addr, size_t count)
164{
165	const u_int32_t *p = addr;
166	while (count--)
167		outl(port, *p++);
168}
169
170static __inline u_int8_t
171readb(u_int addr)
172{
173	volatile u_int8_t *p = ia64_memory_address(addr);
174	u_int8_t v = *p;
175	ia64_mf_a();
176	ia64_mf();
177	return v;
178}
179
180static __inline u_int16_t
181readw(u_int addr)
182{
183	volatile u_int16_t *p = ia64_memory_address(addr);
184	u_int16_t v = *p;
185	ia64_mf_a();
186	ia64_mf();
187	return v;
188}
189
190static __inline u_int32_t
191readl(u_int addr)
192{
193	volatile u_int32_t *p = ia64_memory_address(addr);
194	u_int32_t v = *p;
195	ia64_mf_a();
196	ia64_mf();
197	return v;
198}
199
200static __inline void
201writeb(u_int addr, u_int8_t data)
202{
203	volatile u_int8_t *p = ia64_memory_address(addr);
204	*p = data;
205	ia64_mf_a();
206	ia64_mf();
207}
208
209static __inline void
210writew(u_int addr, u_int16_t data)
211{
212	volatile u_int16_t *p = ia64_memory_address(addr);
213	*p = data;
214	ia64_mf_a();
215	ia64_mf();
216}
217
218static __inline void
219writel(u_int addr, u_int32_t data)
220{
221	volatile u_int32_t *p = ia64_memory_address(addr);
222	*p = data;
223	ia64_mf_a();
224	ia64_mf();
225}
226
227static __inline void
228memcpy_fromio(u_int8_t *addr, size_t ofs, size_t count)
229{
230	volatile u_int8_t *p = ia64_memory_address(ofs);
231	while (count--)
232		*addr++ = *p++;
233}
234
235static __inline void
236memcpy_io(size_t dst, size_t src, size_t count)
237{
238	volatile u_int8_t *dp = ia64_memory_address(dst);
239	volatile u_int8_t *sp = ia64_memory_address(src);
240	while (count--)
241		*dp++ = *sp++;
242}
243
244static __inline void
245memcpy_toio(size_t ofs, u_int8_t *addr, size_t count)
246{
247	volatile u_int8_t *p = ia64_memory_address(ofs);
248	while (count--)
249		*p++ = *addr++;
250}
251
252static __inline void
253memset_io(size_t ofs, u_int8_t value, size_t count)
254{
255	volatile u_int8_t *p = ia64_memory_address(ofs);
256	while (count--)
257		*p++ = value;
258}
259
260static __inline void
261memsetw(u_int16_t *addr, int val, size_t size)
262{
263	while (size--)
264		*addr++ = val;
265}
266
267static __inline void
268memsetw_io(size_t ofs, u_int16_t value, size_t count)
269{
270	volatile u_int16_t *p = ia64_memory_address(ofs);
271	while (count--)
272		*p++ = value;
273}
274
275static __inline void
276disable_intr(void)
277{
278	__asm __volatile ("rsm psr.i;;");
279}
280
281static __inline void
282enable_intr(void)
283{
284	__asm __volatile (";; ssm psr.i;; srlz.d");
285}
286
287static __inline critical_t
288intr_disable(void)
289{
290	critical_t psr;
291
292	__asm __volatile ("mov %0=psr;;" : "=r" (psr));
293	disable_intr();
294	return (psr);
295}
296
297static __inline void
298intr_enable(critical_t psr)
299{
300	__asm __volatile ("mov psr.l=%0;; srlz.d" :: "r" (psr));
301}
302
303static __inline critical_t
304cpu_critical_enter(void)
305{
306	return (intr_disable());
307}
308
309static __inline void
310cpu_critical_exit(critical_t psr)
311{
312	intr_enable(psr);
313}
314
315#endif /* _KERNEL */
316
317#endif /* !_MACHINE_CPUFUNC_H_ */
318