cpufunc.h revision 114208 
1219561Savg/*-
2219561Savg * Copyright (c) 1998 Doug Rabson
3219561Savg * All rights reserved.
4219561Savg *
5219561Savg * Redistribution and use in source and binary forms, with or without
6219561Savg * modification, are permitted provided that the following conditions
7219561Savg * are met:
8219561Savg * 1. Redistributions of source code must retain the above copyright
9219561Savg *    notice, this list of conditions and the following disclaimer.
10219561Savg * 2. Redistributions in binary form must reproduce the above copyright
11219561Savg *    notice, this list of conditions and the following disclaimer in the
12219561Savg *    documentation and/or other materials provided with the distribution.
13219561Savg *
14253996Savg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15253996Savg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/ia64/include/cpufunc.h 114208 2003-04-29 09:50:03Z marcel $
27 */
28
29#ifndef _MACHINE_CPUFUNC_H_
30#define _MACHINE_CPUFUNC_H_
31
32#ifdef _KERNEL
33
34#include <sys/types.h>
35#include <machine/ia64_cpu.h>
36#include <machine/vmparam.h>
37
38struct thread;
39
40#ifdef __GNUC__
41
42static __inline void
43breakpoint(void)
44{
45	__asm __volatile("break 0x80100"); /* XXX use linux value */
46}
47
48#endif
49
50extern uint64_t ia64_port_base;
51#define	__MEMIO_ADDR(x)		(__volatile void*)(IA64_PHYS_TO_RR6(x))
52#define	__PIO_ADDR(x)		(__volatile void*)(ia64_port_base |	\
53	(((x) & 0xFFFC) << 10) | ((x) & 0xFFF))
54
55/*
56 * I/O port reads with ia32 semantics.
57 */
58static __inline uint8_t
59inb(unsigned int port)
60{
61	__volatile uint8_t *p;
62	uint8_t v;
63	p = __PIO_ADDR(port);
64	ia64_mf();
65	v = *p;
66	ia64_mf_a();
67	ia64_mf();
68	return (v);
69}
70
71static __inline uint16_t
72inw(unsigned int port)
73{
74	__volatile uint16_t *p;
75	uint16_t v;
76	p = __PIO_ADDR(port);
77	ia64_mf();
78	v = *p;
79	ia64_mf_a();
80	ia64_mf();
81	return (v);
82}
83
84static __inline uint32_t
85inl(unsigned int port)
86{
87	volatile uint32_t *p;
88	uint32_t v;
89	p = __PIO_ADDR(port);
90	ia64_mf();
91	v = *p;
92	ia64_mf_a();
93	ia64_mf();
94	return (v);
95}
96
97static __inline void
98insb(unsigned int port, void *addr, size_t count)
99{
100	uint8_t *buf = addr;
101	while (count--)
102		*buf++ = inb(port);
103}
104
105static __inline void
106insw(unsigned int port, void *addr, size_t count)
107{
108	uint16_t *buf = addr;
109	while (count--)
110		*buf++ = inw(port);
111}
112
113static __inline void
114insl(unsigned int port, void *addr, size_t count)
115{
116	uint32_t *buf = addr;
117	while (count--)
118		*buf++ = inl(port);
119}
120
121static __inline void
122outb(unsigned int port, uint8_t data)
123{
124	volatile uint8_t *p;
125	p = __PIO_ADDR(port);
126	ia64_mf();
127	*p = data;
128	ia64_mf_a();
129	ia64_mf();
130}
131
132static __inline void
133outw(unsigned int port, uint16_t data)
134{
135	volatile uint16_t *p;
136	p = __PIO_ADDR(port);
137	ia64_mf();
138	*p = data;
139	ia64_mf_a();
140	ia64_mf();
141}
142
143static __inline void
144outl(unsigned int port, uint32_t data)
145{
146	volatile uint32_t *p;
147	p = __PIO_ADDR(port);
148	ia64_mf();
149	*p = data;
150	ia64_mf_a();
151	ia64_mf();
152}
153
154static __inline void
155outsb(unsigned int port, const void *addr, size_t count)
156{
157	const uint8_t *buf = addr;
158	while (count--)
159		outb(port, *buf++);
160}
161
162static __inline void
163outsw(unsigned int port, const void *addr, size_t count)
164{
165	const uint16_t *buf = addr;
166	while (count--)
167		outw(port, *buf++);
168}
169
170static __inline void
171outsl(unsigned int port, const void *addr, size_t count)
172{
173	const uint32_t *buf = addr;
174	while (count--)
175		outl(port, *buf++);
176}
177
178static __inline void
179disable_intr(void)
180{
181	__asm __volatile ("rsm psr.i");
182}
183
184static __inline void
185enable_intr(void)
186{
187	__asm __volatile ("ssm psr.i;; srlz.d");
188}
189
190static __inline register_t
191intr_disable(void)
192{
193	register_t psr;
194	__asm __volatile ("mov %0=psr;;" : "=r"(psr));
195	disable_intr();
196	return (psr);
197}
198
199static __inline void
200intr_restore(critical_t psr)
201{
202	__asm __volatile ("mov psr.l=%0;; srlz.d" :: "r"(psr));
203}
204
205#endif /* _KERNEL */
206
207#endif /* !_MACHINE_CPUFUNC_H_ */
208