cpufunc.h revision 106067
1/*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/ia64/include/cpufunc.h 106067 2002-10-28 01:00:57Z marcel $ 27 */ 28 29#ifndef _MACHINE_CPUFUNC_H_ 30#define _MACHINE_CPUFUNC_H_ 31 32#ifdef _KERNEL 33 34#include <sys/types.h> 35#include <machine/ia64_cpu.h> 36#include <machine/vmparam.h> 37 38struct thread; 39 40#ifdef __GNUC__ 41 42static __inline void 43breakpoint(void) 44{ 45 __asm __volatile("break 0x80100"); /* XXX use linux value */ 46} 47 48#endif 49 50extern u_int64_t ia64_port_base; 51 52static __inline volatile void * 53ia64_port_address(u_int port) 54{ 55 return (volatile void *)(ia64_port_base 56 | ((port >> 2) << 12) 57 | (port & ((1 << 12) - 1))); 58} 59 60static __inline volatile void * 61ia64_memory_address(u_int64_t addr) 62{ 63 return (volatile void *) IA64_PHYS_TO_RR6(addr); 64} 65 66static __inline u_int8_t 67inb(u_int port) 68{ 69 volatile u_int8_t *p = ia64_port_address(port); 70 u_int8_t v = *p; 71 ia64_mf(); 72 return v; 73} 74 75static __inline u_int16_t 76inw(u_int port) 77{ 78 volatile u_int16_t *p = ia64_port_address(port); 79 u_int16_t v = *p; 80 ia64_mf(); 81 return v; 82} 83 84static __inline u_int32_t 85inl(u_int port) 86{ 87 volatile u_int32_t *p = ia64_port_address(port); 88 u_int32_t v = *p; 89 ia64_mf(); 90 return v; 91} 92 93static __inline void 94insb(u_int port, void *addr, size_t count) 95{ 96 u_int8_t *p = addr; 97 while (count--) 98 *p++ = inb(port); 99} 100 101static __inline void 102insw(u_int port, void *addr, size_t count) 103{ 104 u_int16_t *p = addr; 105 while (count--) 106 *p++ = inw(port); 107} 108 109static __inline void 110insl(u_int port, void *addr, size_t count) 111{ 112 u_int32_t *p = addr; 113 while (count--) 114 *p++ = inl(port); 115} 116 117static __inline void 118outb(u_int port, u_int8_t data) 119{ 120 volatile u_int8_t *p = ia64_port_address(port); 121 *p = data; 122 ia64_mf(); 123} 124 125static __inline void 126outw(u_int port, u_int16_t data) 127{ 128 volatile u_int16_t *p = ia64_port_address(port); 129 *p = data; 130 ia64_mf(); 131} 132 133static __inline void 134outl(u_int port, u_int32_t data) 135{ 136 volatile u_int32_t *p = ia64_port_address(port); 137 *p = data; 138 ia64_mf(); 139} 140 141static __inline void 142outsb(u_int port, const void *addr, size_t count) 143{ 144 const u_int8_t *p = addr; 145 while (count--) 146 outb(port, *p++); 147} 148 149static __inline void 150outsw(u_int port, const void *addr, size_t count) 151{ 152 const u_int16_t *p = addr; 153 while (count--) 154 outw(port, *p++); 155} 156 157static __inline void 158outsl(u_int port, const void *addr, size_t count) 159{ 160 const u_int32_t *p = addr; 161 while (count--) 162 outl(port, *p++); 163} 164 165static __inline u_int8_t 166readb(u_int addr) 167{ 168 volatile u_int8_t *p = ia64_memory_address(addr); 169 u_int8_t v = *p; 170 ia64_mf(); 171 return v; 172} 173 174static __inline u_int16_t 175readw(u_int addr) 176{ 177 volatile u_int16_t *p = ia64_memory_address(addr); 178 u_int16_t v = *p; 179 ia64_mf(); 180 return v; 181} 182 183static __inline u_int32_t 184readl(u_int addr) 185{ 186 volatile u_int32_t *p = ia64_memory_address(addr); 187 u_int32_t v = *p; 188 ia64_mf(); 189 return v; 190} 191 192static __inline void 193writeb(u_int addr, u_int8_t data) 194{ 195 volatile u_int8_t *p = ia64_memory_address(addr); 196 *p = data; 197 ia64_mf(); 198} 199 200static __inline void 201writew(u_int addr, u_int16_t data) 202{ 203 volatile u_int16_t *p = ia64_memory_address(addr); 204 *p = data; 205 ia64_mf(); 206} 207 208static __inline void 209writel(u_int addr, u_int32_t data) 210{ 211 volatile u_int32_t *p = ia64_memory_address(addr); 212 *p = data; 213 ia64_mf(); 214} 215 216static __inline void 217memcpy_fromio(u_int8_t *addr, size_t ofs, size_t count) 218{ 219 volatile u_int8_t *p = ia64_memory_address(ofs); 220 while (count--) 221 *addr++ = *p++; 222} 223 224static __inline void 225memcpy_io(size_t dst, size_t src, size_t count) 226{ 227 volatile u_int8_t *dp = ia64_memory_address(dst); 228 volatile u_int8_t *sp = ia64_memory_address(src); 229 while (count--) 230 *dp++ = *sp++; 231} 232 233static __inline void 234memcpy_toio(size_t ofs, u_int8_t *addr, size_t count) 235{ 236 volatile u_int8_t *p = ia64_memory_address(ofs); 237 while (count--) 238 *p++ = *addr++; 239} 240 241static __inline void 242memset_io(size_t ofs, u_int8_t value, size_t count) 243{ 244 volatile u_int8_t *p = ia64_memory_address(ofs); 245 while (count--) 246 *p++ = value; 247} 248 249static __inline void 250memsetw(u_int16_t *addr, int val, size_t size) 251{ 252 while (size--) 253 *addr++ = val; 254} 255 256static __inline void 257memsetw_io(size_t ofs, u_int16_t value, size_t count) 258{ 259 volatile u_int16_t *p = ia64_memory_address(ofs); 260 while (count--) 261 *p++ = value; 262} 263 264static __inline void 265disable_intr(void) 266{ 267 __asm __volatile ("rsm psr.i;;"); 268} 269 270static __inline void 271enable_intr(void) 272{ 273 __asm __volatile (";; ssm psr.i;; srlz.d"); 274} 275 276static __inline register_t 277intr_disable(void) 278{ 279 register_t psr; 280 281 __asm __volatile ("mov %0=psr;;" : "=r" (psr)); 282 disable_intr(); 283 return (psr); 284} 285 286static __inline void 287intr_restore(critical_t psr) 288{ 289 __asm __volatile ("mov psr.l=%0;; srlz.d" :: "r" (psr)); 290} 291 292#endif /* _KERNEL */ 293 294#endif /* !_MACHINE_CPUFUNC_H_ */ 295