cpufunc.h revision 143063
1100936Snectar/*-
2100936Snectar * Copyright (c) 1998 Doug Rabson
3100936Snectar * All rights reserved.
4100936Snectar *
5100936Snectar * Redistribution and use in source and binary forms, with or without
6100936Snectar * modification, are permitted provided that the following conditions
7100936Snectar * are met:
8100936Snectar * 1. Redistributions of source code must retain the above copyright
9100936Snectar *    notice, this list of conditions and the following disclaimer.
10100936Snectar * 2. Redistributions in binary form must reproduce the above copyright
11100936Snectar *    notice, this list of conditions and the following disclaimer in the
12100936Snectar *    documentation and/or other materials provided with the distribution.
13100936Snectar *
14100936Snectar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15100936Snectar * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16100936Snectar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17100936Snectar * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18100936Snectar * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19100936Snectar * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20100936Snectar * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21100936Snectar * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22100936Snectar * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23100936Snectar * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24100936Snectar * SUCH DAMAGE.
25100936Snectar *
26290207Sjkim * $FreeBSD: head/sys/ia64/include/cpufunc.h 143063 2005-03-02 21:33:29Z joerg $
27100936Snectar */
28100936Snectar
29100936Snectar#ifndef _MACHINE_CPUFUNC_H_
30100936Snectar#define _MACHINE_CPUFUNC_H_
31100936Snectar
32100936Snectar#ifdef _KERNEL
33100936Snectar
34100936Snectar#include <sys/types.h>
35100936Snectar#include <machine/ia64_cpu.h>
36100936Snectar#include <machine/vmparam.h>
37100936Snectar
38100936Snectar#ifndef _SYS_CDEFS_H_
39100936Snectar#error this file needs sys/cdefs.h as a prerequisite
40100936Snectar#endif
41100936Snectar
42100936Snectarstruct thread;
43100936Snectar
44100936Snectar#define	IA64_FIXED_BREAK	0x84B5D
45261037Sjkim
46100936Snectar#ifdef __GNUCLIKE_ASM
47100936Snectar
48100936Snectarstatic __inline void
49100936Snectarbreakpoint(void)
50100936Snectar{
51261037Sjkim	__asm __volatile("break.m %0" :: "i"(IA64_FIXED_BREAK));
52261037Sjkim}
53261037Sjkim
54261037Sjkim#define	HAVE_INLINE_FFS
55261037Sjkim#define	ffs(x)	__builtin_ffs(x)
56100936Snectar
57100936Snectarextern uint64_t ia64_port_base;
58100936Snectar#define	__MEMIO_ADDR(x)		(__volatile void*)(IA64_PHYS_TO_RR6(x))
59100936Snectar#define	__PIO_ADDR(x)		(__volatile void*)(ia64_port_base |	\
60100936Snectar	(((x) & 0xFFFC) << 10) | ((x) & 0xFFF))
61100936Snectar
62100936Snectar/*
63100936Snectar * I/O port reads with ia32 semantics.
64100936Snectar */
65100936Snectarstatic __inline uint8_t
66100936Snectarinb(unsigned int port)
67100936Snectar{
68100936Snectar	__volatile uint8_t *p;
69100936Snectar	uint8_t v;
70100936Snectar	p = __PIO_ADDR(port);
71100936Snectar	ia64_mf();
72100936Snectar	v = *p;
73	ia64_mf_a();
74	ia64_mf();
75	return (v);
76}
77
78static __inline uint16_t
79inw(unsigned int port)
80{
81	__volatile uint16_t *p;
82	uint16_t v;
83	p = __PIO_ADDR(port);
84	ia64_mf();
85	v = *p;
86	ia64_mf_a();
87	ia64_mf();
88	return (v);
89}
90
91static __inline uint32_t
92inl(unsigned int port)
93{
94	volatile uint32_t *p;
95	uint32_t v;
96	p = __PIO_ADDR(port);
97	ia64_mf();
98	v = *p;
99	ia64_mf_a();
100	ia64_mf();
101	return (v);
102}
103
104static __inline void
105insb(unsigned int port, void *addr, size_t count)
106{
107	uint8_t *buf = addr;
108	while (count--)
109		*buf++ = inb(port);
110}
111
112static __inline void
113insw(unsigned int port, void *addr, size_t count)
114{
115	uint16_t *buf = addr;
116	while (count--)
117		*buf++ = inw(port);
118}
119
120static __inline void
121insl(unsigned int port, void *addr, size_t count)
122{
123	uint32_t *buf = addr;
124	while (count--)
125		*buf++ = inl(port);
126}
127
128static __inline void
129outb(unsigned int port, uint8_t data)
130{
131	volatile uint8_t *p;
132	p = __PIO_ADDR(port);
133	ia64_mf();
134	*p = data;
135	ia64_mf_a();
136	ia64_mf();
137}
138
139static __inline void
140outw(unsigned int port, uint16_t data)
141{
142	volatile uint16_t *p;
143	p = __PIO_ADDR(port);
144	ia64_mf();
145	*p = data;
146	ia64_mf_a();
147	ia64_mf();
148}
149
150static __inline void
151outl(unsigned int port, uint32_t data)
152{
153	volatile uint32_t *p;
154	p = __PIO_ADDR(port);
155	ia64_mf();
156	*p = data;
157	ia64_mf_a();
158	ia64_mf();
159}
160
161static __inline void
162outsb(unsigned int port, const void *addr, size_t count)
163{
164	const uint8_t *buf = addr;
165	while (count--)
166		outb(port, *buf++);
167}
168
169static __inline void
170outsw(unsigned int port, const void *addr, size_t count)
171{
172	const uint16_t *buf = addr;
173	while (count--)
174		outw(port, *buf++);
175}
176
177static __inline void
178outsl(unsigned int port, const void *addr, size_t count)
179{
180	const uint32_t *buf = addr;
181	while (count--)
182		outl(port, *buf++);
183}
184
185static __inline void
186disable_intr(void)
187{
188	__asm __volatile ("rsm psr.i");
189}
190
191static __inline void
192enable_intr(void)
193{
194	__asm __volatile ("ssm psr.i;; srlz.d");
195}
196
197static __inline register_t
198intr_disable(void)
199{
200	register_t psr;
201	__asm __volatile ("mov %0=psr;;" : "=r"(psr));
202	disable_intr();
203	return ((psr & IA64_PSR_I) ? 1 : 0);
204}
205
206static __inline void
207intr_restore(register_t ie)
208{
209	if (ie)
210		enable_intr();
211}
212
213#endif /* __GNUCLIKE_ASM */
214
215#endif /* _KERNEL */
216
217#endif /* !_MACHINE_CPUFUNC_H_ */
218