1279377Simp/* 2279377Simp * Copyright (c) 2013 MundoReader S.L. 3279377Simp * Author: Heiko Stuebner <heiko@sntech.de> 4279377Simp * 5279377Simp * This program is free software; you can redistribute it and/or modify 6279377Simp * it under the terms of the GNU General Public License as published by 7279377Simp * the Free Software Foundation; either version 2 of the License, or 8279377Simp * (at your option) any later version. 9279377Simp * 10279377Simp * This program is distributed in the hope that it will be useful, 11279377Simp * but WITHOUT ANY WARRANTY; without even the implied warranty of 12279377Simp * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13279377Simp * GNU General Public License for more details. 14279377Simp */ 15279377Simp 16279377Simp#include <dt-bindings/gpio/gpio.h> 17279377Simp#include <dt-bindings/pinctrl/rockchip.h> 18279377Simp#include <dt-bindings/clock/rk3188-cru.h> 19279377Simp#include "rk3xxx.dtsi" 20279377Simp 21279377Simp/ { 22279377Simp compatible = "rockchip,rk3188"; 23279377Simp 24279377Simp cpus { 25279377Simp #address-cells = <1>; 26279377Simp #size-cells = <0>; 27279377Simp enable-method = "rockchip,rk3066-smp"; 28279377Simp 29279377Simp cpu0: cpu@0 { 30279377Simp device_type = "cpu"; 31279377Simp compatible = "arm,cortex-a9"; 32279377Simp next-level-cache = <&L2>; 33279377Simp reg = <0x0>; 34279377Simp operating-points = < 35279377Simp /* kHz uV */ 36279377Simp 1608000 1350000 37279377Simp 1416000 1250000 38279377Simp 1200000 1150000 39279377Simp 1008000 1075000 40279377Simp 816000 975000 41279377Simp 600000 950000 42279377Simp 504000 925000 43279377Simp 312000 875000 44279377Simp >; 45279377Simp clock-latency = <40000>; 46279377Simp clocks = <&cru ARMCLK>; 47279377Simp }; 48279377Simp cpu@1 { 49279377Simp device_type = "cpu"; 50279377Simp compatible = "arm,cortex-a9"; 51279377Simp next-level-cache = <&L2>; 52279377Simp reg = <0x1>; 53279377Simp }; 54279377Simp cpu@2 { 55279377Simp device_type = "cpu"; 56279377Simp compatible = "arm,cortex-a9"; 57279377Simp next-level-cache = <&L2>; 58279377Simp reg = <0x2>; 59279377Simp }; 60279377Simp cpu@3 { 61279377Simp device_type = "cpu"; 62279377Simp compatible = "arm,cortex-a9"; 63279377Simp next-level-cache = <&L2>; 64279377Simp reg = <0x3>; 65279377Simp }; 66279377Simp }; 67279377Simp 68279377Simp sram: sram@10080000 { 69279377Simp compatible = "mmio-sram"; 70279377Simp reg = <0x10080000 0x8000>; 71279377Simp #address-cells = <1>; 72279377Simp #size-cells = <1>; 73279377Simp ranges = <0 0x10080000 0x8000>; 74279377Simp 75279377Simp smp-sram@0 { 76279377Simp compatible = "rockchip,rk3066-smp-sram"; 77279377Simp reg = <0x0 0x50>; 78279377Simp }; 79279377Simp }; 80279377Simp 81279377Simp i2s0: i2s@1011a000 { 82279377Simp compatible = "rockchip,rk3188-i2s", "rockchip,rk3066-i2s"; 83279377Simp reg = <0x1011a000 0x2000>; 84279377Simp interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 85279377Simp #address-cells = <1>; 86279377Simp #size-cells = <0>; 87279377Simp pinctrl-names = "default"; 88279377Simp pinctrl-0 = <&i2s0_bus>; 89279377Simp dmas = <&dmac1_s 6>, <&dmac1_s 7>; 90279377Simp dma-names = "tx", "rx"; 91279377Simp clock-names = "i2s_hclk", "i2s_clk"; 92279377Simp clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; 93279377Simp status = "disabled"; 94279377Simp }; 95279377Simp 96279377Simp cru: clock-controller@20000000 { 97279377Simp compatible = "rockchip,rk3188-cru"; 98279377Simp reg = <0x20000000 0x1000>; 99279377Simp rockchip,grf = <&grf>; 100279377Simp 101279377Simp #clock-cells = <1>; 102279377Simp #reset-cells = <1>; 103279377Simp }; 104279377Simp 105279377Simp pinctrl: pinctrl { 106279377Simp compatible = "rockchip,rk3188-pinctrl"; 107279377Simp rockchip,grf = <&grf>; 108279377Simp rockchip,pmu = <&pmu>; 109279377Simp 110279377Simp #address-cells = <1>; 111279377Simp #size-cells = <1>; 112279377Simp ranges; 113279377Simp 114279377Simp gpio0: gpio0@2000a000 { 115279377Simp compatible = "rockchip,rk3188-gpio-bank0"; 116279377Simp reg = <0x2000a000 0x100>; 117279377Simp interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 118279377Simp clocks = <&cru PCLK_GPIO0>; 119279377Simp 120279377Simp gpio-controller; 121279377Simp #gpio-cells = <2>; 122279377Simp 123279377Simp interrupt-controller; 124279377Simp #interrupt-cells = <2>; 125279377Simp }; 126279377Simp 127279377Simp gpio1: gpio1@2003c000 { 128279377Simp compatible = "rockchip,gpio-bank"; 129279377Simp reg = <0x2003c000 0x100>; 130279377Simp interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 131279377Simp clocks = <&cru PCLK_GPIO1>; 132279377Simp 133279377Simp gpio-controller; 134279377Simp #gpio-cells = <2>; 135279377Simp 136279377Simp interrupt-controller; 137279377Simp #interrupt-cells = <2>; 138279377Simp }; 139279377Simp 140279377Simp gpio2: gpio2@2003e000 { 141279377Simp compatible = "rockchip,gpio-bank"; 142279377Simp reg = <0x2003e000 0x100>; 143279377Simp interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 144279377Simp clocks = <&cru PCLK_GPIO2>; 145279377Simp 146279377Simp gpio-controller; 147279377Simp #gpio-cells = <2>; 148279377Simp 149279377Simp interrupt-controller; 150279377Simp #interrupt-cells = <2>; 151279377Simp }; 152279377Simp 153279377Simp gpio3: gpio3@20080000 { 154279377Simp compatible = "rockchip,gpio-bank"; 155279377Simp reg = <0x20080000 0x100>; 156279377Simp interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 157279377Simp clocks = <&cru PCLK_GPIO3>; 158279377Simp 159279377Simp gpio-controller; 160279377Simp #gpio-cells = <2>; 161279377Simp 162279377Simp interrupt-controller; 163279377Simp #interrupt-cells = <2>; 164279377Simp }; 165279377Simp 166279377Simp pcfg_pull_up: pcfg_pull_up { 167279377Simp bias-pull-up; 168279377Simp }; 169279377Simp 170279377Simp pcfg_pull_down: pcfg_pull_down { 171279377Simp bias-pull-down; 172279377Simp }; 173279377Simp 174279377Simp pcfg_pull_none: pcfg_pull_none { 175279377Simp bias-disable; 176279377Simp }; 177279377Simp 178279377Simp emmc { 179279377Simp emmc_clk: emmc-clk { 180279377Simp rockchip,pins = <RK_GPIO0 24 RK_FUNC_2 &pcfg_pull_none>; 181279377Simp }; 182279377Simp 183279377Simp emmc_cmd: emmc-cmd { 184279377Simp rockchip,pins = <RK_GPIO0 26 RK_FUNC_2 &pcfg_pull_up>; 185279377Simp }; 186279377Simp 187279377Simp emmc_rst: emmc-rst { 188279377Simp rockchip,pins = <RK_GPIO0 27 RK_FUNC_2 &pcfg_pull_none>; 189279377Simp }; 190279377Simp 191279377Simp /* 192279377Simp * The data pins are shared between nandc and emmc and 193279377Simp * not accessible through pinctrl. Also they should've 194279377Simp * been already set correctly by firmware, as 195279377Simp * flash/emmc is the boot-device. 196279377Simp */ 197279377Simp }; 198279377Simp 199279377Simp emac { 200279377Simp emac_xfer: emac-xfer { 201279377Simp rockchip,pins = <RK_GPIO3 16 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */ 202279377Simp <RK_GPIO3 17 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */ 203279377Simp <RK_GPIO3 18 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */ 204279377Simp <RK_GPIO3 19 RK_FUNC_2 &pcfg_pull_none>, /* rxd0 */ 205279377Simp <RK_GPIO3 20 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */ 206279377Simp <RK_GPIO3 21 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */ 207279377Simp <RK_GPIO3 22 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */ 208279377Simp <RK_GPIO3 23 RK_FUNC_2 &pcfg_pull_none>; /* crs_dvalid */ 209279377Simp }; 210279377Simp 211279377Simp emac_mdio: emac-mdio { 212279377Simp rockchip,pins = <RK_GPIO3 24 RK_FUNC_2 &pcfg_pull_none>, 213279377Simp <RK_GPIO3 25 RK_FUNC_2 &pcfg_pull_none>; 214279377Simp }; 215279377Simp }; 216279377Simp 217279377Simp i2c0 { 218279377Simp i2c0_xfer: i2c0-xfer { 219279377Simp rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>, 220279377Simp <RK_GPIO1 25 RK_FUNC_1 &pcfg_pull_none>; 221279377Simp }; 222279377Simp }; 223279377Simp 224279377Simp i2c1 { 225279377Simp i2c1_xfer: i2c1-xfer { 226279377Simp rockchip,pins = <RK_GPIO1 26 RK_FUNC_1 &pcfg_pull_none>, 227279377Simp <RK_GPIO1 27 RK_FUNC_1 &pcfg_pull_none>; 228279377Simp }; 229279377Simp }; 230279377Simp 231279377Simp i2c2 { 232279377Simp i2c2_xfer: i2c2-xfer { 233279377Simp rockchip,pins = <RK_GPIO1 28 RK_FUNC_1 &pcfg_pull_none>, 234279377Simp <RK_GPIO1 29 RK_FUNC_1 &pcfg_pull_none>; 235279377Simp }; 236279377Simp }; 237279377Simp 238279377Simp i2c3 { 239279377Simp i2c3_xfer: i2c3-xfer { 240279377Simp rockchip,pins = <RK_GPIO3 14 RK_FUNC_2 &pcfg_pull_none>, 241279377Simp <RK_GPIO3 15 RK_FUNC_2 &pcfg_pull_none>; 242279377Simp }; 243279377Simp }; 244279377Simp 245279377Simp i2c4 { 246279377Simp i2c4_xfer: i2c4-xfer { 247279377Simp rockchip,pins = <RK_GPIO1 30 RK_FUNC_1 &pcfg_pull_none>, 248279377Simp <RK_GPIO1 31 RK_FUNC_1 &pcfg_pull_none>; 249279377Simp }; 250279377Simp }; 251279377Simp 252279377Simp pwm0 { 253279377Simp pwm0_out: pwm0-out { 254279377Simp rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_none>; 255279377Simp }; 256279377Simp }; 257279377Simp 258279377Simp pwm1 { 259279377Simp pwm1_out: pwm1-out { 260279377Simp rockchip,pins = <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_none>; 261279377Simp }; 262279377Simp }; 263279377Simp 264279377Simp pwm2 { 265279377Simp pwm2_out: pwm2-out { 266279377Simp rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_none>; 267279377Simp }; 268279377Simp }; 269279377Simp 270279377Simp pwm3 { 271279377Simp pwm3_out: pwm3-out { 272279377Simp rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_none>; 273279377Simp }; 274279377Simp }; 275279377Simp 276279377Simp spi0 { 277279377Simp spi0_clk: spi0-clk { 278279377Simp rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_up>; 279279377Simp }; 280279377Simp spi0_cs0: spi0-cs0 { 281279377Simp rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_up>; 282279377Simp }; 283279377Simp spi0_tx: spi0-tx { 284279377Simp rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_up>; 285279377Simp }; 286279377Simp spi0_rx: spi0-rx { 287279377Simp rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_up>; 288279377Simp }; 289279377Simp spi0_cs1: spi0-cs1 { 290279377Simp rockchip,pins = <RK_GPIO1 15 RK_FUNC_1 &pcfg_pull_up>; 291279377Simp }; 292279377Simp }; 293279377Simp 294279377Simp spi1 { 295279377Simp spi1_clk: spi1-clk { 296279377Simp rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_up>; 297279377Simp }; 298279377Simp spi1_cs0: spi1-cs0 { 299279377Simp rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_up>; 300279377Simp }; 301279377Simp spi1_rx: spi1-rx { 302279377Simp rockchip,pins = <RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_up>; 303279377Simp }; 304279377Simp spi1_tx: spi1-tx { 305279377Simp rockchip,pins = <RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_up>; 306279377Simp }; 307279377Simp spi1_cs1: spi1-cs1 { 308279377Simp rockchip,pins = <RK_GPIO1 14 RK_FUNC_2 &pcfg_pull_up>; 309279377Simp }; 310279377Simp }; 311279377Simp 312279377Simp uart0 { 313279377Simp uart0_xfer: uart0-xfer { 314279377Simp rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>, 315279377Simp <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>; 316279377Simp }; 317279377Simp 318279377Simp uart0_cts: uart0-cts { 319279377Simp rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_none>; 320279377Simp }; 321279377Simp 322279377Simp uart0_rts: uart0-rts { 323279377Simp rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_none>; 324279377Simp }; 325279377Simp }; 326279377Simp 327279377Simp uart1 { 328279377Simp uart1_xfer: uart1-xfer { 329279377Simp rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>, 330279377Simp <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>; 331279377Simp }; 332279377Simp 333279377Simp uart1_cts: uart1-cts { 334279377Simp rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_none>; 335279377Simp }; 336279377Simp 337279377Simp uart1_rts: uart1-rts { 338279377Simp rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_none>; 339279377Simp }; 340279377Simp }; 341279377Simp 342279377Simp uart2 { 343279377Simp uart2_xfer: uart2-xfer { 344279377Simp rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>, 345279377Simp <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>; 346279377Simp }; 347279377Simp /* no rts / cts for uart2 */ 348279377Simp }; 349279377Simp 350279377Simp uart3 { 351279377Simp uart3_xfer: uart3-xfer { 352279377Simp rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>, 353279377Simp <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>; 354279377Simp }; 355279377Simp 356279377Simp uart3_cts: uart3-cts { 357279377Simp rockchip,pins = <RK_GPIO1 12 RK_FUNC_1 &pcfg_pull_none>; 358279377Simp }; 359279377Simp 360279377Simp uart3_rts: uart3-rts { 361279377Simp rockchip,pins = <RK_GPIO1 13 RK_FUNC_1 &pcfg_pull_none>; 362279377Simp }; 363279377Simp }; 364279377Simp 365279377Simp sd0 { 366279377Simp sd0_clk: sd0-clk { 367279377Simp rockchip,pins = <RK_GPIO3 2 RK_FUNC_1 &pcfg_pull_none>; 368279377Simp }; 369279377Simp 370279377Simp sd0_cmd: sd0-cmd { 371279377Simp rockchip,pins = <RK_GPIO3 3 RK_FUNC_1 &pcfg_pull_none>; 372279377Simp }; 373279377Simp 374279377Simp sd0_cd: sd0-cd { 375279377Simp rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_none>; 376279377Simp }; 377279377Simp 378279377Simp sd0_wp: sd0-wp { 379279377Simp rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_none>; 380279377Simp }; 381279377Simp 382279377Simp sd0_pwr: sd0-pwr { 383279377Simp rockchip,pins = <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>; 384279377Simp }; 385279377Simp 386279377Simp sd0_bus1: sd0-bus-width1 { 387279377Simp rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>; 388279377Simp }; 389279377Simp 390279377Simp sd0_bus4: sd0-bus-width4 { 391279377Simp rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>, 392279377Simp <RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>, 393279377Simp <RK_GPIO3 6 RK_FUNC_1 &pcfg_pull_none>, 394279377Simp <RK_GPIO3 7 RK_FUNC_1 &pcfg_pull_none>; 395279377Simp }; 396279377Simp }; 397279377Simp 398279377Simp sd1 { 399279377Simp sd1_clk: sd1-clk { 400279377Simp rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_none>; 401279377Simp }; 402279377Simp 403279377Simp sd1_cmd: sd1-cmd { 404279377Simp rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_none>; 405279377Simp }; 406279377Simp 407279377Simp sd1_cd: sd1-cd { 408279377Simp rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_none>; 409279377Simp }; 410279377Simp 411279377Simp sd1_wp: sd1-wp { 412279377Simp rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_none>; 413279377Simp }; 414279377Simp 415279377Simp sd1_bus1: sd1-bus-width1 { 416279377Simp rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>; 417279377Simp }; 418279377Simp 419279377Simp sd1_bus4: sd1-bus-width4 { 420279377Simp rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>, 421279377Simp <RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_none>, 422279377Simp <RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_none>, 423279377Simp <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>; 424279377Simp }; 425279377Simp }; 426279377Simp 427279377Simp i2s0 { 428279377Simp i2s0_bus: i2s0-bus { 429279377Simp rockchip,pins = <RK_GPIO1 16 RK_FUNC_1 &pcfg_pull_none>, 430279377Simp <RK_GPIO1 17 RK_FUNC_1 &pcfg_pull_none>, 431279377Simp <RK_GPIO1 18 RK_FUNC_1 &pcfg_pull_none>, 432279377Simp <RK_GPIO1 19 RK_FUNC_1 &pcfg_pull_none>, 433279377Simp <RK_GPIO1 20 RK_FUNC_1 &pcfg_pull_none>, 434279377Simp <RK_GPIO1 21 RK_FUNC_1 &pcfg_pull_none>; 435279377Simp }; 436279377Simp }; 437279377Simp }; 438279377Simp}; 439279377Simp 440279377Simp&emac { 441279377Simp compatible = "rockchip,rk3188-emac"; 442279377Simp}; 443279377Simp 444279377Simp&global_timer { 445279377Simp interrupts = <GIC_PPI 11 0xf04>; 446279377Simp}; 447279377Simp 448279377Simp&local_timer { 449279377Simp interrupts = <GIC_PPI 13 0xf04>; 450279377Simp}; 451279377Simp 452279377Simp&i2c0 { 453279377Simp compatible = "rockchip,rk3188-i2c"; 454279377Simp pinctrl-names = "default"; 455279377Simp pinctrl-0 = <&i2c0_xfer>; 456279377Simp}; 457279377Simp 458279377Simp&i2c1 { 459279377Simp compatible = "rockchip,rk3188-i2c"; 460279377Simp pinctrl-names = "default"; 461279377Simp pinctrl-0 = <&i2c1_xfer>; 462279377Simp}; 463279377Simp 464279377Simp&i2c2 { 465279377Simp compatible = "rockchip,rk3188-i2c"; 466279377Simp pinctrl-names = "default"; 467279377Simp pinctrl-0 = <&i2c2_xfer>; 468279377Simp}; 469279377Simp 470279377Simp&i2c3 { 471279377Simp compatible = "rockchip,rk3188-i2c"; 472279377Simp pinctrl-names = "default"; 473279377Simp pinctrl-0 = <&i2c3_xfer>; 474279377Simp}; 475279377Simp 476279377Simp&i2c4 { 477279377Simp compatible = "rockchip,rk3188-i2c"; 478279377Simp pinctrl-names = "default"; 479279377Simp pinctrl-0 = <&i2c4_xfer>; 480279377Simp}; 481279377Simp 482279377Simp&pwm0 { 483279377Simp pinctrl-names = "default"; 484279377Simp pinctrl-0 = <&pwm0_out>; 485279377Simp}; 486279377Simp 487279377Simp&pwm1 { 488279377Simp pinctrl-names = "default"; 489279377Simp pinctrl-0 = <&pwm1_out>; 490279377Simp}; 491279377Simp 492279377Simp&pwm2 { 493279377Simp pinctrl-names = "default"; 494279377Simp pinctrl-0 = <&pwm2_out>; 495279377Simp}; 496279377Simp 497279377Simp&pwm3 { 498279377Simp pinctrl-names = "default"; 499279377Simp pinctrl-0 = <&pwm3_out>; 500279377Simp}; 501279377Simp 502279377Simp&spi0 { 503279377Simp compatible = "rockchip,rk3188-spi", "rockchip,rk3066-spi"; 504279377Simp pinctrl-names = "default"; 505279377Simp pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; 506279377Simp}; 507279377Simp 508279377Simp&spi1 { 509279377Simp compatible = "rockchip,rk3188-spi", "rockchip,rk3066-spi"; 510279377Simp pinctrl-names = "default"; 511279377Simp pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; 512279377Simp}; 513279377Simp 514279377Simp&uart0 { 515279377Simp pinctrl-names = "default"; 516279377Simp pinctrl-0 = <&uart0_xfer>; 517279377Simp}; 518279377Simp 519279377Simp&uart1 { 520279377Simp pinctrl-names = "default"; 521279377Simp pinctrl-0 = <&uart1_xfer>; 522279377Simp}; 523279377Simp 524279377Simp&uart2 { 525279377Simp pinctrl-names = "default"; 526279377Simp pinctrl-0 = <&uart2_xfer>; 527279377Simp}; 528279377Simp 529279377Simp&uart3 { 530279377Simp pinctrl-names = "default"; 531279377Simp pinctrl-0 = <&uart3_xfer>; 532279377Simp}; 533279377Simp 534279377Simp&wdt { 535279377Simp compatible = "rockchip,rk3188-wdt", "snps,dw-wdt"; 536279377Simp}; 537