1279377Simp/* 2279377Simp * SAMSUNG EXYNOS5250 SoC device tree source 3279377Simp * 4279377Simp * Copyright (c) 2012 Samsung Electronics Co., Ltd. 5279377Simp * http://www.samsung.com 6279377Simp * 7279377Simp * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file. 8279377Simp * EXYNOS5250 based board files can include this file and provide 9279377Simp * values for board specfic bindings. 10279377Simp * 11279377Simp * Note: This file does not include device nodes for all the controllers in 12279377Simp * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases, 13279377Simp * additional nodes can be added to this file. 14279377Simp * 15279377Simp * This program is free software; you can redistribute it and/or modify 16279377Simp * it under the terms of the GNU General Public License version 2 as 17279377Simp * published by the Free Software Foundation. 18279377Simp*/ 19279377Simp 20279377Simp#include <dt-bindings/clock/exynos5250.h> 21279377Simp#include "exynos5.dtsi" 22279377Simp#include "exynos5250-pinctrl.dtsi" 23279377Simp 24279377Simp#include <dt-bindings/clock/exynos-audss-clk.h> 25279377Simp 26279377Simp/ { 27279377Simp compatible = "samsung,exynos5250", "samsung,exynos5"; 28279377Simp 29279377Simp aliases { 30279377Simp spi0 = &spi_0; 31279377Simp spi1 = &spi_1; 32279377Simp spi2 = &spi_2; 33279377Simp gsc0 = &gsc_0; 34279377Simp gsc1 = &gsc_1; 35279377Simp gsc2 = &gsc_2; 36279377Simp gsc3 = &gsc_3; 37279377Simp mshc0 = &mmc_0; 38279377Simp mshc1 = &mmc_1; 39279377Simp mshc2 = &mmc_2; 40279377Simp mshc3 = &mmc_3; 41279377Simp i2c0 = &i2c_0; 42279377Simp i2c1 = &i2c_1; 43279377Simp i2c2 = &i2c_2; 44279377Simp i2c3 = &i2c_3; 45279377Simp i2c4 = &i2c_4; 46279377Simp i2c5 = &i2c_5; 47279377Simp i2c6 = &i2c_6; 48279377Simp i2c7 = &i2c_7; 49279377Simp i2c8 = &i2c_8; 50279377Simp i2c9 = &i2c_9; 51279377Simp pinctrl0 = &pinctrl_0; 52279377Simp pinctrl1 = &pinctrl_1; 53279377Simp pinctrl2 = &pinctrl_2; 54279377Simp pinctrl3 = &pinctrl_3; 55279377Simp }; 56279377Simp 57279377Simp cpus { 58279377Simp #address-cells = <1>; 59279377Simp #size-cells = <0>; 60279377Simp 61279377Simp cpu@0 { 62279377Simp device_type = "cpu"; 63279377Simp compatible = "arm,cortex-a15"; 64279377Simp reg = <0>; 65279377Simp clock-frequency = <1700000000>; 66279377Simp }; 67279377Simp cpu@1 { 68279377Simp device_type = "cpu"; 69279377Simp compatible = "arm,cortex-a15"; 70279377Simp reg = <1>; 71279377Simp clock-frequency = <1700000000>; 72279377Simp }; 73279377Simp }; 74279377Simp 75279377Simp sysram@02020000 { 76279377Simp compatible = "mmio-sram"; 77279377Simp reg = <0x02020000 0x30000>; 78279377Simp #address-cells = <1>; 79279377Simp #size-cells = <1>; 80279377Simp ranges = <0 0x02020000 0x30000>; 81279377Simp 82279377Simp smp-sysram@0 { 83279377Simp compatible = "samsung,exynos4210-sysram"; 84279377Simp reg = <0x0 0x1000>; 85279377Simp }; 86279377Simp 87279377Simp smp-sysram@2f000 { 88279377Simp compatible = "samsung,exynos4210-sysram-ns"; 89279377Simp reg = <0x2f000 0x1000>; 90279377Simp }; 91279377Simp }; 92279377Simp 93279377Simp pd_gsc: gsc-power-domain@10044000 { 94279377Simp compatible = "samsung,exynos4210-pd"; 95279377Simp reg = <0x10044000 0x20>; 96279377Simp #power-domain-cells = <0>; 97279377Simp }; 98279377Simp 99279377Simp pd_mfc: mfc-power-domain@10044040 { 100279377Simp compatible = "samsung,exynos4210-pd"; 101279377Simp reg = <0x10044040 0x20>; 102279377Simp #power-domain-cells = <0>; 103279377Simp }; 104279377Simp 105279377Simp clock: clock-controller@10010000 { 106279377Simp compatible = "samsung,exynos5250-clock"; 107279377Simp reg = <0x10010000 0x30000>; 108279377Simp #clock-cells = <1>; 109279377Simp }; 110279377Simp 111279377Simp clock_audss: audss-clock-controller@3810000 { 112279377Simp compatible = "samsung,exynos5250-audss-clock"; 113279377Simp reg = <0x03810000 0x0C>; 114279377Simp #clock-cells = <1>; 115279377Simp clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, 116279377Simp <&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>; 117279377Simp clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 118279377Simp }; 119279377Simp 120279377Simp timer { 121279377Simp compatible = "arm,armv7-timer"; 122279377Simp interrupts = <1 13 0xf08>, 123279377Simp <1 14 0xf08>, 124279377Simp <1 11 0xf08>, 125279377Simp <1 10 0xf08>; 126279377Simp /* Unfortunately we need this since some versions of U-Boot 127279377Simp * on Exynos don't set the CNTFRQ register, so we need the 128279377Simp * value from DT. 129279377Simp */ 130279377Simp clock-frequency = <24000000>; 131279377Simp }; 132279377Simp 133279377Simp mct@101C0000 { 134279377Simp compatible = "samsung,exynos4210-mct"; 135279377Simp reg = <0x101C0000 0x800>; 136279377Simp interrupt-controller; 137279377Simp #interrups-cells = <2>; 138279377Simp interrupt-parent = <&mct_map>; 139279377Simp interrupts = <0 0>, <1 0>, <2 0>, <3 0>, 140279377Simp <4 0>, <5 0>; 141279377Simp clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 142279377Simp clock-names = "fin_pll", "mct"; 143279377Simp 144279377Simp mct_map: mct-map { 145279377Simp #interrupt-cells = <2>; 146279377Simp #address-cells = <0>; 147279377Simp #size-cells = <0>; 148279377Simp interrupt-map = <0x0 0 &combiner 23 3>, 149279377Simp <0x1 0 &combiner 23 4>, 150279377Simp <0x2 0 &combiner 25 2>, 151279377Simp <0x3 0 &combiner 25 3>, 152279377Simp <0x4 0 &gic 0 120 0>, 153279377Simp <0x5 0 &gic 0 121 0>; 154279377Simp }; 155279377Simp }; 156279377Simp 157279377Simp pmu { 158279377Simp compatible = "arm,cortex-a15-pmu"; 159279377Simp interrupt-parent = <&combiner>; 160279377Simp interrupts = <1 2>, <22 4>; 161279377Simp }; 162279377Simp 163279377Simp pinctrl_0: pinctrl@11400000 { 164279377Simp compatible = "samsung,exynos5250-pinctrl"; 165279377Simp reg = <0x11400000 0x1000>; 166279377Simp interrupts = <0 46 0>; 167279377Simp 168279377Simp wakup_eint: wakeup-interrupt-controller { 169279377Simp compatible = "samsung,exynos4210-wakeup-eint"; 170279377Simp interrupt-parent = <&gic>; 171279377Simp interrupts = <0 32 0>; 172279377Simp }; 173279377Simp }; 174279377Simp 175279377Simp pinctrl_1: pinctrl@13400000 { 176279377Simp compatible = "samsung,exynos5250-pinctrl"; 177279377Simp reg = <0x13400000 0x1000>; 178279377Simp interrupts = <0 45 0>; 179279377Simp }; 180279377Simp 181279377Simp pinctrl_2: pinctrl@10d10000 { 182279377Simp compatible = "samsung,exynos5250-pinctrl"; 183279377Simp reg = <0x10d10000 0x1000>; 184279377Simp interrupts = <0 50 0>; 185279377Simp }; 186279377Simp 187279377Simp pinctrl_3: pinctrl@03860000 { 188279377Simp compatible = "samsung,exynos5250-pinctrl"; 189279377Simp reg = <0x03860000 0x1000>; 190279377Simp interrupts = <0 47 0>; 191279377Simp }; 192279377Simp 193279377Simp pmu_system_controller: system-controller@10040000 { 194279377Simp compatible = "samsung,exynos5250-pmu", "syscon"; 195279377Simp reg = <0x10040000 0x5000>; 196279377Simp clock-names = "clkout16"; 197279377Simp clocks = <&clock CLK_FIN_PLL>; 198279377Simp #clock-cells = <1>; 199279377Simp }; 200279377Simp 201279377Simp sysreg_system_controller: syscon@10050000 { 202279377Simp compatible = "samsung,exynos5-sysreg", "syscon"; 203279377Simp reg = <0x10050000 0x5000>; 204279377Simp }; 205279377Simp 206279377Simp watchdog@101D0000 { 207279377Simp compatible = "samsung,exynos5250-wdt"; 208279377Simp reg = <0x101D0000 0x100>; 209279377Simp interrupts = <0 42 0>; 210279377Simp clocks = <&clock CLK_WDT>; 211279377Simp clock-names = "watchdog"; 212279377Simp samsung,syscon-phandle = <&pmu_system_controller>; 213279377Simp }; 214279377Simp 215279377Simp g2d@10850000 { 216279377Simp compatible = "samsung,exynos5250-g2d"; 217279377Simp reg = <0x10850000 0x1000>; 218279377Simp interrupts = <0 91 0>; 219279377Simp clocks = <&clock CLK_G2D>; 220279377Simp clock-names = "fimg2d"; 221279377Simp }; 222279377Simp 223279377Simp mfc: codec@11000000 { 224279377Simp compatible = "samsung,mfc-v6"; 225279377Simp reg = <0x11000000 0x10000>; 226279377Simp interrupts = <0 96 0>; 227279377Simp power-domains = <&pd_mfc>; 228279377Simp clocks = <&clock CLK_MFC>; 229279377Simp clock-names = "mfc"; 230279377Simp }; 231279377Simp 232279377Simp rtc: rtc@101E0000 { 233279377Simp clocks = <&clock CLK_RTC>; 234279377Simp clock-names = "rtc"; 235279377Simp status = "disabled"; 236279377Simp }; 237279377Simp 238279377Simp tmu@10060000 { 239279377Simp compatible = "samsung,exynos5250-tmu"; 240279377Simp reg = <0x10060000 0x100>; 241279377Simp interrupts = <0 65 0>; 242279377Simp clocks = <&clock CLK_TMU>; 243279377Simp clock-names = "tmu_apbif"; 244279377Simp }; 245279377Simp 246279377Simp serial@12C00000 { 247279377Simp clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; 248279377Simp clock-names = "uart", "clk_uart_baud0"; 249279377Simp }; 250279377Simp 251279377Simp serial@12C10000 { 252279377Simp clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; 253279377Simp clock-names = "uart", "clk_uart_baud0"; 254279377Simp }; 255279377Simp 256279377Simp serial@12C20000 { 257279377Simp clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; 258279377Simp clock-names = "uart", "clk_uart_baud0"; 259279377Simp }; 260279377Simp 261279377Simp serial@12C30000 { 262279377Simp clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; 263279377Simp clock-names = "uart", "clk_uart_baud0"; 264279377Simp }; 265279377Simp 266279377Simp sata: sata@122F0000 { 267279377Simp compatible = "snps,dwc-ahci"; 268279377Simp samsung,sata-freq = <66>; 269279377Simp reg = <0x122F0000 0x1ff>; 270279377Simp interrupts = <0 115 0>; 271279377Simp clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>; 272279377Simp clock-names = "sata", "sclk_sata"; 273279377Simp phys = <&sata_phy>; 274279377Simp phy-names = "sata-phy"; 275279377Simp status = "disabled"; 276279377Simp }; 277279377Simp 278279377Simp sata_phy: sata-phy@12170000 { 279279377Simp compatible = "samsung,exynos5250-sata-phy"; 280279377Simp reg = <0x12170000 0x1ff>; 281279377Simp clocks = <&clock CLK_SATA_PHYCTRL>; 282279377Simp clock-names = "sata_phyctrl"; 283279377Simp #phy-cells = <0>; 284279377Simp samsung,syscon-phandle = <&pmu_system_controller>; 285279377Simp status = "disabled"; 286279377Simp }; 287279377Simp 288279377Simp i2c_0: i2c@12C60000 { 289279377Simp compatible = "samsung,s3c2440-i2c"; 290279377Simp reg = <0x12C60000 0x100>; 291279377Simp interrupts = <0 56 0>; 292279377Simp #address-cells = <1>; 293279377Simp #size-cells = <0>; 294279377Simp clocks = <&clock CLK_I2C0>; 295279377Simp clock-names = "i2c"; 296279377Simp pinctrl-names = "default"; 297279377Simp pinctrl-0 = <&i2c0_bus>; 298279377Simp samsung,sysreg-phandle = <&sysreg_system_controller>; 299279377Simp status = "disabled"; 300279377Simp }; 301279377Simp 302279377Simp i2c_1: i2c@12C70000 { 303279377Simp compatible = "samsung,s3c2440-i2c"; 304279377Simp reg = <0x12C70000 0x100>; 305279377Simp interrupts = <0 57 0>; 306279377Simp #address-cells = <1>; 307279377Simp #size-cells = <0>; 308279377Simp clocks = <&clock CLK_I2C1>; 309279377Simp clock-names = "i2c"; 310279377Simp pinctrl-names = "default"; 311279377Simp pinctrl-0 = <&i2c1_bus>; 312279377Simp samsung,sysreg-phandle = <&sysreg_system_controller>; 313279377Simp status = "disabled"; 314279377Simp }; 315279377Simp 316279377Simp i2c_2: i2c@12C80000 { 317279377Simp compatible = "samsung,s3c2440-i2c"; 318279377Simp reg = <0x12C80000 0x100>; 319279377Simp interrupts = <0 58 0>; 320279377Simp #address-cells = <1>; 321279377Simp #size-cells = <0>; 322279377Simp clocks = <&clock CLK_I2C2>; 323279377Simp clock-names = "i2c"; 324279377Simp pinctrl-names = "default"; 325279377Simp pinctrl-0 = <&i2c2_bus>; 326279377Simp samsung,sysreg-phandle = <&sysreg_system_controller>; 327279377Simp status = "disabled"; 328279377Simp }; 329279377Simp 330279377Simp i2c_3: i2c@12C90000 { 331279377Simp compatible = "samsung,s3c2440-i2c"; 332279377Simp reg = <0x12C90000 0x100>; 333279377Simp interrupts = <0 59 0>; 334279377Simp #address-cells = <1>; 335279377Simp #size-cells = <0>; 336279377Simp clocks = <&clock CLK_I2C3>; 337279377Simp clock-names = "i2c"; 338279377Simp pinctrl-names = "default"; 339279377Simp pinctrl-0 = <&i2c3_bus>; 340279377Simp samsung,sysreg-phandle = <&sysreg_system_controller>; 341279377Simp status = "disabled"; 342279377Simp }; 343279377Simp 344279377Simp i2c_4: i2c@12CA0000 { 345279377Simp compatible = "samsung,s3c2440-i2c"; 346279377Simp reg = <0x12CA0000 0x100>; 347279377Simp interrupts = <0 60 0>; 348279377Simp #address-cells = <1>; 349279377Simp #size-cells = <0>; 350279377Simp clocks = <&clock CLK_I2C4>; 351279377Simp clock-names = "i2c"; 352279377Simp pinctrl-names = "default"; 353279377Simp pinctrl-0 = <&i2c4_bus>; 354279377Simp status = "disabled"; 355279377Simp }; 356279377Simp 357279377Simp i2c_5: i2c@12CB0000 { 358279377Simp compatible = "samsung,s3c2440-i2c"; 359279377Simp reg = <0x12CB0000 0x100>; 360279377Simp interrupts = <0 61 0>; 361279377Simp #address-cells = <1>; 362279377Simp #size-cells = <0>; 363279377Simp clocks = <&clock CLK_I2C5>; 364279377Simp clock-names = "i2c"; 365279377Simp pinctrl-names = "default"; 366279377Simp pinctrl-0 = <&i2c5_bus>; 367279377Simp status = "disabled"; 368279377Simp }; 369279377Simp 370279377Simp i2c_6: i2c@12CC0000 { 371279377Simp compatible = "samsung,s3c2440-i2c"; 372279377Simp reg = <0x12CC0000 0x100>; 373279377Simp interrupts = <0 62 0>; 374279377Simp #address-cells = <1>; 375279377Simp #size-cells = <0>; 376279377Simp clocks = <&clock CLK_I2C6>; 377279377Simp clock-names = "i2c"; 378279377Simp pinctrl-names = "default"; 379279377Simp pinctrl-0 = <&i2c6_bus>; 380279377Simp status = "disabled"; 381279377Simp }; 382279377Simp 383279377Simp i2c_7: i2c@12CD0000 { 384279377Simp compatible = "samsung,s3c2440-i2c"; 385279377Simp reg = <0x12CD0000 0x100>; 386279377Simp interrupts = <0 63 0>; 387279377Simp #address-cells = <1>; 388279377Simp #size-cells = <0>; 389279377Simp clocks = <&clock CLK_I2C7>; 390279377Simp clock-names = "i2c"; 391279377Simp pinctrl-names = "default"; 392279377Simp pinctrl-0 = <&i2c7_bus>; 393279377Simp status = "disabled"; 394279377Simp }; 395279377Simp 396279377Simp i2c_8: i2c@12CE0000 { 397279377Simp compatible = "samsung,s3c2440-hdmiphy-i2c"; 398279377Simp reg = <0x12CE0000 0x1000>; 399279377Simp interrupts = <0 64 0>; 400279377Simp #address-cells = <1>; 401279377Simp #size-cells = <0>; 402279377Simp clocks = <&clock CLK_I2C_HDMI>; 403279377Simp clock-names = "i2c"; 404279377Simp status = "disabled"; 405279377Simp }; 406279377Simp 407279377Simp i2c_9: i2c@121D0000 { 408279377Simp compatible = "samsung,exynos5-sata-phy-i2c"; 409279377Simp reg = <0x121D0000 0x100>; 410279377Simp #address-cells = <1>; 411279377Simp #size-cells = <0>; 412279377Simp clocks = <&clock CLK_SATA_PHYI2C>; 413279377Simp clock-names = "i2c"; 414279377Simp status = "disabled"; 415279377Simp }; 416279377Simp 417279377Simp spi_0: spi@12d20000 { 418279377Simp compatible = "samsung,exynos4210-spi"; 419279377Simp status = "disabled"; 420279377Simp reg = <0x12d20000 0x100>; 421279377Simp interrupts = <0 66 0>; 422279377Simp dmas = <&pdma0 5 423279377Simp &pdma0 4>; 424279377Simp dma-names = "tx", "rx"; 425279377Simp #address-cells = <1>; 426279377Simp #size-cells = <0>; 427279377Simp clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; 428279377Simp clock-names = "spi", "spi_busclk0"; 429279377Simp pinctrl-names = "default"; 430279377Simp pinctrl-0 = <&spi0_bus>; 431279377Simp }; 432279377Simp 433279377Simp spi_1: spi@12d30000 { 434279377Simp compatible = "samsung,exynos4210-spi"; 435279377Simp status = "disabled"; 436279377Simp reg = <0x12d30000 0x100>; 437279377Simp interrupts = <0 67 0>; 438279377Simp dmas = <&pdma1 5 439279377Simp &pdma1 4>; 440279377Simp dma-names = "tx", "rx"; 441279377Simp #address-cells = <1>; 442279377Simp #size-cells = <0>; 443279377Simp clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; 444279377Simp clock-names = "spi", "spi_busclk0"; 445279377Simp pinctrl-names = "default"; 446279377Simp pinctrl-0 = <&spi1_bus>; 447279377Simp }; 448279377Simp 449279377Simp spi_2: spi@12d40000 { 450279377Simp compatible = "samsung,exynos4210-spi"; 451279377Simp status = "disabled"; 452279377Simp reg = <0x12d40000 0x100>; 453279377Simp interrupts = <0 68 0>; 454279377Simp dmas = <&pdma0 7 455279377Simp &pdma0 6>; 456279377Simp dma-names = "tx", "rx"; 457279377Simp #address-cells = <1>; 458279377Simp #size-cells = <0>; 459279377Simp clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; 460279377Simp clock-names = "spi", "spi_busclk0"; 461279377Simp pinctrl-names = "default"; 462279377Simp pinctrl-0 = <&spi2_bus>; 463279377Simp }; 464279377Simp 465279377Simp mmc_0: mmc@12200000 { 466279377Simp compatible = "samsung,exynos5250-dw-mshc"; 467279377Simp interrupts = <0 75 0>; 468279377Simp #address-cells = <1>; 469279377Simp #size-cells = <0>; 470279377Simp reg = <0x12200000 0x1000>; 471279377Simp clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; 472279377Simp clock-names = "biu", "ciu"; 473279377Simp fifo-depth = <0x80>; 474279377Simp status = "disabled"; 475279377Simp }; 476279377Simp 477279377Simp mmc_1: mmc@12210000 { 478279377Simp compatible = "samsung,exynos5250-dw-mshc"; 479279377Simp interrupts = <0 76 0>; 480279377Simp #address-cells = <1>; 481279377Simp #size-cells = <0>; 482279377Simp reg = <0x12210000 0x1000>; 483279377Simp clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; 484279377Simp clock-names = "biu", "ciu"; 485279377Simp fifo-depth = <0x80>; 486279377Simp status = "disabled"; 487279377Simp }; 488279377Simp 489279377Simp mmc_2: mmc@12220000 { 490279377Simp compatible = "samsung,exynos5250-dw-mshc"; 491279377Simp interrupts = <0 77 0>; 492279377Simp #address-cells = <1>; 493279377Simp #size-cells = <0>; 494279377Simp reg = <0x12220000 0x1000>; 495279377Simp clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; 496279377Simp clock-names = "biu", "ciu"; 497279377Simp fifo-depth = <0x80>; 498279377Simp status = "disabled"; 499279377Simp }; 500279377Simp 501279377Simp mmc_3: mmc@12230000 { 502279377Simp compatible = "samsung,exynos5250-dw-mshc"; 503279377Simp reg = <0x12230000 0x1000>; 504279377Simp interrupts = <0 78 0>; 505279377Simp #address-cells = <1>; 506279377Simp #size-cells = <0>; 507279377Simp clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; 508279377Simp clock-names = "biu", "ciu"; 509279377Simp fifo-depth = <0x80>; 510279377Simp status = "disabled"; 511279377Simp }; 512279377Simp 513279377Simp i2s0: i2s@03830000 { 514279377Simp compatible = "samsung,s5pv210-i2s"; 515279377Simp status = "disabled"; 516279377Simp reg = <0x03830000 0x100>; 517279377Simp dmas = <&pdma0 10 518279377Simp &pdma0 9 519279377Simp &pdma0 8>; 520279377Simp dma-names = "tx", "rx", "tx-sec"; 521279377Simp clocks = <&clock_audss EXYNOS_I2S_BUS>, 522279377Simp <&clock_audss EXYNOS_I2S_BUS>, 523279377Simp <&clock_audss EXYNOS_SCLK_I2S>; 524279377Simp clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; 525279377Simp samsung,idma-addr = <0x03000000>; 526279377Simp pinctrl-names = "default"; 527279377Simp pinctrl-0 = <&i2s0_bus>; 528279377Simp }; 529279377Simp 530279377Simp i2s1: i2s@12D60000 { 531279377Simp compatible = "samsung,s3c6410-i2s"; 532279377Simp status = "disabled"; 533279377Simp reg = <0x12D60000 0x100>; 534279377Simp dmas = <&pdma1 12 535279377Simp &pdma1 11>; 536279377Simp dma-names = "tx", "rx"; 537279377Simp clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>; 538279377Simp clock-names = "iis", "i2s_opclk0"; 539279377Simp pinctrl-names = "default"; 540279377Simp pinctrl-0 = <&i2s1_bus>; 541279377Simp }; 542279377Simp 543279377Simp i2s2: i2s@12D70000 { 544279377Simp compatible = "samsung,s3c6410-i2s"; 545279377Simp status = "disabled"; 546279377Simp reg = <0x12D70000 0x100>; 547279377Simp dmas = <&pdma0 12 548279377Simp &pdma0 11>; 549279377Simp dma-names = "tx", "rx"; 550279377Simp clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>; 551279377Simp clock-names = "iis", "i2s_opclk0"; 552279377Simp pinctrl-names = "default"; 553279377Simp pinctrl-0 = <&i2s2_bus>; 554279377Simp }; 555279377Simp 556279377Simp usb@12000000 { 557279377Simp compatible = "samsung,exynos5250-dwusb3"; 558279377Simp clocks = <&clock CLK_USB3>; 559279377Simp clock-names = "usbdrd30"; 560279377Simp #address-cells = <1>; 561279377Simp #size-cells = <1>; 562279377Simp ranges; 563279377Simp 564279377Simp usbdrd_dwc3: dwc3 { 565279377Simp compatible = "synopsys,dwc3"; 566279377Simp reg = <0x12000000 0x10000>; 567279377Simp interrupts = <0 72 0>; 568279377Simp phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>; 569279377Simp phy-names = "usb2-phy", "usb3-phy"; 570279377Simp }; 571279377Simp }; 572279377Simp 573279377Simp usbdrd_phy: phy@12100000 { 574279377Simp compatible = "samsung,exynos5250-usbdrd-phy"; 575279377Simp reg = <0x12100000 0x100>; 576279377Simp clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>; 577279377Simp clock-names = "phy", "ref"; 578279377Simp samsung,pmu-syscon = <&pmu_system_controller>; 579279377Simp #phy-cells = <1>; 580279377Simp }; 581279377Simp 582279377Simp ehci: usb@12110000 { 583279377Simp compatible = "samsung,exynos4210-ehci"; 584279377Simp reg = <0x12110000 0x100>; 585279377Simp interrupts = <0 71 0>; 586279377Simp 587279377Simp clocks = <&clock CLK_USB2>; 588279377Simp clock-names = "usbhost"; 589279377Simp #address-cells = <1>; 590279377Simp #size-cells = <0>; 591279377Simp port@0 { 592279377Simp reg = <0>; 593279377Simp phys = <&usb2_phy_gen 1>; 594279377Simp }; 595279377Simp }; 596279377Simp 597279377Simp ohci: usb@12120000 { 598279377Simp compatible = "samsung,exynos4210-ohci"; 599279377Simp reg = <0x12120000 0x100>; 600279377Simp interrupts = <0 71 0>; 601279377Simp 602279377Simp clocks = <&clock CLK_USB2>; 603279377Simp clock-names = "usbhost"; 604279377Simp #address-cells = <1>; 605279377Simp #size-cells = <0>; 606279377Simp port@0 { 607279377Simp reg = <0>; 608279377Simp phys = <&usb2_phy_gen 1>; 609279377Simp }; 610279377Simp }; 611279377Simp 612279377Simp usb2_phy_gen: phy@12130000 { 613279377Simp compatible = "samsung,exynos5250-usb2-phy"; 614279377Simp reg = <0x12130000 0x100>; 615279377Simp clocks = <&clock CLK_USB2>, <&clock CLK_FIN_PLL>; 616279377Simp clock-names = "phy", "ref"; 617279377Simp #phy-cells = <1>; 618279377Simp samsung,sysreg-phandle = <&sysreg_system_controller>; 619279377Simp samsung,pmureg-phandle = <&pmu_system_controller>; 620279377Simp }; 621279377Simp 622279377Simp pwm: pwm@12dd0000 { 623279377Simp compatible = "samsung,exynos4210-pwm"; 624279377Simp reg = <0x12dd0000 0x100>; 625279377Simp samsung,pwm-outputs = <0>, <1>, <2>, <3>; 626279377Simp #pwm-cells = <3>; 627279377Simp clocks = <&clock CLK_PWM>; 628279377Simp clock-names = "timers"; 629279377Simp }; 630279377Simp 631279377Simp amba { 632279377Simp #address-cells = <1>; 633279377Simp #size-cells = <1>; 634279377Simp compatible = "arm,amba-bus"; 635279377Simp interrupt-parent = <&gic>; 636279377Simp ranges; 637279377Simp 638279377Simp pdma0: pdma@121A0000 { 639279377Simp compatible = "arm,pl330", "arm,primecell"; 640279377Simp reg = <0x121A0000 0x1000>; 641279377Simp interrupts = <0 34 0>; 642279377Simp clocks = <&clock CLK_PDMA0>; 643279377Simp clock-names = "apb_pclk"; 644279377Simp #dma-cells = <1>; 645279377Simp #dma-channels = <8>; 646279377Simp #dma-requests = <32>; 647279377Simp }; 648279377Simp 649279377Simp pdma1: pdma@121B0000 { 650279377Simp compatible = "arm,pl330", "arm,primecell"; 651279377Simp reg = <0x121B0000 0x1000>; 652279377Simp interrupts = <0 35 0>; 653279377Simp clocks = <&clock CLK_PDMA1>; 654279377Simp clock-names = "apb_pclk"; 655279377Simp #dma-cells = <1>; 656279377Simp #dma-channels = <8>; 657279377Simp #dma-requests = <32>; 658279377Simp }; 659279377Simp 660279377Simp mdma0: mdma@10800000 { 661279377Simp compatible = "arm,pl330", "arm,primecell"; 662279377Simp reg = <0x10800000 0x1000>; 663279377Simp interrupts = <0 33 0>; 664279377Simp clocks = <&clock CLK_MDMA0>; 665279377Simp clock-names = "apb_pclk"; 666279377Simp #dma-cells = <1>; 667279377Simp #dma-channels = <8>; 668279377Simp #dma-requests = <1>; 669279377Simp }; 670279377Simp 671279377Simp mdma1: mdma@11C10000 { 672279377Simp compatible = "arm,pl330", "arm,primecell"; 673279377Simp reg = <0x11C10000 0x1000>; 674279377Simp interrupts = <0 124 0>; 675279377Simp clocks = <&clock CLK_MDMA1>; 676279377Simp clock-names = "apb_pclk"; 677279377Simp #dma-cells = <1>; 678279377Simp #dma-channels = <8>; 679279377Simp #dma-requests = <1>; 680279377Simp }; 681279377Simp }; 682279377Simp 683279377Simp gsc_0: gsc@13e00000 { 684279377Simp compatible = "samsung,exynos5-gsc"; 685279377Simp reg = <0x13e00000 0x1000>; 686279377Simp interrupts = <0 85 0>; 687279377Simp power-domains = <&pd_gsc>; 688279377Simp clocks = <&clock CLK_GSCL0>; 689279377Simp clock-names = "gscl"; 690279377Simp }; 691279377Simp 692279377Simp gsc_1: gsc@13e10000 { 693279377Simp compatible = "samsung,exynos5-gsc"; 694279377Simp reg = <0x13e10000 0x1000>; 695279377Simp interrupts = <0 86 0>; 696279377Simp power-domains = <&pd_gsc>; 697279377Simp clocks = <&clock CLK_GSCL1>; 698279377Simp clock-names = "gscl"; 699279377Simp }; 700279377Simp 701279377Simp gsc_2: gsc@13e20000 { 702279377Simp compatible = "samsung,exynos5-gsc"; 703279377Simp reg = <0x13e20000 0x1000>; 704279377Simp interrupts = <0 87 0>; 705279377Simp power-domains = <&pd_gsc>; 706279377Simp clocks = <&clock CLK_GSCL2>; 707279377Simp clock-names = "gscl"; 708279377Simp }; 709279377Simp 710279377Simp gsc_3: gsc@13e30000 { 711279377Simp compatible = "samsung,exynos5-gsc"; 712279377Simp reg = <0x13e30000 0x1000>; 713279377Simp interrupts = <0 88 0>; 714279377Simp power-domains = <&pd_gsc>; 715279377Simp clocks = <&clock CLK_GSCL3>; 716279377Simp clock-names = "gscl"; 717279377Simp }; 718279377Simp 719279377Simp hdmi: hdmi { 720279377Simp compatible = "samsung,exynos4212-hdmi"; 721279377Simp reg = <0x14530000 0x70000>; 722279377Simp interrupts = <0 95 0>; 723279377Simp clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, 724279377Simp <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, 725279377Simp <&clock CLK_MOUT_HDMI>; 726279377Simp clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", 727279377Simp "sclk_hdmiphy", "mout_hdmi"; 728279377Simp samsung,syscon-phandle = <&pmu_system_controller>; 729279377Simp }; 730279377Simp 731279377Simp mixer { 732279377Simp compatible = "samsung,exynos5250-mixer"; 733279377Simp reg = <0x14450000 0x10000>; 734279377Simp interrupts = <0 94 0>; 735279377Simp clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 736279377Simp clock-names = "mixer", "sclk_hdmi"; 737279377Simp }; 738279377Simp 739279377Simp dp_phy: video-phy@10040720 { 740279377Simp compatible = "samsung,exynos5250-dp-video-phy"; 741279377Simp samsung,pmu-syscon = <&pmu_system_controller>; 742279377Simp #phy-cells = <0>; 743279377Simp }; 744279377Simp 745279377Simp dp: dp-controller@145B0000 { 746279377Simp clocks = <&clock CLK_DP>; 747279377Simp clock-names = "dp"; 748279377Simp phys = <&dp_phy>; 749279377Simp phy-names = "dp"; 750279377Simp }; 751279377Simp 752279377Simp fimd: fimd@14400000 { 753279377Simp clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; 754279377Simp clock-names = "sclk_fimd", "fimd"; 755279377Simp }; 756279377Simp 757279377Simp adc: adc@12D10000 { 758279377Simp compatible = "samsung,exynos-adc-v1"; 759279377Simp reg = <0x12D10000 0x100>; 760279377Simp interrupts = <0 106 0>; 761279377Simp clocks = <&clock CLK_ADC>; 762279377Simp clock-names = "adc"; 763279377Simp #io-channel-cells = <1>; 764279377Simp io-channel-ranges; 765279377Simp samsung,syscon-phandle = <&pmu_system_controller>; 766279377Simp status = "disabled"; 767279377Simp }; 768279377Simp 769279377Simp sss@10830000 { 770279377Simp compatible = "samsung,exynos4210-secss"; 771279377Simp reg = <0x10830000 0x10000>; 772279377Simp interrupts = <0 112 0>; 773279377Simp clocks = <&clock CLK_SSS>; 774279377Simp clock-names = "secss"; 775279377Simp }; 776279377Simp}; 777