xhci_pci.c revision 262364 
1/*-
2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
27__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/xhci_pci.c 262364 2014-02-23 13:25:43Z hselasky $");
28
29#include <sys/stdint.h>
30#include <sys/stddef.h>
31#include <sys/param.h>
32#include <sys/queue.h>
33#include <sys/types.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/bus.h>
37#include <sys/module.h>
38#include <sys/lock.h>
39#include <sys/mutex.h>
40#include <sys/condvar.h>
41#include <sys/sysctl.h>
42#include <sys/sx.h>
43#include <sys/unistd.h>
44#include <sys/callout.h>
45#include <sys/malloc.h>
46#include <sys/priv.h>
47
48#include <dev/usb/usb.h>
49#include <dev/usb/usbdi.h>
50
51#include <dev/usb/usb_core.h>
52#include <dev/usb/usb_busdma.h>
53#include <dev/usb/usb_process.h>
54#include <dev/usb/usb_util.h>
55
56#include <dev/usb/usb_controller.h>
57#include <dev/usb/usb_bus.h>
58#include <dev/usb/usb_pci.h>
59#include <dev/usb/controller/xhci.h>
60#include <dev/usb/controller/xhcireg.h>
61#include "usb_if.h"
62
63static device_probe_t xhci_pci_probe;
64static device_attach_t xhci_pci_attach;
65static device_detach_t xhci_pci_detach;
66static usb_take_controller_t xhci_pci_take_controller;
67
68static device_method_t xhci_device_methods[] = {
69	/* device interface */
70	DEVMETHOD(device_probe, xhci_pci_probe),
71	DEVMETHOD(device_attach, xhci_pci_attach),
72	DEVMETHOD(device_detach, xhci_pci_detach),
73	DEVMETHOD(device_suspend, bus_generic_suspend),
74	DEVMETHOD(device_resume, bus_generic_resume),
75	DEVMETHOD(device_shutdown, bus_generic_shutdown),
76	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77
78	DEVMETHOD_END
79};
80
81static driver_t xhci_driver = {
82	.name = "xhci",
83	.methods = xhci_device_methods,
84	.size = sizeof(struct xhci_softc),
85};
86
87static devclass_t xhci_devclass;
88
89DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0);
90MODULE_DEPEND(xhci, usb, 1, 1, 1);
91
92
93static const char *
94xhci_pci_match(device_t self)
95{
96	uint32_t device_id = pci_get_devid(self);
97
98	switch (device_id) {
99	case 0x01941033:
100		return ("NEC uPD720200 USB 3.0 controller");
101
102	case 0x10421b21:
103		return ("ASMedia ASM1042 USB 3.0 controller");
104
105	case 0x9c318086:
106	case 0x1e318086:
107		return ("Intel Panther Point USB 3.0 controller");
108	case 0x8c318086:
109		return ("Intel Lynx Point USB 3.0 controller");
110
111	default:
112		break;
113	}
114
115	if ((pci_get_class(self) == PCIC_SERIALBUS)
116	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
117	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
118		return ("XHCI (generic) USB 3.0 controller");
119	}
120	return (NULL);			/* dunno */
121}
122
123static int
124xhci_pci_probe(device_t self)
125{
126	const char *desc = xhci_pci_match(self);
127
128	if (desc) {
129		device_set_desc(self, desc);
130		return (0);
131	} else {
132		return (ENXIO);
133	}
134}
135
136static int xhci_use_msi = 1;
137TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
138
139static void
140xhci_interrupt_poll(void *_sc)
141{
142	struct xhci_softc *sc = _sc;
143	USB_BUS_UNLOCK(&sc->sc_bus);
144	xhci_interrupt(sc);
145	USB_BUS_LOCK(&sc->sc_bus);
146	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
147}
148
149static int
150xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
151{
152	uint32_t temp;
153
154	temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
155	    pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
156
157	temp |= set;
158	temp &= ~clear;
159
160	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
161	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
162
163	device_printf(self, "Port routing mask set to 0x%08x\n", temp);
164
165	return (0);
166}
167
168static int
169xhci_pci_attach(device_t self)
170{
171	struct xhci_softc *sc = device_get_softc(self);
172	int count, err, rid;
173
174	/* XXX check for 64-bit capability */
175
176	if (xhci_init(sc, self)) {
177		device_printf(self, "Could not initialize softc\n");
178		goto error;
179	}
180
181	pci_enable_busmaster(self);
182
183	rid = PCI_XHCI_CBMEM;
184	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
185	    RF_ACTIVE);
186	if (!sc->sc_io_res) {
187		device_printf(self, "Could not map memory\n");
188		goto error;
189	}
190	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
191	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
192	sc->sc_io_size = rman_get_size(sc->sc_io_res);
193
194	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
195
196	sc->sc_irq_rid = 0;
197	if (xhci_use_msi) {
198		count = pci_msi_count(self);
199		if (count >= 1) {
200			count = 1;
201			if (pci_alloc_msi(self, &count) == 0) {
202				if (bootverbose)
203					device_printf(self, "MSI enabled\n");
204				sc->sc_irq_rid = 1;
205			}
206		}
207	}
208	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ,
209	    &sc->sc_irq_rid, RF_SHAREABLE | RF_ACTIVE);
210	if (sc->sc_irq_res == NULL) {
211		device_printf(self, "Could not allocate IRQ\n");
212		/* goto error; FALLTHROUGH - use polling */
213	}
214	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
215	if (sc->sc_bus.bdev == NULL) {
216		device_printf(self, "Could not add USB device\n");
217		goto error;
218	}
219	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
220
221	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
222
223	if (sc->sc_irq_res != NULL) {
224		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
225		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
226		if (err != 0) {
227			device_printf(self, "Could not setup IRQ, err=%d\n", err);
228			sc->sc_intr_hdl = NULL;
229		}
230	}
231	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL ||
232	    xhci_use_polling() != 0) {
233		device_printf(self, "Interrupt polling at %dHz\n", hz);
234		USB_BUS_LOCK(&sc->sc_bus);
235		xhci_interrupt_poll(sc);
236		USB_BUS_UNLOCK(&sc->sc_bus);
237	}
238
239	/* On Intel chipsets reroute ports from EHCI to XHCI controller. */
240	switch (pci_get_devid(self)) {
241	case 0x9c318086:	/* Panther Point */
242	case 0x1e318086:	/* Panther Point */
243	case 0x8c318086:	/* Lynx Point */
244		sc->sc_port_route = &xhci_pci_port_route;
245		break;
246	default:
247		break;
248	}
249
250	xhci_pci_take_controller(self);
251
252	err = xhci_halt_controller(sc);
253
254	if (err == 0)
255		err = xhci_start_controller(sc);
256
257	if (err == 0)
258		err = device_probe_and_attach(sc->sc_bus.bdev);
259
260	if (err) {
261		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
262		goto error;
263	}
264	return (0);
265
266error:
267	xhci_pci_detach(self);
268	return (ENXIO);
269}
270
271static int
272xhci_pci_detach(device_t self)
273{
274	struct xhci_softc *sc = device_get_softc(self);
275	device_t bdev;
276
277	if (sc->sc_bus.bdev != NULL) {
278		bdev = sc->sc_bus.bdev;
279		device_detach(bdev);
280		device_delete_child(self, bdev);
281	}
282	/* during module unload there are lots of children leftover */
283	device_delete_children(self);
284
285	if (sc->sc_io_res) {
286		usb_callout_drain(&sc->sc_callout);
287		xhci_halt_controller(sc);
288	}
289
290	pci_disable_busmaster(self);
291
292	if (sc->sc_irq_res && sc->sc_intr_hdl) {
293		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
294		sc->sc_intr_hdl = NULL;
295	}
296	if (sc->sc_irq_res) {
297		if (sc->sc_irq_rid == 1)
298			pci_release_msi(self);
299		bus_release_resource(self, SYS_RES_IRQ, sc->sc_irq_rid,
300		    sc->sc_irq_res);
301		sc->sc_irq_res = NULL;
302	}
303	if (sc->sc_io_res) {
304		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
305		    sc->sc_io_res);
306		sc->sc_io_res = NULL;
307	}
308
309	xhci_uninit(sc);
310
311	return (0);
312}
313
314static int
315xhci_pci_take_controller(device_t self)
316{
317	struct xhci_softc *sc = device_get_softc(self);
318	uint32_t cparams;
319	uint32_t eecp;
320	uint32_t eec;
321	uint16_t to;
322	uint8_t bios_sem;
323
324	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
325
326	eec = -1;
327
328	/* Synchronise with the BIOS if it owns the controller. */
329	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
330	    eecp += XHCI_XECP_NEXT(eec) << 2) {
331		eec = XREAD4(sc, capa, eecp);
332
333		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
334			continue;
335		bios_sem = XREAD1(sc, capa, eecp +
336		    XHCI_XECP_BIOS_SEM);
337		if (bios_sem == 0)
338			continue;
339		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
340		    "to give up control\n");
341		XWRITE1(sc, capa, eecp +
342		    XHCI_XECP_OS_SEM, 1);
343		to = 500;
344		while (1) {
345			bios_sem = XREAD1(sc, capa, eecp +
346			    XHCI_XECP_BIOS_SEM);
347			if (bios_sem == 0)
348				break;
349
350			if (--to == 0) {
351				device_printf(sc->sc_bus.bdev,
352				    "timed out waiting for BIOS\n");
353				break;
354			}
355			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
356		}
357	}
358	return (0);
359}
360