xhci_pci.c revision 253094 
1/*-
2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
27__FBSDID("$FreeBSD: head/sys/dev/usb/controller/xhci_pci.c 253094 2013-07-09 12:55:01Z kib $");
28
29#include <sys/stdint.h>
30#include <sys/stddef.h>
31#include <sys/param.h>
32#include <sys/queue.h>
33#include <sys/types.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/bus.h>
37#include <sys/module.h>
38#include <sys/lock.h>
39#include <sys/mutex.h>
40#include <sys/condvar.h>
41#include <sys/sysctl.h>
42#include <sys/sx.h>
43#include <sys/unistd.h>
44#include <sys/callout.h>
45#include <sys/malloc.h>
46#include <sys/priv.h>
47
48#include <dev/usb/usb.h>
49#include <dev/usb/usbdi.h>
50
51#include <dev/usb/usb_core.h>
52#include <dev/usb/usb_busdma.h>
53#include <dev/usb/usb_process.h>
54#include <dev/usb/usb_util.h>
55
56#include <dev/usb/usb_controller.h>
57#include <dev/usb/usb_bus.h>
58#include <dev/usb/usb_pci.h>
59#include <dev/usb/controller/xhci.h>
60#include <dev/usb/controller/xhcireg.h>
61#include "usb_if.h"
62
63static device_probe_t xhci_pci_probe;
64static device_attach_t xhci_pci_attach;
65static device_detach_t xhci_pci_detach;
66static usb_take_controller_t xhci_pci_take_controller;
67
68static device_method_t xhci_device_methods[] = {
69	/* device interface */
70	DEVMETHOD(device_probe, xhci_pci_probe),
71	DEVMETHOD(device_attach, xhci_pci_attach),
72	DEVMETHOD(device_detach, xhci_pci_detach),
73	DEVMETHOD(device_suspend, bus_generic_suspend),
74	DEVMETHOD(device_resume, bus_generic_resume),
75	DEVMETHOD(device_shutdown, bus_generic_shutdown),
76	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77
78	DEVMETHOD_END
79};
80
81static driver_t xhci_driver = {
82	.name = "xhci",
83	.methods = xhci_device_methods,
84	.size = sizeof(struct xhci_softc),
85};
86
87static devclass_t xhci_devclass;
88
89DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0);
90MODULE_DEPEND(xhci, usb, 1, 1, 1);
91
92
93static const char *
94xhci_pci_match(device_t self)
95{
96	uint32_t device_id = pci_get_devid(self);
97
98	switch (device_id) {
99	case 0x01941033:
100		return ("NEC uPD720200 USB 3.0 controller");
101
102	case 0x10421b21:
103		return ("ASMedia ASM1042 USB 3.0 controller");
104
105	case 0x1e318086:
106		return ("Intel Panther Point USB 3.0 controller");
107	case 0x8c318086:
108		return ("Intel Lynx Point USB 3.0 controller");
109
110	default:
111		break;
112	}
113
114	if ((pci_get_class(self) == PCIC_SERIALBUS)
115	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
116	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
117		return ("XHCI (generic) USB 3.0 controller");
118	}
119	return (NULL);			/* dunno */
120}
121
122static int
123xhci_pci_probe(device_t self)
124{
125	const char *desc = xhci_pci_match(self);
126
127	if (desc) {
128		device_set_desc(self, desc);
129		return (0);
130	} else {
131		return (ENXIO);
132	}
133}
134
135static void
136xhci_interrupt_poll(void *_sc)
137{
138	struct xhci_softc *sc = _sc;
139	USB_BUS_UNLOCK(&sc->sc_bus);
140	xhci_interrupt(sc);
141	USB_BUS_LOCK(&sc->sc_bus);
142	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
143}
144
145static int
146xhci_pci_attach(device_t self)
147{
148	struct xhci_softc *sc = device_get_softc(self);
149	int count, err, rid;
150
151	/* XXX check for 64-bit capability */
152
153	if (xhci_init(sc, self)) {
154		device_printf(self, "Could not initialize softc\n");
155		goto error;
156	}
157
158	pci_enable_busmaster(self);
159
160	rid = PCI_XHCI_CBMEM;
161	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
162	    RF_ACTIVE);
163	if (!sc->sc_io_res) {
164		device_printf(self, "Could not map memory\n");
165		goto error;
166	}
167	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
168	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
169	sc->sc_io_size = rman_get_size(sc->sc_io_res);
170
171	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
172
173	sc->sc_irq_rid = 0;
174	count = pci_msi_count(self);
175	if (count >= 1) {
176		count = 1;
177		if (pci_alloc_msi(self, &count) == 0) {
178			if (bootverbose)
179				device_printf(self, "MSI enabled\n");
180			sc->sc_irq_rid = 1;
181		}
182	}
183	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ,
184	    &sc->sc_irq_rid, RF_SHAREABLE | RF_ACTIVE);
185	if (sc->sc_irq_res == NULL) {
186		device_printf(self, "Could not allocate IRQ\n");
187		goto error;
188	}
189	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
190	if (sc->sc_bus.bdev == NULL) {
191		device_printf(self, "Could not add USB device\n");
192		goto error;
193	}
194	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
195
196	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
197
198	if (sc->sc_irq_res != NULL) {
199		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
200		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
201		if (err != 0) {
202			device_printf(self, "Could not setup IRQ, err=%d\n", err);
203			sc->sc_intr_hdl = NULL;
204		}
205	}
206	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL ||
207	    xhci_use_polling() != 0) {
208		device_printf(self, "Interrupt polling at %dHz\n", hz);
209		USB_BUS_LOCK(&sc->sc_bus);
210		xhci_interrupt_poll(sc);
211		USB_BUS_UNLOCK(&sc->sc_bus);
212	}
213
214	xhci_pci_take_controller(self);
215
216	err = xhci_halt_controller(sc);
217
218	if (err == 0)
219		err = xhci_start_controller(sc);
220
221	if (err == 0)
222		err = device_probe_and_attach(sc->sc_bus.bdev);
223
224	if (err) {
225		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
226		goto error;
227	}
228	return (0);
229
230error:
231	xhci_pci_detach(self);
232	return (ENXIO);
233}
234
235static int
236xhci_pci_detach(device_t self)
237{
238	struct xhci_softc *sc = device_get_softc(self);
239	device_t bdev;
240
241	if (sc->sc_bus.bdev != NULL) {
242		bdev = sc->sc_bus.bdev;
243		device_detach(bdev);
244		device_delete_child(self, bdev);
245	}
246	/* during module unload there are lots of children leftover */
247	device_delete_children(self);
248
249	if (sc->sc_io_res) {
250		usb_callout_drain(&sc->sc_callout);
251		xhci_halt_controller(sc);
252	}
253
254	pci_disable_busmaster(self);
255
256	if (sc->sc_irq_res && sc->sc_intr_hdl) {
257		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
258		sc->sc_intr_hdl = NULL;
259	}
260	if (sc->sc_irq_res) {
261		if (sc->sc_irq_rid == 1)
262			pci_release_msi(self);
263		bus_release_resource(self, SYS_RES_IRQ, sc->sc_irq_rid,
264		    sc->sc_irq_res);
265		sc->sc_irq_res = NULL;
266	}
267	if (sc->sc_io_res) {
268		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
269		    sc->sc_io_res);
270		sc->sc_io_res = NULL;
271	}
272
273	xhci_uninit(sc);
274
275	return (0);
276}
277
278static int
279xhci_pci_take_controller(device_t self)
280{
281	struct xhci_softc *sc = device_get_softc(self);
282	uint32_t device_id = pci_get_devid(self);
283	uint32_t cparams;
284	uint32_t eecp;
285	uint32_t eec;
286	uint16_t to;
287	uint8_t bios_sem;
288
289	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
290
291	eec = -1;
292
293	/* Synchronise with the BIOS if it owns the controller. */
294	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
295	    eecp += XHCI_XECP_NEXT(eec) << 2) {
296		eec = XREAD4(sc, capa, eecp);
297
298		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
299			continue;
300		bios_sem = XREAD1(sc, capa, eecp +
301		    XHCI_XECP_BIOS_SEM);
302		if (bios_sem == 0)
303			continue;
304		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
305		    "to give up control\n");
306		XWRITE1(sc, capa, eecp +
307		    XHCI_XECP_OS_SEM, 1);
308		to = 500;
309		while (1) {
310			bios_sem = XREAD1(sc, capa, eecp +
311			    XHCI_XECP_BIOS_SEM);
312			if (bios_sem == 0)
313				break;
314
315			if (--to == 0) {
316				device_printf(sc->sc_bus.bdev,
317				    "timed out waiting for BIOS\n");
318				break;
319			}
320			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
321		}
322	}
323
324	/* On Intel chipsets reroute ports from EHCI to XHCI controller. */
325	if (device_id == 0x1e318086 /* Panther Point */ ||
326	    device_id == 0x8c318086 /* Lynx Point */) {
327		uint32_t temp = xhci_get_port_route();
328		pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
329		pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
330	}
331	return (0);
332}
333