xhci_pci.c revision 238551 
1/*-
2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
27__FBSDID("$FreeBSD: head/sys/dev/usb/controller/xhci_pci.c 238551 2012-07-17 14:03:04Z mav $");
28
29#include <sys/stdint.h>
30#include <sys/stddef.h>
31#include <sys/param.h>
32#include <sys/queue.h>
33#include <sys/types.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/bus.h>
37#include <sys/module.h>
38#include <sys/lock.h>
39#include <sys/mutex.h>
40#include <sys/condvar.h>
41#include <sys/sysctl.h>
42#include <sys/sx.h>
43#include <sys/unistd.h>
44#include <sys/callout.h>
45#include <sys/malloc.h>
46#include <sys/priv.h>
47
48#include <dev/usb/usb.h>
49#include <dev/usb/usbdi.h>
50
51#include <dev/usb/usb_core.h>
52#include <dev/usb/usb_busdma.h>
53#include <dev/usb/usb_process.h>
54#include <dev/usb/usb_util.h>
55
56#include <dev/usb/usb_controller.h>
57#include <dev/usb/usb_bus.h>
58#include <dev/usb/usb_pci.h>
59#include <dev/usb/controller/xhci.h>
60#include <dev/usb/controller/xhcireg.h>
61#include "usb_if.h"
62
63static device_probe_t xhci_pci_probe;
64static device_attach_t xhci_pci_attach;
65static device_detach_t xhci_pci_detach;
66static usb_take_controller_t xhci_pci_take_controller;
67
68static device_method_t xhci_device_methods[] = {
69	/* device interface */
70	DEVMETHOD(device_probe, xhci_pci_probe),
71	DEVMETHOD(device_attach, xhci_pci_attach),
72	DEVMETHOD(device_detach, xhci_pci_detach),
73	DEVMETHOD(device_suspend, bus_generic_suspend),
74	DEVMETHOD(device_resume, bus_generic_resume),
75	DEVMETHOD(device_shutdown, bus_generic_shutdown),
76	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77
78	DEVMETHOD_END
79};
80
81static driver_t xhci_driver = {
82	.name = "xhci",
83	.methods = xhci_device_methods,
84	.size = sizeof(struct xhci_softc),
85};
86
87static devclass_t xhci_devclass;
88
89DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0);
90MODULE_DEPEND(xhci, usb, 1, 1, 1);
91
92
93static const char *
94xhci_pci_match(device_t self)
95{
96	uint32_t device_id = pci_get_devid(self);
97
98	switch (device_id) {
99	case 0x01941033:
100		return ("NEC uPD720200 USB 3.0 controller");
101
102	case 0x1e318086:
103		return ("Intel Panther Point USB 3.0 controller");
104	case 0x8c318086:
105		return ("Intel Lynx Point USB 3.0 controller");
106
107	default:
108		break;
109	}
110
111	if ((pci_get_class(self) == PCIC_SERIALBUS)
112	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
113	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
114		return ("XHCI (generic) USB 3.0 controller");
115	}
116	return (NULL);			/* dunno */
117}
118
119static int
120xhci_pci_probe(device_t self)
121{
122	const char *desc = xhci_pci_match(self);
123
124	if (desc) {
125		device_set_desc(self, desc);
126		return (0);
127	} else {
128		return (ENXIO);
129	}
130}
131
132static int
133xhci_pci_attach(device_t self)
134{
135	struct xhci_softc *sc = device_get_softc(self);
136	int err;
137	int rid;
138
139	/* XXX check for 64-bit capability */
140
141	if (xhci_init(sc, self)) {
142		device_printf(self, "Could not initialize softc\n");
143		goto error;
144	}
145
146	pci_enable_busmaster(self);
147
148	rid = PCI_XHCI_CBMEM;
149	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
150	    RF_ACTIVE);
151	if (!sc->sc_io_res) {
152		device_printf(self, "Could not map memory\n");
153		goto error;
154	}
155	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
156	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
157	sc->sc_io_size = rman_get_size(sc->sc_io_res);
158
159	rid = 0;
160	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
161	    RF_SHAREABLE | RF_ACTIVE);
162	if (sc->sc_irq_res == NULL) {
163		device_printf(self, "Could not allocate IRQ\n");
164		goto error;
165	}
166	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
167	if (sc->sc_bus.bdev == NULL) {
168		device_printf(self, "Could not add USB device\n");
169		goto error;
170	}
171	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
172
173	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
174
175#if (__FreeBSD_version >= 700031)
176	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
177	    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
178#else
179	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
180	    (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
181#endif
182	if (err) {
183		device_printf(self, "Could not setup IRQ, err=%d\n", err);
184		sc->sc_intr_hdl = NULL;
185		goto error;
186	}
187	xhci_pci_take_controller(self);
188
189	err = xhci_halt_controller(sc);
190
191	if (err == 0)
192		err = xhci_start_controller(sc);
193
194	if (err == 0)
195		err = device_probe_and_attach(sc->sc_bus.bdev);
196
197	if (err) {
198		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
199		goto error;
200	}
201	return (0);
202
203error:
204	xhci_pci_detach(self);
205	return (ENXIO);
206}
207
208static int
209xhci_pci_detach(device_t self)
210{
211	struct xhci_softc *sc = device_get_softc(self);
212	device_t bdev;
213
214	if (sc->sc_bus.bdev != NULL) {
215		bdev = sc->sc_bus.bdev;
216		device_detach(bdev);
217		device_delete_child(self, bdev);
218	}
219	/* during module unload there are lots of children leftover */
220	device_delete_children(self);
221
222	pci_disable_busmaster(self);
223
224	if (sc->sc_irq_res && sc->sc_intr_hdl) {
225
226		xhci_halt_controller(sc);
227
228		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
229		sc->sc_intr_hdl = NULL;
230	}
231	if (sc->sc_irq_res) {
232		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
233		sc->sc_irq_res = NULL;
234	}
235	if (sc->sc_io_res) {
236		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
237		    sc->sc_io_res);
238		sc->sc_io_res = NULL;
239	}
240
241	xhci_uninit(sc);
242
243	return (0);
244}
245
246static int
247xhci_pci_take_controller(device_t self)
248{
249	struct xhci_softc *sc = device_get_softc(self);
250	uint32_t device_id = pci_get_devid(self);
251	uint32_t cparams;
252	uint32_t eecp;
253	uint32_t eec;
254	uint16_t to;
255	uint8_t bios_sem;
256
257	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
258
259	eec = -1;
260
261	/* Synchronise with the BIOS if it owns the controller. */
262	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
263	    eecp += XHCI_XECP_NEXT(eec) << 2) {
264		eec = XREAD4(sc, capa, eecp);
265
266		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
267			continue;
268		bios_sem = XREAD1(sc, capa, eecp +
269		    XHCI_XECP_BIOS_SEM);
270		if (bios_sem == 0)
271			continue;
272		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
273		    "to give up control\n");
274		XWRITE1(sc, capa, eecp +
275		    XHCI_XECP_OS_SEM, 1);
276		to = 500;
277		while (1) {
278			bios_sem = XREAD1(sc, capa, eecp +
279			    XHCI_XECP_BIOS_SEM);
280			if (bios_sem == 0)
281				break;
282
283			if (--to == 0) {
284				device_printf(sc->sc_bus.bdev,
285				    "timed out waiting for BIOS\n");
286				break;
287			}
288			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
289		}
290	}
291
292	/* On Intel chipsets reroute ports from EHCI to XHCI controller. */
293	if (device_id == 0x1e318086 /* Panther Point */ ||
294	    device_id == 0x8c318086 /* Lynx Point */) {
295		pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 0xffffffff, 4);
296		pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, 0xffffffff, 4);
297	}
298
299	return (0);
300}
301