ehci_pci.c revision 260348
1/*- 2 * Copyright (c) 1998 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Lennart Augustsson (augustss@carlstedt.se) at 7 * Carlstedt Research & Technology. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ehci_pci.c 260348 2014-01-05 22:49:54Z mav $"); 33 34/* 35 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 36 * 37 * The EHCI 1.0 spec can be found at 38 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 39 * and the USB 2.0 spec at 40 * http://www.usb.org/developers/docs/usb_20.zip 41 */ 42 43/* The low level controller code for EHCI has been split into 44 * PCI probes and EHCI specific code. This was done to facilitate the 45 * sharing of code between *BSD's 46 */ 47 48#include <sys/stdint.h> 49#include <sys/stddef.h> 50#include <sys/param.h> 51#include <sys/queue.h> 52#include <sys/types.h> 53#include <sys/systm.h> 54#include <sys/kernel.h> 55#include <sys/bus.h> 56#include <sys/module.h> 57#include <sys/lock.h> 58#include <sys/mutex.h> 59#include <sys/condvar.h> 60#include <sys/sysctl.h> 61#include <sys/sx.h> 62#include <sys/unistd.h> 63#include <sys/callout.h> 64#include <sys/malloc.h> 65#include <sys/priv.h> 66 67#include <dev/usb/usb.h> 68#include <dev/usb/usbdi.h> 69 70#include <dev/usb/usb_core.h> 71#include <dev/usb/usb_busdma.h> 72#include <dev/usb/usb_process.h> 73#include <dev/usb/usb_util.h> 74 75#include <dev/usb/usb_controller.h> 76#include <dev/usb/usb_bus.h> 77#include <dev/usb/usb_pci.h> 78#include <dev/usb/controller/ehci.h> 79#include <dev/usb/controller/ehcireg.h> 80#include "usb_if.h" 81 82#define PCI_EHCI_VENDORID_ACERLABS 0x10b9 83#define PCI_EHCI_VENDORID_AMD 0x1022 84#define PCI_EHCI_VENDORID_APPLE 0x106b 85#define PCI_EHCI_VENDORID_ATI 0x1002 86#define PCI_EHCI_VENDORID_CMDTECH 0x1095 87#define PCI_EHCI_VENDORID_INTEL 0x8086 88#define PCI_EHCI_VENDORID_NEC 0x1033 89#define PCI_EHCI_VENDORID_OPTI 0x1045 90#define PCI_EHCI_VENDORID_PHILIPS 0x1131 91#define PCI_EHCI_VENDORID_SIS 0x1039 92#define PCI_EHCI_VENDORID_NVIDIA 0x12D2 93#define PCI_EHCI_VENDORID_NVIDIA2 0x10DE 94#define PCI_EHCI_VENDORID_VIA 0x1106 95 96static device_probe_t ehci_pci_probe; 97static device_attach_t ehci_pci_attach; 98static device_detach_t ehci_pci_detach; 99static usb_take_controller_t ehci_pci_take_controller; 100 101static const char * 102ehci_pci_match(device_t self) 103{ 104 uint32_t device_id = pci_get_devid(self); 105 106 switch (device_id) { 107 case 0x523910b9: 108 return "ALi M5239 USB 2.0 controller"; 109 110 case 0x10227463: 111 return "AMD 8111 USB 2.0 controller"; 112 113 case 0x20951022: 114 return ("AMD CS5536 (Geode) USB 2.0 controller"); 115 116 case 0x43451002: 117 return "ATI SB200 USB 2.0 controller"; 118 case 0x43731002: 119 return "ATI SB400 USB 2.0 controller"; 120 case 0x43961002: 121 return ("AMD SB7x0/SB8x0/SB9x0 USB 2.0 controller"); 122 123 case 0x1e268086: 124 return ("Intel Panther Point USB 2.0 controller"); 125 case 0x1e2d8086: 126 return ("Intel Panther Point USB 2.0 controller"); 127 case 0x1f2c8086: 128 return ("Intel Avoton USB 2.0 controller"); 129 case 0x25ad8086: 130 return "Intel 6300ESB USB 2.0 controller"; 131 case 0x24cd8086: 132 return "Intel 82801DB/L/M (ICH4) USB 2.0 controller"; 133 case 0x24dd8086: 134 return "Intel 82801EB/R (ICH5) USB 2.0 controller"; 135 case 0x265c8086: 136 return "Intel 82801FB (ICH6) USB 2.0 controller"; 137 case 0x268c8086: 138 return ("Intel 63XXESB USB 2.0 controller"); 139 case 0x27cc8086: 140 return "Intel 82801GB/R (ICH7) USB 2.0 controller"; 141 case 0x28368086: 142 return "Intel 82801H (ICH8) USB 2.0 controller USB2-A"; 143 case 0x283a8086: 144 return "Intel 82801H (ICH8) USB 2.0 controller USB2-B"; 145 case 0x293a8086: 146 return "Intel 82801I (ICH9) USB 2.0 controller"; 147 case 0x293c8086: 148 return "Intel 82801I (ICH9) USB 2.0 controller"; 149 case 0x3a3a8086: 150 return "Intel 82801JI (ICH10) USB 2.0 controller USB-A"; 151 case 0x3a3c8086: 152 return "Intel 82801JI (ICH10) USB 2.0 controller USB-B"; 153 case 0x3b348086: 154 return ("Intel PCH USB 2.0 controller USB-A"); 155 case 0x3b3c8086: 156 return ("Intel PCH USB 2.0 controller USB-B"); 157 158 case 0x00e01033: 159 return ("NEC uPD 720100 USB 2.0 controller"); 160 161 case 0x006810de: 162 return "NVIDIA nForce2 USB 2.0 controller"; 163 case 0x008810de: 164 return "NVIDIA nForce2 Ultra 400 USB 2.0 controller"; 165 case 0x00d810de: 166 return "NVIDIA nForce3 USB 2.0 controller"; 167 case 0x00e810de: 168 return "NVIDIA nForce3 250 USB 2.0 controller"; 169 case 0x005b10de: 170 return "NVIDIA nForce CK804 USB 2.0 controller"; 171 case 0x036d10de: 172 return "NVIDIA nForce MCP55 USB 2.0 controller"; 173 case 0x03f210de: 174 return "NVIDIA nForce MCP61 USB 2.0 controller"; 175 case 0x0aa610de: 176 return "NVIDIA nForce MCP79 USB 2.0 controller"; 177 case 0x0aa910de: 178 return "NVIDIA nForce MCP79 USB 2.0 controller"; 179 case 0x0aaa10de: 180 return "NVIDIA nForce MCP79 USB 2.0 controller"; 181 182 case 0x15621131: 183 return "Philips ISP156x USB 2.0 controller"; 184 185 case 0x31041106: 186 return ("VIA VT6202 USB 2.0 controller"); 187 188 default: 189 break; 190 } 191 192 if ((pci_get_class(self) == PCIC_SERIALBUS) 193 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 194 && (pci_get_progif(self) == PCI_INTERFACE_EHCI)) { 195 return ("EHCI (generic) USB 2.0 controller"); 196 } 197 return (NULL); /* dunno */ 198} 199 200static int 201ehci_pci_probe(device_t self) 202{ 203 const char *desc = ehci_pci_match(self); 204 205 if (desc) { 206 device_set_desc(self, desc); 207 return (0); 208 } else { 209 return (ENXIO); 210 } 211} 212 213static void 214ehci_pci_ati_quirk(device_t self, uint8_t is_sb700) 215{ 216 device_t smbdev; 217 uint32_t val; 218 219 if (is_sb700) { 220 /* Lookup SMBUS PCI device */ 221 smbdev = pci_find_device(PCI_EHCI_VENDORID_ATI, 0x4385); 222 if (smbdev == NULL) 223 return; 224 val = pci_get_revid(smbdev); 225 if (val != 0x3a && val != 0x3b) 226 return; 227 } 228 229 /* 230 * Note: this bit is described as reserved in SB700 231 * Register Reference Guide. 232 */ 233 val = pci_read_config(self, 0x53, 1); 234 if (!(val & 0x8)) { 235 val |= 0x8; 236 pci_write_config(self, 0x53, val, 1); 237 device_printf(self, "AMD SB600/700 quirk applied\n"); 238 } 239} 240 241static void 242ehci_pci_via_quirk(device_t self) 243{ 244 uint32_t val; 245 246 if ((pci_get_device(self) == 0x3104) && 247 ((pci_get_revid(self) & 0xf0) == 0x60)) { 248 /* Correct schedule sleep time to 10us */ 249 val = pci_read_config(self, 0x4b, 1); 250 if (val & 0x20) 251 return; 252 val |= 0x20; 253 pci_write_config(self, 0x4b, val, 1); 254 device_printf(self, "VIA-quirk applied\n"); 255 } 256} 257 258static int 259ehci_pci_attach(device_t self) 260{ 261 ehci_softc_t *sc = device_get_softc(self); 262 int err; 263 int rid; 264 265 /* initialise some bus fields */ 266 sc->sc_bus.parent = self; 267 sc->sc_bus.devices = sc->sc_devices; 268 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 269 270 /* get all DMA memory */ 271 if (usb_bus_mem_alloc_all(&sc->sc_bus, 272 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 273 return (ENOMEM); 274 } 275 276 pci_enable_busmaster(self); 277 278 switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) { 279 case PCI_USB_REV_PRE_1_0: 280 case PCI_USB_REV_1_0: 281 case PCI_USB_REV_1_1: 282 /* 283 * NOTE: some EHCI USB controllers have the wrong USB 284 * revision number. It appears those controllers are 285 * fully compliant so we just ignore this value in 286 * some common cases. 287 */ 288 device_printf(self, "pre-2.0 USB revision (ignored)\n"); 289 /* fallthrough */ 290 case PCI_USB_REV_2_0: 291 break; 292 default: 293 /* Quirk for Parallels Desktop 4.0 */ 294 device_printf(self, "USB revision is unknown. Assuming v2.0.\n"); 295 break; 296 } 297 298 rid = PCI_CBMEM; 299 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 300 RF_ACTIVE); 301 if (!sc->sc_io_res) { 302 device_printf(self, "Could not map memory\n"); 303 goto error; 304 } 305 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 306 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 307 sc->sc_io_size = rman_get_size(sc->sc_io_res); 308 309 rid = 0; 310 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 311 RF_SHAREABLE | RF_ACTIVE); 312 if (sc->sc_irq_res == NULL) { 313 device_printf(self, "Could not allocate irq\n"); 314 goto error; 315 } 316 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 317 if (!sc->sc_bus.bdev) { 318 device_printf(self, "Could not add USB device\n"); 319 goto error; 320 } 321 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 322 323 /* 324 * ehci_pci_match will never return NULL if ehci_pci_probe 325 * succeeded 326 */ 327 device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self)); 328 switch (pci_get_vendor(self)) { 329 case PCI_EHCI_VENDORID_ACERLABS: 330 sprintf(sc->sc_vendor, "AcerLabs"); 331 break; 332 case PCI_EHCI_VENDORID_AMD: 333 sprintf(sc->sc_vendor, "AMD"); 334 break; 335 case PCI_EHCI_VENDORID_APPLE: 336 sprintf(sc->sc_vendor, "Apple"); 337 break; 338 case PCI_EHCI_VENDORID_ATI: 339 sprintf(sc->sc_vendor, "ATI"); 340 break; 341 case PCI_EHCI_VENDORID_CMDTECH: 342 sprintf(sc->sc_vendor, "CMDTECH"); 343 break; 344 case PCI_EHCI_VENDORID_INTEL: 345 sprintf(sc->sc_vendor, "Intel"); 346 break; 347 case PCI_EHCI_VENDORID_NEC: 348 sprintf(sc->sc_vendor, "NEC"); 349 break; 350 case PCI_EHCI_VENDORID_OPTI: 351 sprintf(sc->sc_vendor, "OPTi"); 352 break; 353 case PCI_EHCI_VENDORID_PHILIPS: 354 sprintf(sc->sc_vendor, "Philips"); 355 break; 356 case PCI_EHCI_VENDORID_SIS: 357 sprintf(sc->sc_vendor, "SiS"); 358 break; 359 case PCI_EHCI_VENDORID_NVIDIA: 360 case PCI_EHCI_VENDORID_NVIDIA2: 361 sprintf(sc->sc_vendor, "nVidia"); 362 break; 363 case PCI_EHCI_VENDORID_VIA: 364 sprintf(sc->sc_vendor, "VIA"); 365 break; 366 default: 367 if (bootverbose) 368 device_printf(self, "(New EHCI DeviceId=0x%08x)\n", 369 pci_get_devid(self)); 370 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self)); 371 } 372 373#if (__FreeBSD_version >= 700031) 374 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 375 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 376#else 377 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 378 (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 379#endif 380 if (err) { 381 device_printf(self, "Could not setup irq, %d\n", err); 382 sc->sc_intr_hdl = NULL; 383 goto error; 384 } 385 ehci_pci_take_controller(self); 386 387 /* Undocumented quirks taken from Linux */ 388 389 switch (pci_get_vendor(self)) { 390 case PCI_EHCI_VENDORID_ATI: 391 /* SB600 and SB700 EHCI quirk */ 392 switch (pci_get_device(self)) { 393 case 0x4386: 394 ehci_pci_ati_quirk(self, 0); 395 break; 396 case 0x4396: 397 ehci_pci_ati_quirk(self, 1); 398 break; 399 default: 400 break; 401 } 402 break; 403 404 case PCI_EHCI_VENDORID_VIA: 405 ehci_pci_via_quirk(self); 406 break; 407 408 default: 409 break; 410 } 411 412 /* Dropped interrupts workaround */ 413 switch (pci_get_vendor(self)) { 414 case PCI_EHCI_VENDORID_ATI: 415 case PCI_EHCI_VENDORID_VIA: 416 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG; 417 if (bootverbose) 418 device_printf(self, 419 "Dropped interrupts workaround enabled\n"); 420 break; 421 default: 422 break; 423 } 424 425 /* Doorbell feature workaround */ 426 switch (pci_get_vendor(self)) { 427 case PCI_EHCI_VENDORID_NVIDIA: 428 case PCI_EHCI_VENDORID_NVIDIA2: 429 sc->sc_flags |= EHCI_SCFLG_IAADBUG; 430 if (bootverbose) 431 device_printf(self, 432 "Doorbell workaround enabled\n"); 433 break; 434 default: 435 break; 436 } 437 438 err = ehci_init(sc); 439 if (!err) { 440 err = device_probe_and_attach(sc->sc_bus.bdev); 441 } 442 if (err) { 443 device_printf(self, "USB init failed err=%d\n", err); 444 goto error; 445 } 446 return (0); 447 448error: 449 ehci_pci_detach(self); 450 return (ENXIO); 451} 452 453static int 454ehci_pci_detach(device_t self) 455{ 456 ehci_softc_t *sc = device_get_softc(self); 457 device_t bdev; 458 459 if (sc->sc_bus.bdev) { 460 bdev = sc->sc_bus.bdev; 461 device_detach(bdev); 462 device_delete_child(self, bdev); 463 } 464 /* during module unload there are lots of children leftover */ 465 device_delete_children(self); 466 467 pci_disable_busmaster(self); 468 469 if (sc->sc_irq_res && sc->sc_intr_hdl) { 470 /* 471 * only call ehci_detach() after ehci_init() 472 */ 473 ehci_detach(sc); 474 475 int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 476 477 if (err) 478 /* XXX or should we panic? */ 479 device_printf(self, "Could not tear down irq, %d\n", 480 err); 481 sc->sc_intr_hdl = NULL; 482 } 483 if (sc->sc_irq_res) { 484 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 485 sc->sc_irq_res = NULL; 486 } 487 if (sc->sc_io_res) { 488 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, 489 sc->sc_io_res); 490 sc->sc_io_res = NULL; 491 } 492 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 493 494 return (0); 495} 496 497static int 498ehci_pci_take_controller(device_t self) 499{ 500 ehci_softc_t *sc = device_get_softc(self); 501 uint32_t cparams; 502 uint32_t eec; 503 uint16_t to; 504 uint8_t eecp; 505 uint8_t bios_sem; 506 507 cparams = EREAD4(sc, EHCI_HCCPARAMS); 508 509 /* Synchronise with the BIOS if it owns the controller. */ 510 for (eecp = EHCI_HCC_EECP(cparams); eecp != 0; 511 eecp = EHCI_EECP_NEXT(eec)) { 512 eec = pci_read_config(self, eecp, 4); 513 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP) { 514 continue; 515 } 516 bios_sem = pci_read_config(self, eecp + 517 EHCI_LEGSUP_BIOS_SEM, 1); 518 if (bios_sem == 0) { 519 continue; 520 } 521 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 522 "to give up control\n"); 523 pci_write_config(self, eecp + 524 EHCI_LEGSUP_OS_SEM, 1, 1); 525 to = 500; 526 while (1) { 527 bios_sem = pci_read_config(self, eecp + 528 EHCI_LEGSUP_BIOS_SEM, 1); 529 if (bios_sem == 0) 530 break; 531 532 if (--to == 0) { 533 device_printf(sc->sc_bus.bdev, 534 "timed out waiting for BIOS\n"); 535 break; 536 } 537 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 538 } 539 } 540 return (0); 541} 542 543static device_method_t ehci_pci_methods[] = { 544 /* Device interface */ 545 DEVMETHOD(device_probe, ehci_pci_probe), 546 DEVMETHOD(device_attach, ehci_pci_attach), 547 DEVMETHOD(device_detach, ehci_pci_detach), 548 DEVMETHOD(device_suspend, bus_generic_suspend), 549 DEVMETHOD(device_resume, bus_generic_resume), 550 DEVMETHOD(device_shutdown, bus_generic_shutdown), 551 DEVMETHOD(usb_take_controller, ehci_pci_take_controller), 552 553 DEVMETHOD_END 554}; 555 556static driver_t ehci_driver = { 557 .name = "ehci", 558 .methods = ehci_pci_methods, 559 .size = sizeof(struct ehci_softc), 560}; 561 562static devclass_t ehci_devclass; 563 564DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, 0, 0); 565MODULE_DEPEND(ehci, usb, 1, 1, 1); 566