channel.c revision 60961
1/* 2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 3 * Portions Copyright by Luigi Rizzo - 1997-99 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: head/sys/dev/sound/pcm/channel.c 60961 2000-05-26 21:55:13Z cg $ 28 */ 29 30#include <dev/sound/pcm/sound.h> 31 32#define MIN_CHUNK_SIZE 256 /* for uiomove etc. */ 33#define DMA_ALIGN_THRESHOLD 4 34#define DMA_ALIGN_MASK (~(DMA_ALIGN_THRESHOLD - 1)) 35 36#define ISA_DMA(b) (((b)->chan >= 0 && (b)->chan != 4 && (b)->chan < 8)) 37#define CANCHANGE(c) (!(c)->buffer.dl) 38/* 39#define DEB(x) x 40*/ 41static void buf_clear(snd_dbuf *b, u_int32_t fmt, int length); 42static void chn_dmaupdate(pcm_channel *c); 43static void chn_wrintr(pcm_channel *c); 44static void chn_rdintr(pcm_channel *c); 45static u_int32_t chn_start(pcm_channel *c); 46/* 47 * SOUND OUTPUT 48 49We use a circular buffer to store samples directed to the DAC. 50The buffer is split into two variable-size regions, each identified 51by an offset in the buffer (rp,fp) and a length (rl,fl): 52 53 0 rp,rl fp,fl bufsize 54 |__________>____________>________| 55 FREE d READY w FREE 56 57 READY: data written from the process and ready to be sent to the DAC; 58 FREE: free part of the buffer. 59 60Both regions can wrap around the end of the buffer. At initialization, 61READY is empty, FREE takes all the available space, and dma is 62idle. dl contains the length of the current DMA transfer, dl=0 63means that the dma is idle. 64 65The two boundaries (rp,fp) in the buffers are advanced by DMA [d] 66and write() [w] operations. The first portion of the READY region 67is used for DMA transfers. The transfer is started at rp and with 68chunks of length dl. During DMA operations, dsp_wr_dmaupdate() 69updates rp, rl and fl tracking the ISA DMA engine as the transfer 70makes progress. 71When a new block is written, fp advances and rl,fl are updated 72accordingly. 73 74The code works as follows: the user write routine dsp_write_body() 75fills up the READY region with new data (reclaiming space from the 76FREE region) and starts the write DMA engine if inactive. When a 77DMA transfer is complete, an interrupt causes dsp_wrintr() to be 78called which extends the FREE region and possibly starts the next 79transfer. 80 81In some cases, the code tries to track the current status of DMA 82operations by calling dsp_wr_dmaupdate() which changes rp, rl and fl. 83 84The system tries to make all DMA transfers use the same size, 85play_blocksize or rec_blocksize. The size is either selected by 86the user, or computed by the system to correspond to about .25s of 87audio. The blocksize must be within a range which is currently: 88 89 min(5ms, 40 bytes) ... 1/2 buffer size. 90 91When there aren't enough data (write) or space (read), a transfer 92is started with a reduced size. 93 94To reduce problems in case of overruns, the routine which fills up 95the buffer should initialize (e.g. by repeating the last value) a 96reasonably long area after the last block so that no noise is 97produced on overruns. 98 99 * 100 */ 101 102 103/* XXX this is broken: in the event a bounce buffer is used, data never 104 * gets copied in or out of the real buffer. fix requires mods to isa_dma.c 105 * and possibly fixes to other autodma mode clients 106 */ 107static void 108chn_isadmabounce(pcm_channel *c) 109{ 110 if (ISA_DMA(&c->buffer)) { 111 /* tell isa_dma to bounce data in/out */ 112 } else KASSERT(1, ("chn_isadmabounce called on invalid channel")); 113} 114 115static int 116chn_polltrigger(pcm_channel *c) 117{ 118 snd_dbuf *bs = &c->buffer2nd; 119 unsigned lim = (c->flags & CHN_F_HAS_SIZE)? bs->blksz : 0; 120 int trig = 0; 121 122 if (c->flags & CHN_F_MAPPED) 123 trig = ((bs->int_count > bs->prev_int_count) || bs->prev_int_count == 0); 124 else 125 trig = (((c->direction == PCMDIR_PLAY)? bs->fl : bs->rl) > lim); 126 return trig; 127} 128 129static int 130chn_pollreset(pcm_channel *c) 131{ 132 snd_dbuf *bs = &c->buffer2nd; 133 134 if (c->flags & CHN_F_MAPPED) 135 bs->prev_int_count = bs->int_count; 136 return 1; 137} 138 139/* 140 * chn_dmadone() updates pointers and wakes up any process waiting 141 * on a select(). Must be called at spltty(). 142 */ 143static void 144chn_dmadone(pcm_channel *c) 145{ 146 snd_dbuf *b = &c->buffer; 147 148 if (c->direction == PCMDIR_PLAY) 149 chn_checkunderflow(c); 150 else 151 chn_dmaupdate(c); 152 if (ISA_DMA(b)) 153 chn_isadmabounce(c); /* sync bounce buffer */ 154 b->int_count++; 155} 156 157/* 158 * chn_dmawakeup() wakes up any process sleeping. Separated from 159 * chn_dmadone() so that wakeup occurs only when feed from a 160 * secondary buffer to a DMA buffer takes place. Must be called 161 * at spltty(). 162 */ 163static void 164chn_dmawakeup(pcm_channel *c) 165{ 166 snd_dbuf *b = &c->buffer; 167 168 wakeup(b); 169} 170 171/* 172 * chn_dmaupdate() tracks the status of a dma transfer, 173 * updating pointers. It must be called at spltty(). 174 * 175 * NOTE: when we are using auto dma in the device, rl might become 176 * negative. 177 */ 178DEB (static int chn_updatecount=0); 179 180static void 181chn_dmaupdate(pcm_channel *c) 182{ 183 snd_dbuf *b = &c->buffer; 184 int delta, hwptr; 185 DEB (int b_rl=b->rl; int b_fl=b->fl; int b_rp=b->rp; int b_fp=b->fp); 186 187 hwptr = chn_getptr(c); 188 if (c->direction == PCMDIR_PLAY) { 189 delta = (b->bufsize + hwptr - b->rp) % b->bufsize; 190 b->rp = hwptr; 191 b->rl -= delta; 192 b->fl += delta; 193 194 if (b->rl < 0) { 195 DEB(printf("OUCH!(%d) rl %d(%d) delta %d bufsize %d hwptr %d rp %d(%d)\n", chn_updatecount++, b->rl, b_rl, delta, b->bufsize, hwptr, b->rp, b_rp)); 196 } 197 } else { 198 delta = (b->bufsize + hwptr - b->fp) % b->bufsize; 199 b->fp = hwptr; 200 b->rl += delta; 201 b->fl -= delta; 202 if (b->fl < 0) { 203 DEB(printf("OUCH!(%d) fl %d(%d) delta %d bufsize %d hwptr %d fp %d(%d)\n", chn_updatecount++, b->fl, b_fl, delta, b->bufsize, hwptr, b->fp, b_fp)); 204 } 205 } 206 b->total += delta; 207} 208 209/* 210 * Check channel for underflow occured. Reset DMA buffer in case of 211 * underflow, so that new data can go into the buffer. It must be 212 * called at spltty(). 213 */ 214void 215chn_checkunderflow(pcm_channel *c) 216{ 217 snd_dbuf *b = &c->buffer; 218 219 if (b->underflow) { 220 DEB(printf("Clear underflow condition\n")); 221 /* 222 * The DMA keeps running even after underflow occurs. 223 * Hence the value returned by chn_getptr() here soon 224 * gets a lag when we get back to chn_write(). Although 225 * there are no easy and precise methods to figure out 226 * the lag, a quarter of b->bufsize would be a fair 227 * choice, provided that a DMA interrupt generates upon 228 * each transfer of a half b->bufsize. 229 */ 230 b->rp = chn_getptr(c); 231 b->fp = (b->rp + b->bufsize / 4) % b->bufsize; 232 b->rl = b->bufsize / 4; 233 b->fl = b->bufsize - b->rl; 234 b->underflow = 0; 235 } else { 236 chn_dmaupdate(c); 237 } 238} 239 240/* 241 * Feeds new data to the write dma buffer. Can be called in the bottom half. 242 * Hence must be called at spltty. 243 */ 244int 245chn_wrfeed(pcm_channel *c) 246{ 247 snd_dbuf *b = &c->buffer; 248 snd_dbuf *bs = &c->buffer2nd; 249 int a, l, lacc; 250 251 /* ensure we always have a whole number of samples */ 252 a = (1 << c->align) - 1; 253 lacc = 0; 254 if (c->flags & CHN_F_MAPPED) { 255 bs->rl = min(b->blksz, b->fl); 256 bs->fl = 0; 257 a = 0; 258 } 259 /* 260 printf("b: [rl: %d, rp %d, fl %d, fp %d]; bs: [rl: %d, rp %d, fl %d, fp %d]\n", 261 b->rl, b->rp, b->fl, b->fp, bs->rl, bs->rp, bs->fl, bs->fp); 262 */ 263 /* Don't allow write unaligned data */ 264 while (bs->rl > a && b->fl > a) { 265 /* ensure we always have a whole number of samples */ 266 l = min(min(bs->rl, bs->bufsize - bs->rp), min(b->fl, b->bufsize - b->fp)) & ~a; 267 if (l == 0) 268 return lacc; 269 /* Move the samples, update the markers and pointers. */ 270 bcopy(bs->buf + bs->rp, b->buf + b->fp, l); 271 bs->fl += l; 272 bs->rl -= l; 273 bs->rp = (bs->rp + l) % bs->bufsize; 274 b->rl += l; 275 b->fl -= l; 276 b->fp = (b->fp + l) % b->bufsize; 277 /* Clear the new space in the secondary buffer. */ 278 buf_clear(bs, bs->fmt, l); 279 /* Accumulate the total bytes of the moved samples. */ 280 lacc += l; 281 /* A feed to the DMA buffer is equivalent to an interrupt. */ 282 bs->total += l; 283 if (c->flags & CHN_F_MAPPED) { 284 if (bs->total - bs->prev_total >= bs->blksz) { 285 bs->prev_total = bs->total; 286 bs->int_count++; 287 c->blocks++; 288 } 289 } else 290 bs->int_count++; 291 if (bs->sel.si_pid && chn_polltrigger(c)) 292 selwakeup(&bs->sel); 293 } 294 295 return lacc; 296} 297 298/* Feeds new data to the secondary write buffer. */ 299static int 300chn_wrfeed2nd(pcm_channel *c, struct uio *buf) 301{ 302 snd_dbuf *bs = &c->buffer2nd; 303 int l, w, wacc; 304 305 /* The DMA buffer may have some space. */ 306 while (chn_wrfeed(c) > 0); 307 308 /* ensure we always have a whole number of samples */ 309 wacc = 0; 310 while (buf->uio_resid > 0 && bs->fl > 0) { 311 /* 312 * The size of the data to move here does not have to be 313 * aligned. We take care of it upon moving the data to a 314 * DMA buffer. 315 */ 316 l = min(bs->fl, bs->bufsize - bs->fp); 317 /* Move the samples, update the markers and pointers. */ 318 w = c->feeder->feed(c->feeder, c, bs->buf + bs->fp, l, buf); 319 if (w == 0) 320 panic("no feed"); 321 bs->rl += w; 322 bs->fl -= w; 323 bs->fp = (bs->fp + w) % bs->bufsize; 324 /* Accumulate the total bytes of the moved samples. */ 325 wacc += w; 326 327 /* If any pcm data gets moved, push it to the DMA buffer. */ 328 if (w > 0) 329 while (chn_wrfeed(c) > 0); 330 } 331 332 return wacc; 333} 334 335/* 336 * Write interrupt routine. Can be called from other places (e.g. 337 * to start a paused transfer), but with interrupts disabled. 338 */ 339static void 340chn_wrintr(pcm_channel *c) 341{ 342 snd_dbuf *b = &c->buffer; 343 344 if (b->underflow && !(c->flags & CHN_F_MAPPED)) { 345/* printf("underflow return\n"); 346*/ return; /* nothing new happened */ 347 } 348 if (b->dl) 349 chn_dmadone(c); 350 351 /* 352 * start another dma operation only if have ready data in the buffer, 353 * there is no pending abort, have a full-duplex device, or have a 354 * half duplex device and there is no pending op on the other side. 355 * 356 * Force transfers to be aligned to a boundary of 4, which is 357 * needed when doing stereo and 16-bit. 358 */ 359 360 /* Check underflow and update the pointers. */ 361 chn_checkunderflow(c); 362 363 /* 364 * Fill up the DMA buffer, followed by waking up the top half. 365 * If some of the pcm data in uio are still left, the top half 366 * goes to sleep by itself. 367 */ 368 if (c->flags & CHN_F_MAPPED) 369 chn_wrfeed(c); 370 else { 371 while (chn_wrfeed(c) > 0); 372 buf_clear(b, b->fmt, b->fl); 373 } 374 chn_dmawakeup(c); 375 if (c->flags & CHN_F_TRIGGERED) { 376 chn_dmaupdate(c); 377 /* 378 * check if we need to reprogram the DMA on the sound card. 379 * This happens if the size has changed from zero 380 */ 381 if (b->dl == 0) { 382 /* Start DMA operation */ 383 b->dl = b->blksz; /* record new transfer size */ 384 chn_trigger(c, PCMTRIG_START); 385 } 386 /* 387 * Emulate writing by DMA, i.e. transfer the pcm data from 388 * the emulated-DMA buffer to the device itself. 389 */ 390 chn_trigger(c, PCMTRIG_EMLDMAWR); 391 if (b->rl < b->dl) { 392 DEB(printf("near underflow (%d < %d), %d\n", b->rl, b->dl, b->fl)); 393 /* 394 * we are near to underflow condition, so to prevent 395 * audio 'clicks' clear next b->fl bytes 396 */ 397 buf_clear(b, b->fmt, b->fl); 398 if (b->rl < DMA_ALIGN_THRESHOLD) 399 b->underflow = 1; 400 } 401 } else { 402 /* cannot start a new dma transfer */ 403 DEB(printf("underflow, flags 0x%08x rp %d rl %d\n", c->flags, b->rp, b->rl)); 404 if (b->dl) { /* DMA was active */ 405 b->underflow = 1; /* set underflow flag */ 406 buf_clear(b, b->fmt, b->bufsize); 407 } 408 } 409} 410 411/* 412 * user write routine 413 * 414 * advance the boundary between READY and FREE, fill the space with 415 * uiomove(), and possibly start DMA. Do the above until the transfer 416 * is complete. 417 * 418 * To minimize latency in case a pending DMA transfer is about to end, 419 * we do the transfer in pieces of increasing sizes, extending the 420 * READY area at every checkpoint. In the (necessary) assumption that 421 * memory bandwidth is larger than the rate at which the dma consumes 422 * data, we reduce the latency to something proportional to the length 423 * of the first piece, while keeping the overhead low and being able 424 * to feed the DMA with large blocks. 425 */ 426 427int 428chn_write(pcm_channel *c, struct uio *buf) 429{ 430 int ret = 0, timeout, res, newsize; 431 long s; 432 snd_dbuf *b = &c->buffer; 433 snd_dbuf *bs = &c->buffer2nd; 434 435 if (c->flags & CHN_F_WRITING) { 436 /* This shouldn't happen and is actually silly 437 * - will never wake up, just timeout; why not sleep on b? 438 */ 439 tsleep(&s, PZERO, "pcmwrW", hz); 440 return EBUSY; 441 } 442 c->flags |= CHN_F_WRITING; 443 c->flags &= ~CHN_F_ABORTING; 444 s = spltty(); 445 446 /* 447 * XXX Certain applications attempt to write larger size 448 * of pcm data than c->blocksize2nd without blocking, 449 * resulting partial write. Expand the block size so that 450 * the write operation avoids blocking. 451 */ 452 if ((c->flags & CHN_F_NBIO) && buf->uio_resid > bs->blksz) { 453 DEB(printf("pcm warning: broken app, nbio and tried to write %d bytes with fragsz %d\n", 454 buf->uio_resid, bs->blksz)); 455 newsize = 16; 456 while (newsize < min(buf->uio_resid, CHN_2NDBUFMAXSIZE / 2)) 457 newsize <<= 1; 458 chn_setblocksize(c, bs->blkcnt, newsize); 459 DEB(printf("pcm warning: frags reset to %d x %d\n", bs->blkcnt, bs->blksz)); 460 } 461 462 /* Store the initial size in the uio. */ 463 res = buf->uio_resid; 464 465 /* 466 * Fill up the secondary and DMA buffer. 467 * chn_wrfeed*() takes care of the alignment. 468 */ 469 470 /* Check for underflow before writing into the buffers. */ 471 chn_checkunderflow(c); 472 while (chn_wrfeed2nd(c, buf) > 0); 473 if ((c->flags & CHN_F_NBIO) && (buf->uio_resid > 0)) 474 ret = EAGAIN; 475 476 /* Start playing if not yet. */ 477 if (!b->dl) 478 chn_start(c); 479 480 if (ret == 0) { 481 /* Wait until all samples are played in blocking mode. */ 482 while (buf->uio_resid > 0) { 483 /* Check for underflow before writing into the buffers. */ 484 chn_checkunderflow(c); 485 /* Fill up the buffers with new pcm data. */ 486 while (chn_wrfeed2nd(c, buf) > 0); 487 488 /* Have we finished to feed the secondary buffer? */ 489 if (buf->uio_resid == 0) 490 break; 491 492 /* Wait for new free space to write new pcm samples. */ 493 /* splx(s); */ 494 timeout = 1; /*(buf->uio_resid >= b->dl)? hz / 20 : 1; */ 495 ret = tsleep(b, PRIBIO | PCATCH, "pcmwr", timeout); 496 /* s = spltty(); */ 497 /* if (ret == EINTR) chn_abort(c); */ 498 if (ret == EINTR || ret == ERESTART) 499 break; 500 } 501 } else 502 ret = 0; 503 c->flags &= ~CHN_F_WRITING; 504 splx(s); 505 return ret; 506} 507 508/* 509 * SOUND INPUT 510 * 511 512The input part is similar to the output one, with a circular buffer 513split in two regions, and boundaries advancing because of read() calls 514[r] or dma operation [d]. At initialization, as for the write 515routine, READY is empty, and FREE takes all the space. 516 517 0 rp,rl fp,fl bufsize 518 |__________>____________>________| 519 FREE r READY d FREE 520 521Operation is as follows: upon user read (dsp_read_body()) a DMA read 522is started if not already active (marked by b->dl > 0), 523then as soon as data are available in the READY region they are 524transferred to the user buffer, thus advancing the boundary between FREE 525and READY. Upon interrupts, caused by a completion of a DMA transfer, 526the READY region is extended and possibly a new transfer is started. 527 528When necessary, dsp_rd_dmaupdate() is called to advance fp (and update 529rl,fl accordingly). Upon user reads, rp is advanced and rl,fl are 530updated accordingly. 531 532The rules to choose the size of the new DMA area are similar to 533the other case, with a preferred constant transfer size equal to 534rec_blocksize, and fallback to smaller sizes if no space is available. 535 536 */ 537 538static int 539chn_rddump(pcm_channel *c, int cnt) 540{ 541 snd_dbuf *b = &c->buffer; 542 543 b->rl -= cnt; 544 b->fl += cnt; 545 b->rp = (b->rp + cnt) % b->bufsize; 546 return cnt; 547} 548 549/* 550 * Feed new data from the read buffer. Can be called in the bottom half. 551 * Hence must be called at spltty. 552 */ 553int 554chn_rdfeed(pcm_channel *c) 555{ 556 snd_dbuf *b = &c->buffer; 557 snd_dbuf *bs = &c->buffer2nd; 558 int l, lacc; 559 560 /* ensure we always have a whole number of samples */ 561 lacc = 0; 562 while (bs->fl >= DMA_ALIGN_THRESHOLD && b->rl >= DMA_ALIGN_THRESHOLD) { 563 l = min(min(bs->fl, bs->bufsize - bs->fp), min(b->rl, b->bufsize - b->rp)) & DMA_ALIGN_MASK; 564 /* Move the samples, update the markers and pointers. */ 565 bcopy(b->buf + b->rp, bs->buf + bs->fp, l); 566 bs->fl -= l; 567 bs->rl += l; 568 bs->fp = (bs->fp + l) % bs->bufsize; 569 b->rl -= l; 570 b->fl += l; 571 b->rp = (b->rp + l) % b->bufsize; 572 /* Accumulate the total bytes of the moved samples. */ 573 lacc += l; 574 /* A feed from the DMA buffer is equivalent to an interrupt. */ 575 bs->int_count++; 576 if (bs->sel.si_pid && chn_polltrigger(c)) 577 selwakeup(&bs->sel); 578 } 579 580 return lacc; 581} 582 583/* Feeds new data from the secondary read buffer. */ 584static int 585chn_rdfeed2nd(pcm_channel *c, struct uio *buf) 586{ 587 snd_dbuf *bs = &c->buffer2nd; 588 int l, w, wacc; 589 590 /* The DMA buffer may have pcm data. */ 591 while(chn_rdfeed(c) > 0); 592 593 /* ensure we always have a whole number of samples */ 594 wacc = 0; 595 while (buf->uio_resid > 0 && bs->rl > 0) { 596 /* 597 * The size of the data to move here does not have to be 598 * aligned. We take care of it upon moving the data to a 599 * DMA buffer. 600 */ 601 l = min(bs->rl, bs->bufsize - bs->rp); 602 /* Move the samples, update the markers and pointers. */ 603 w = c->feeder->feed(c->feeder, c, bs->buf + bs->rp, l, buf); 604 if (w == 0) panic("no feed"); 605 bs->fl += w; 606 bs->rl -= w; 607 bs->rp = (bs->rp + w) % bs->bufsize; 608 /* Clear the new space in the secondary buffer. */ 609 buf_clear(bs, bs->fmt, l); 610 /* Accumulate the total bytes of the moved samples. */ 611 bs->total += w; 612 wacc += w; 613 614 /* If any pcm data gets moved, suck up the DMA buffer. */ 615 if (w > 0) 616 while (chn_rdfeed(c) > 0); 617 } 618 619 return wacc; 620} 621 622/* read interrupt routine. Must be called with interrupts blocked. */ 623static void 624chn_rdintr(pcm_channel *c) 625{ 626 snd_dbuf *b = &c->buffer; 627 628 if (b->dl) chn_dmadone(c); 629 630 DEB(printf("rdintr: start dl %d, rp:rl %d:%d, fp:fl %d:%d\n", 631 b->dl, b->rp, b->rl, b->fp, b->fl)); 632 633 /* Update the pointers. */ 634 chn_dmaupdate(c); 635 636 /* 637 * Suck up the DMA buffer, followed by waking up the top half. 638 * If some of the pcm data in the secondary buffer are still left, 639 * the top half goes to sleep by itself. 640 */ 641 while(chn_rdfeed(c) > 0); 642 chn_dmawakeup(c); 643 644 if (b->fl < b->dl) { 645 DEB(printf("near overflow (%d < %d), %d\n", b->fl, b->dl, b->rl)); 646 chn_rddump(c, b->blksz - b->fl); 647 } 648 649 if (c->flags & CHN_F_TRIGGERED) { 650 /* 651 * check if we need to reprogram the DMA on the sound card. 652 * This happens if the size has changed from zero 653 */ 654 if (b->dl == 0) { 655 /* Start DMA operation */ 656 b->dl = b->blksz; /* record new transfer size */ 657 chn_trigger(c, PCMTRIG_START); 658 } 659 /* 660 * Emulate writing by DMA, i.e. transfer the pcm data from 661 * the emulated-DMA buffer to the device itself. 662 */ 663 chn_trigger(c, PCMTRIG_EMLDMARD); 664 } else { 665 if (b->dl) { /* was active */ 666 b->dl = 0; 667 chn_trigger(c, PCMTRIG_STOP); 668 chn_dmaupdate(c); 669 } 670 } 671} 672 673/* 674 * body of user-read routine 675 * 676 * Start DMA if not active; wait for READY not empty. 677 * Transfer data from READY region using uiomove(), advance boundary 678 * between FREE and READY. Repeat until transfer is complete. 679 * 680 * To avoid excessive latency in freeing up space for the DMA 681 * engine, transfers are done in blocks of increasing size, so that 682 * the latency is proportional to the size of the smallest block, but 683 * we have a low overhead and are able to feed the dma engine with 684 * large blocks. 685 * 686 * NOTE: in the current version, read will not return more than 687 * blocksize bytes at once (unless more are already available), to 688 * avoid that requests using very large buffers block for too long. 689 */ 690 691int 692chn_read(pcm_channel *c, struct uio *buf) 693{ 694 int ret = 0, timeout, limit, res; 695 long s; 696 snd_dbuf *b = &c->buffer; 697 snd_dbuf *bs = &c->buffer2nd; 698 699 if (c->flags & CHN_F_READING) { 700 /* This shouldn't happen and is actually silly */ 701 tsleep(&s, PZERO, "pcmrdR", hz); 702 return (EBUSY); 703 } 704 705 s = spltty(); 706 707 /* Store the initial size in the uio. */ 708 res = buf->uio_resid; 709 710 c->flags |= CHN_F_READING; 711 c->flags &= ~CHN_F_ABORTING; 712 limit = buf->uio_resid - b->blksz; 713 if (limit < 0) 714 limit = 0; 715 716 /* Update the pointers and suck up the DMA and secondary buffers. */ 717 chn_dmaupdate(c); 718 while (chn_rdfeed2nd(c, buf) > 0); 719 720 /* Start capturing if not yet. */ 721 if ((!bs->rl || !b->rl) && !b->dl) 722 chn_start(c); 723 724 if (!(c->flags & CHN_F_NBIO)) { 725 /* Wait until all samples are captured. */ 726 while (buf->uio_resid > 0) { 727 /* Suck up the DMA and secondary buffers. */ 728 chn_dmaupdate(c); 729 while (chn_rdfeed2nd(c, buf) > 0); 730 731 /* Have we finished to feed the uio? */ 732 if (buf->uio_resid == 0) 733 break; 734 735 /* Wait for new pcm samples. */ 736 /* splx(s); */ 737 timeout = (buf->uio_resid - limit >= b->dl)? hz / 20 : 1; 738 ret = tsleep(b, PRIBIO | PCATCH, "pcmrd", timeout); 739 /* s = spltty(); */ 740 /* if (ret == EINTR) chn_abort(c); */ 741 if (ret == EINTR || ret == ERESTART) 742 break; 743 } 744 } else { 745 /* If no pcm data was read on nonblocking, return EAGAIN. */ 746 if (buf->uio_resid == res) 747 ret = EAGAIN; 748 } 749 c->flags &= ~CHN_F_READING; 750 splx(s); 751 return ret; 752} 753 754void 755chn_intr(pcm_channel *c) 756{ 757 if (c->flags & CHN_F_INIT) 758 chn_reinit(c); 759 if (c->direction == PCMDIR_PLAY) 760 chn_wrintr(c); 761 else 762 chn_rdintr(c); 763} 764 765u_int32_t 766chn_start(pcm_channel *c) 767{ 768 u_int32_t r, s; 769 snd_dbuf *b = &c->buffer; 770 771 r = 0; 772 s = spltty(); 773 if (b->dl == 0 && !(c->flags & (CHN_F_MAPPED | CHN_F_NOTRIGGER))) { 774 if (c->direction == PCMDIR_PLAY) { 775 /* Fill up the DMA buffer. */ 776 while (chn_wrfeed(c) > 0); 777 if (b->rl >= b->blksz) 778 r = CHN_F_TRIGGERED; 779 } else { 780 /* Suck up the DMA buffer. */ 781 while (chn_rdfeed(c) > 0); 782 if (b->fl >= b->blksz) 783 r = CHN_F_TRIGGERED; 784 } 785 c->flags |= r; 786 chn_intr(c); 787 } 788 splx(s); 789 return r; 790} 791 792static void 793chn_dma_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) 794{ 795 snd_dbuf *b = (snd_dbuf *)arg; 796 797 if (bootverbose) { 798 printf("pcm: setmap %lx, %lx; ", (unsigned long)segs->ds_addr, 799 (unsigned long)segs->ds_len); 800 printf("%p -> %lx\n", b->buf, (unsigned long)vtophys(b->buf)); 801 } 802} 803 804/* 805 * Allocate memory for DMA buffer. If the device do not perform DMA transfer, 806 * the drvier can call malloc(9) by its own. 807 */ 808int 809chn_allocbuf(snd_dbuf *b, bus_dma_tag_t parent_dmat) 810{ 811 if (bus_dmamem_alloc(parent_dmat, (void **)&b->buf, 812 BUS_DMA_NOWAIT, &b->dmamap)) return -1; 813 if (bus_dmamap_load(parent_dmat, b->dmamap, b->buf, 814 b->bufsize, chn_dma_setmap, b, 0)) return -1; 815 return 0; 816} 817 818static void 819buf_clear(snd_dbuf *b, u_int32_t fmt, int length) 820{ 821 int i; 822 u_int16_t data, *p; 823 824 /* rely on length & DMA_ALIGN_MASK == 0 */ 825 length &= DMA_ALIGN_MASK; 826 if (length == 0) 827 return; 828 829 if (fmt & AFMT_SIGNED) 830 data = 0x00; 831 else 832 data = 0x80; 833 834 if (fmt & AFMT_16BIT) 835 data <<= 8; 836 else 837 data |= data << 8; 838 839 if (fmt & AFMT_BIGENDIAN) 840 data = ((data >> 8) & 0x00ff) | ((data << 8) & 0xff00); 841 842 i = b->fp; 843 p = (u_int16_t *)(b->buf + b->fp); 844 while (length > 0) { 845 *p++ = data; 846 length -= 2; 847 i += 2; 848 if (i >= b->bufsize) { 849 p = (u_int16_t *)b->buf; 850 i = 0; 851 } 852 } 853} 854 855void 856chn_resetbuf(pcm_channel *c) 857{ 858 snd_dbuf *b = &c->buffer; 859 snd_dbuf *bs = &c->buffer2nd; 860 861 c->blocks = 0; 862 b->rp = b->fp = 0; 863 b->dl = b->rl = 0; 864 b->fl = b->bufsize; 865 b->prev_total = b->total = 0; 866 b->prev_int_count = b->int_count = 0; 867 b->underflow = 0; 868 if (b->buf && b->bufsize > 0) 869 buf_clear(b, b->fmt, b->bufsize); 870 871 bs->rp = bs->fp = 0; 872 bs->dl = bs->rl = 0; 873 bs->fl = bs->bufsize; 874 bs->prev_total = bs->total = 0; 875 bs->prev_int_count = bs->int_count = 0; 876 bs->underflow = 0; 877 if (bs->buf && bs->bufsize > 0) 878 buf_clear(bs, bs->fmt, bs->bufsize); 879} 880 881void 882buf_isadma(snd_dbuf *b, int go) 883{ 884 if (ISA_DMA(b)) { 885 switch (go) { 886 case PCMTRIG_START: 887 DEB(printf("buf 0x%p ISA DMA started\n", b)); 888 isa_dmastart(b->dir | ISADMA_RAW, b->buf, 889 b->bufsize, b->chan); 890 break; 891 case PCMTRIG_STOP: 892 case PCMTRIG_ABORT: 893 DEB(printf("buf 0x%p ISA DMA stopped\n", b)); 894 isa_dmastop(b->chan); 895 isa_dmadone(b->dir | ISADMA_RAW, b->buf, b->bufsize, 896 b->chan); 897 break; 898 } 899 } else KASSERT(1, ("buf_isadma called on invalid channel")); 900} 901 902int 903buf_isadmaptr(snd_dbuf *b) 904{ 905 if (ISA_DMA(b)) { 906 int i = b->dl? isa_dmastatus(b->chan) : b->bufsize; 907 if (i < 0) 908 i = 0; 909 return b->bufsize - i; 910 } else KASSERT(1, ("buf_isadmaptr called on invalid channel")); 911 return -1; 912} 913 914/* 915 * chn_sync waits until the space in the given channel goes above 916 * a threshold. The threshold is checked against fl or rl respectively. 917 * Assume that the condition can become true, do not check here... 918 */ 919int 920chn_sync(pcm_channel *c, int threshold) 921{ 922 u_long s, rdy; 923 int ret; 924 snd_dbuf *b = &c->buffer; 925 snd_dbuf *bs = &c->buffer2nd; 926 927 for (;;) { 928 s = spltty(); 929 chn_checkunderflow(c); 930 while (chn_wrfeed(c) > 0); 931 rdy = (c->direction == PCMDIR_PLAY)? bs->fl : bs->rl; 932 if (rdy <= threshold) { 933 ret = tsleep((caddr_t)b, PRIBIO | PCATCH, "pcmsyn", 1); 934 splx(s); 935 if (ret == ERESTART || ret == EINTR) { 936 DEB(printf("chn_sync: tsleep returns %d\n", ret)); 937 return -1; 938 } 939 } else break; 940 } 941 splx(s); 942 return 0; 943} 944 945int 946chn_poll(pcm_channel *c, int ev, struct proc *p) 947{ 948 snd_dbuf *b = &c->buffer; 949 snd_dbuf *bs = &c->buffer2nd; 950 u_long s; 951 int ret; 952 953 s = spltty(); 954 if (!(c->flags & CHN_F_MAPPED)) { 955 if (c->direction == PCMDIR_PLAY) { 956 /* Fill up the DMA buffer. */ 957 chn_checkunderflow(c); 958 while (chn_wrfeed(c) > 0); 959 } else { 960 /* Suck up the DMA buffer. */ 961 chn_dmaupdate(c); 962 while (chn_rdfeed(c) > 0); 963 } 964 if (!b->dl) 965 chn_start(c); 966 } 967 ret = 0; 968 if (chn_polltrigger(c) && chn_pollreset(c)) 969 ret = ev; 970 else 971 selrecord(p, &bs->sel); 972 splx(s); 973 return ret; 974} 975 976/* 977 * chn_abort is a non-blocking function which aborts a pending 978 * DMA transfer and flushes the buffers. 979 * It returns the number of bytes that have not been transferred. 980 */ 981int 982chn_abort(pcm_channel *c) 983{ 984 int missing = 0, cnt = 0; 985 snd_dbuf *b = &c->buffer; 986 snd_dbuf *bs = &c->buffer2nd; 987 988 if (!b->dl) return 0; 989 c->flags |= CHN_F_ABORTING; 990 c->flags &= ~CHN_F_TRIGGERED; 991 while (!b->underflow && (b->dl > 0) && (cnt < 20)) { 992 tsleep((caddr_t)b, PRIBIO, "pcmabr", hz / 20); 993 cnt++; 994 } 995 chn_trigger(c, PCMTRIG_ABORT); 996 b->dl = 0; 997 if (c->direction == PCMDIR_PLAY) 998 chn_checkunderflow(c); 999 else 1000 chn_dmaupdate(c); 1001 missing = bs->rl; 1002 return missing; 1003} 1004 1005/* 1006 * this routine tries to flush the dma transfer. It is called 1007 * on a close. We immediately abort any read DMA 1008 * operation, and then wait for the play buffer to drain. 1009 */ 1010 1011int 1012chn_flush(pcm_channel *c) 1013{ 1014 int ret, count = 50, s; 1015 snd_dbuf *b = &c->buffer; 1016 1017 DEB(printf("chn_flush c->flags 0x%08x\n", c->flags)); 1018 c->flags |= CHN_F_CLOSING; 1019 c->flags &= ~CHN_F_TRIGGERED; 1020 if (c->direction == PCMDIR_REC) 1021 chn_abort(c); 1022 else if (b->dl) { 1023 while ((b->rl > 0) && !b->underflow && (count-- > 0)) { 1024 /* still pending output data. */ 1025 ret = tsleep((caddr_t)b, PRIBIO | PCATCH, "pcmflu", hz / 10); 1026 s = spltty(); 1027 chn_dmaupdate(c); 1028 splx(s); 1029 DEB(printf("chn_flush: now rl = %d, fl = %d\n", b->rl, b->fl)); 1030 if (ret == EINTR || ret == ERESTART) { 1031 DEB(printf("chn_flush: tsleep returns %d\n", ret)); 1032 return ret; 1033 } 1034 } 1035 } 1036 if (count == 0) 1037 DEB(printf("chn_flush: timeout flushing dbuf_out, cnt 0x%x flags 0x%x\n", b->rl, c->flags)); 1038 c->flags &= ~CHN_F_CLOSING; 1039 if (c->direction == PCMDIR_PLAY && b->dl) 1040 chn_abort(c); 1041 return 0; 1042} 1043 1044int 1045chn_reset(pcm_channel *c, u_int32_t fmt) 1046{ 1047 int r = 0; 1048 1049 chn_abort(c); 1050 c->flags &= CHN_F_RESET; 1051 r = chn_setblocksize(c, CHN_2NDBUFBLKNUM, CHN_2NDBUFBLKSIZE); 1052 if (r) 1053 return r; 1054 if (fmt) { 1055 r = chn_setformat(c, fmt); 1056 if (r == 0) 1057 r = chn_setspeed(c, DSP_DEFAULT_SPEED); 1058 if (r == 0) 1059 r = chn_setvolume(c, 100, 100); 1060 } 1061 chn_resetbuf(c); 1062 /* c->flags |= CHN_F_INIT; */ 1063 return 0; 1064} 1065 1066int 1067chn_reinit(pcm_channel *c) 1068{ 1069 if ((c->flags & CHN_F_INIT) && CANCHANGE(c)) { 1070 chn_setformat(c, c->format); 1071 chn_setspeed(c, c->speed); 1072 chn_setvolume(c, (c->volume >> 8) & 0xff, c->volume & 0xff); 1073 c->flags &= ~CHN_F_INIT; 1074 return 1; 1075 } 1076 return 0; 1077} 1078 1079int 1080chn_init(pcm_channel *c, void *devinfo, int dir) 1081{ 1082 snd_dbuf *bs = &c->buffer2nd; 1083 1084 /* Initialize the hardware and DMA buffer first. */ 1085 c->flags = 0; 1086 c->feeder = &feeder_root; 1087 c->buffer.chan = -1; 1088 c->devinfo = c->init(devinfo, &c->buffer, c, dir); 1089 if (c->devinfo == NULL || c->buffer.bufsize == 0) 1090 return 1; 1091 chn_setdir(c, dir); 1092 1093 /* And the secondary buffer. */ 1094 bs->buf = NULL; 1095 bs->bufsize = 0; 1096 return 0; 1097} 1098 1099int 1100chn_setdir(pcm_channel *c, int dir) 1101{ 1102 int r; 1103 1104 c->direction = dir; 1105 r = c->setdir(c->devinfo, c->direction); 1106 if (!r && ISA_DMA(&c->buffer)) 1107 c->buffer.dir = (dir == PCMDIR_PLAY)? ISADMA_WRITE : ISADMA_READ; 1108 return r; 1109} 1110 1111int 1112chn_setvolume(pcm_channel *c, int left, int right) 1113{ 1114 /* could add a feeder for volume changing if channel returns -1 */ 1115 if (CANCHANGE(c)) { 1116 c->volume = (left << 8) | right; 1117 return 0; 1118 } 1119 c->volume = (left << 8) | right; 1120 c->flags |= CHN_F_INIT; 1121 return 0; 1122} 1123 1124int 1125chn_setspeed(pcm_channel *c, int speed) 1126{ 1127 if (speed <= 0) 1128 return EINVAL; 1129 /* could add a feeder for rate conversion */ 1130 if (CANCHANGE(c)) { 1131 c->speed = c->setspeed(c->devinfo, speed); 1132 return 0; 1133 } 1134 c->speed = speed; 1135 c->flags |= CHN_F_INIT; 1136 return 0; 1137} 1138 1139int 1140chn_setformat(pcm_channel *c, u_int32_t fmt) 1141{ 1142 snd_dbuf *b = &c->buffer; 1143 snd_dbuf *bs = &c->buffer2nd; 1144 1145 u_int32_t hwfmt; 1146 if (CANCHANGE(c)) { 1147 c->format = fmt; 1148 hwfmt = chn_feedchain(c); 1149 if ((c->flags & CHN_F_MAPPED) && c->format != hwfmt) 1150 return EINVAL; 1151 b->fmt = hwfmt; 1152 bs->fmt = hwfmt; 1153 chn_resetbuf(c); 1154 c->setformat(c->devinfo, hwfmt); 1155 return 0; 1156 } 1157 c->format = fmt; 1158 c->flags |= CHN_F_INIT; 1159 return 0; 1160} 1161 1162int 1163chn_setblocksize(pcm_channel *c, int blkcnt, int blksz) 1164{ 1165 snd_dbuf *b = &c->buffer; 1166 snd_dbuf *bs = &c->buffer2nd; 1167 int s, ss, bufsz; 1168 1169 if (bs->blkcnt == blkcnt && bs->blksz == blksz) 1170 return 0; 1171 if (c->flags & CHN_F_MAPPED) { 1172 DEB(printf("chn_setblocksize: can't work on mapped channel")); 1173 return EINVAL; 1174 } 1175 c->flags &= ~CHN_F_HAS_SIZE; 1176 1177 ss = 1; 1178 ss <<= (bs->fmt & AFMT_STEREO)? 1 : 0; 1179 ss <<= (bs->fmt & AFMT_16BIT)? 1 : 0; 1180 1181 if (blksz >= 2) 1182 c->flags |= CHN_F_HAS_SIZE; 1183 /* let us specify blksz without setting CHN_F_HAS_SIZE */ 1184 if (blksz < 0) 1185 blksz = -blksz; 1186 /* default to blksz = ~0.25s */ 1187 if (blksz < 16) 1188 blksz = (ss * c->speed) >> 2; 1189 1190 if (blkcnt * blksz > CHN_2NDBUFMAXSIZE) 1191 blkcnt = CHN_2NDBUFMAXSIZE / blksz; 1192 bufsz = blkcnt * blksz; 1193 1194 s = spltty(); 1195 if (bs->buf != NULL) 1196 free(bs->buf, M_DEVBUF); 1197 bs->buf = malloc(bufsz, M_DEVBUF, M_WAITOK); 1198 if (bs->buf == NULL) { 1199 splx(s); 1200 DEB(printf("chn_setblocksize: out of memory.")); 1201 return ENOSPC; 1202 } 1203 bs->bufsize = bufsz; 1204 bs->rl = bs->rp = bs->fp = 0; 1205 bs->fl = bs->bufsize; 1206 buf_clear(bs, bs->fmt, bs->bufsize); 1207 bs->blkcnt = blkcnt; 1208 bs->blksz = blksz; 1209 RANGE(blksz, 16, b->bufsize / 2); 1210 b->blksz = c->setblocksize(c->devinfo, blksz); 1211 splx(s); 1212 1213 return 0; 1214} 1215 1216int 1217chn_trigger(pcm_channel *c, int go) 1218{ 1219 return c->trigger(c->devinfo, go); 1220} 1221 1222int 1223chn_getptr(pcm_channel *c) 1224{ 1225 int hwptr; 1226 int a = (1 << c->align) - 1; 1227 snd_dbuf *b = &c->buffer; 1228 1229 hwptr = b->dl? c->getptr(c->devinfo) : 0; 1230 /* don't allow unaligned values in the hwa ptr */ 1231 hwptr &= ~a ; /* Apply channel align mask */ 1232 hwptr &= DMA_ALIGN_MASK; /* Apply DMA align mask */ 1233 return hwptr; 1234} 1235 1236pcmchan_caps * 1237chn_getcaps(pcm_channel *c) 1238{ 1239 return c->getcaps(c->devinfo); 1240} 1241